162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Keystone 2 Edison SoC specific device tree
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ciclocks {
962306a36Sopenharmony_ci	mainpllclk: mainpllclk@2310110 {
1062306a36Sopenharmony_ci		#clock-cells = <0>;
1162306a36Sopenharmony_ci		compatible = "ti,keystone,main-pll-clock";
1262306a36Sopenharmony_ci		clocks = <&refclksys>;
1362306a36Sopenharmony_ci		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
1462306a36Sopenharmony_ci		reg-names = "control", "multiplier", "post-divider";
1562306a36Sopenharmony_ci	};
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci	papllclk: papllclk@2620358 {
1862306a36Sopenharmony_ci		#clock-cells = <0>;
1962306a36Sopenharmony_ci		compatible = "ti,keystone,pll-clock";
2062306a36Sopenharmony_ci		clocks = <&refclkpass>;
2162306a36Sopenharmony_ci		clock-output-names = "papllclk";
2262306a36Sopenharmony_ci		reg = <0x02620358 4>;
2362306a36Sopenharmony_ci		reg-names = "control";
2462306a36Sopenharmony_ci	};
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci	ddr3apllclk: ddr3apllclk@2620360 {
2762306a36Sopenharmony_ci		#clock-cells = <0>;
2862306a36Sopenharmony_ci		compatible = "ti,keystone,pll-clock";
2962306a36Sopenharmony_ci		clocks = <&refclkddr3a>;
3062306a36Sopenharmony_ci		clock-output-names = "ddr-3a-pll-clk";
3162306a36Sopenharmony_ci		reg = <0x02620360 4>;
3262306a36Sopenharmony_ci		reg-names = "control";
3362306a36Sopenharmony_ci	};
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci	clkusb1: clkusb1@2350004 {
3662306a36Sopenharmony_ci		#clock-cells = <0>;
3762306a36Sopenharmony_ci		compatible = "ti,keystone,psc-clock";
3862306a36Sopenharmony_ci		clocks = <&chipclk16>;
3962306a36Sopenharmony_ci		clock-output-names = "usb1";
4062306a36Sopenharmony_ci		reg = <0x02350004 0xb00>, <0x02350000 0x400>;
4162306a36Sopenharmony_ci		reg-names = "control", "domain";
4262306a36Sopenharmony_ci		domain-id = <0>;
4362306a36Sopenharmony_ci	};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci	clkhyperlink0: clkhyperlink0@2350030 {
4662306a36Sopenharmony_ci		#clock-cells = <0>;
4762306a36Sopenharmony_ci		compatible = "ti,keystone,psc-clock";
4862306a36Sopenharmony_ci		clocks = <&chipclk12>;
4962306a36Sopenharmony_ci		clock-output-names = "hyperlink-0";
5062306a36Sopenharmony_ci		reg = <0x02350030 0xb00>, <0x02350014 0x400>;
5162306a36Sopenharmony_ci		reg-names = "control", "domain";
5262306a36Sopenharmony_ci		domain-id = <5>;
5362306a36Sopenharmony_ci	};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci	clkpcie1: clkpcie1@235006c {
5662306a36Sopenharmony_ci		#clock-cells = <0>;
5762306a36Sopenharmony_ci		compatible = "ti,keystone,psc-clock";
5862306a36Sopenharmony_ci		clocks = <&chipclk12>;
5962306a36Sopenharmony_ci		clock-output-names = "pcie1";
6062306a36Sopenharmony_ci		reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
6162306a36Sopenharmony_ci		reg-names = "control", "domain";
6262306a36Sopenharmony_ci		domain-id = <18>;
6362306a36Sopenharmony_ci	};
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci	clkxge: clkxge@23500c8 {
6662306a36Sopenharmony_ci		#clock-cells = <0>;
6762306a36Sopenharmony_ci		compatible = "ti,keystone,psc-clock";
6862306a36Sopenharmony_ci		clocks = <&chipclk13>;
6962306a36Sopenharmony_ci		clock-output-names = "xge";
7062306a36Sopenharmony_ci		reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
7162306a36Sopenharmony_ci		reg-names = "control", "domain";
7262306a36Sopenharmony_ci		domain-id = <29>;
7362306a36Sopenharmony_ci	};
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci	/*
7662306a36Sopenharmony_ci	 * Below are set of fixed, input clocks definitions,
7762306a36Sopenharmony_ci	 * for which real frequencies have to be defined in board files.
7862306a36Sopenharmony_ci	 * Those clocks can be used as reference clocks for some HW modules
7962306a36Sopenharmony_ci	 * (as cpts, for example) by configuring corresponding clock muxes.
8062306a36Sopenharmony_ci	 */
8162306a36Sopenharmony_ci	tsipclka: tsipclka {
8262306a36Sopenharmony_ci		#clock-cells = <0>;
8362306a36Sopenharmony_ci		compatible = "fixed-clock";
8462306a36Sopenharmony_ci		clock-frequency = <0>;
8562306a36Sopenharmony_ci		clock-output-names = "tsipclka";
8662306a36Sopenharmony_ci	};
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ci	tsipclkb: tsipclkb {
8962306a36Sopenharmony_ci		#clock-cells = <0>;
9062306a36Sopenharmony_ci		compatible = "fixed-clock";
9162306a36Sopenharmony_ci		clock-frequency = <0>;
9262306a36Sopenharmony_ci		clock-output-names = "tsipclkb";
9362306a36Sopenharmony_ci	};
9462306a36Sopenharmony_ci};
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