162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright 2012 ST-Ericsson AB
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Device Tree for the HREF+ prior to the v60 variant.
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#include "ste-href-ab8500.dtsi"
962306a36Sopenharmony_ci#include "ste-href.dtsi"
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/ {
1262306a36Sopenharmony_ci	gpio_keys {
1362306a36Sopenharmony_ci		button@1 {
1462306a36Sopenharmony_ci			gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
1562306a36Sopenharmony_ci		};
1662306a36Sopenharmony_ci	};
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci	soc {
1962306a36Sopenharmony_ci		/* Enable UART1 on this board */
2062306a36Sopenharmony_ci		serial@80121000 {
2162306a36Sopenharmony_ci			status = "okay";
2262306a36Sopenharmony_ci		};
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci		i2c@80004000 {
2562306a36Sopenharmony_ci			tps61052@33 {
2662306a36Sopenharmony_ci				compatible = "ti,tps61052";
2762306a36Sopenharmony_ci				reg = <0x33>;
2862306a36Sopenharmony_ci			};
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci			tc35892@42 {
3162306a36Sopenharmony_ci				compatible = "toshiba,tc35892";
3262306a36Sopenharmony_ci				reg = <0x42>;
3362306a36Sopenharmony_ci				interrupt-parent = <&gpio6>;
3462306a36Sopenharmony_ci				interrupts = <25 IRQ_TYPE_EDGE_RISING>;
3562306a36Sopenharmony_ci				pinctrl-names = "default";
3662306a36Sopenharmony_ci				pinctrl-0 = <&tc35892_hrefprev60_mode>;
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci				interrupt-controller;
3962306a36Sopenharmony_ci				#interrupt-cells = <1>;
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci				tc3589x_gpio: tc3589x_gpio {
4262306a36Sopenharmony_ci					compatible = "tc3589x-gpio";
4362306a36Sopenharmony_ci					interrupts = <0>;
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci					interrupt-controller;
4662306a36Sopenharmony_ci					#interrupt-cells = <2>;
4762306a36Sopenharmony_ci					gpio-controller;
4862306a36Sopenharmony_ci					#gpio-cells = <2>;
4962306a36Sopenharmony_ci				};
5062306a36Sopenharmony_ci			};
5162306a36Sopenharmony_ci		};
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci		spi@80002000 {
5462306a36Sopenharmony_ci			/*
5562306a36Sopenharmony_ci			 * On the first generation boards, this SSP/SPI port was connected
5662306a36Sopenharmony_ci			 * to the AB8500.
5762306a36Sopenharmony_ci			 */
5862306a36Sopenharmony_ci			pinctrl-names = "default";
5962306a36Sopenharmony_ci			pinctrl-0 = <&ssp0_hrefprev60_mode>;
6062306a36Sopenharmony_ci			status = "okay";
6162306a36Sopenharmony_ci		};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci		// External Micro SD slot
6462306a36Sopenharmony_ci		mmc@80126000 {
6562306a36Sopenharmony_ci			cd-gpios  = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
6662306a36Sopenharmony_ci		};
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci		pinctrl {
6962306a36Sopenharmony_ci			/* Set this up using hogs */
7062306a36Sopenharmony_ci			pinctrl-names = "default";
7162306a36Sopenharmony_ci			pinctrl-0 = <&ipgpio_hrefprev60_mode>;
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci			ssp0 {
7462306a36Sopenharmony_ci				ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
7562306a36Sopenharmony_ci					hrefprev60_mux {
7662306a36Sopenharmony_ci						function = "ssp0";
7762306a36Sopenharmony_ci						groups = "ssp0_a_1";
7862306a36Sopenharmony_ci					};
7962306a36Sopenharmony_ci					hrefprev60_cfg1 {
8062306a36Sopenharmony_ci						pins = "GPIO145_C13"; /* RXD */
8162306a36Sopenharmony_ci						ste,config = <&in_pd>;
8262306a36Sopenharmony_ci					};
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci				};
8562306a36Sopenharmony_ci			};
8662306a36Sopenharmony_ci			sdi0 {
8762306a36Sopenharmony_ci				/* This additional pin needed on early MOP500 and HREFs previous to v60 */
8862306a36Sopenharmony_ci				sdi0_default_mode: sdi0_default {
8962306a36Sopenharmony_ci					hrefprev60_mux {
9062306a36Sopenharmony_ci						function = "mc0";
9162306a36Sopenharmony_ci						groups = "mc0dat31dir_a_1";
9262306a36Sopenharmony_ci					};
9362306a36Sopenharmony_ci					hrefprev60_cfg1 {
9462306a36Sopenharmony_ci						pins = "GPIO21_AB3"; /* DAT31DIR */
9562306a36Sopenharmony_ci						ste,config = <&out_hi>;
9662306a36Sopenharmony_ci					};
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci				};
9962306a36Sopenharmony_ci			};
10062306a36Sopenharmony_ci			tc35892 {
10162306a36Sopenharmony_ci				tc35892_hrefprev60_mode: tc35892_hrefprev60 {
10262306a36Sopenharmony_ci					hrefprev60_cfg {
10362306a36Sopenharmony_ci						pins = "GPIO217_AH12";
10462306a36Sopenharmony_ci						ste,config = <&gpio_in_pu>;
10562306a36Sopenharmony_ci					};
10662306a36Sopenharmony_ci				};
10762306a36Sopenharmony_ci			};
10862306a36Sopenharmony_ci			ipgpio {
10962306a36Sopenharmony_ci				 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
11062306a36Sopenharmony_ci					hrefprev60_mux {
11162306a36Sopenharmony_ci						function = "ipgpio";
11262306a36Sopenharmony_ci						groups = "ipgpio0_c_1", "ipgpio1_c_1";
11362306a36Sopenharmony_ci					};
11462306a36Sopenharmony_ci					hrefprev60_cfg1 {
11562306a36Sopenharmony_ci						pins = "GPIO6_AF6", "GPIO7_AG5";
11662306a36Sopenharmony_ci						ste,config = <&in_pu>;
11762306a36Sopenharmony_ci					};
11862306a36Sopenharmony_ci				 };
11962306a36Sopenharmony_ci			};
12062306a36Sopenharmony_ci		};
12162306a36Sopenharmony_ci	};
12262306a36Sopenharmony_ci};
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