162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2013 Freescale Semiconductor, Inc. 462306a36Sopenharmony_ci * Copyright 2013 Linaro Limited 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci/dts-v1/; 862306a36Sopenharmony_ci#include "vf610.dtsi" 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/ { 1162306a36Sopenharmony_ci model = "PHYTEC Cosmic/Cosmic+ Board"; 1262306a36Sopenharmony_ci compatible = "phytec,vf610-cosmic", "fsl,vf610"; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci chosen { 1562306a36Sopenharmony_ci bootargs = "console=ttyLP1,115200"; 1662306a36Sopenharmony_ci }; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci memory@80000000 { 1962306a36Sopenharmony_ci device_type = "memory"; 2062306a36Sopenharmony_ci reg = <0x80000000 0x10000000>; 2162306a36Sopenharmony_ci }; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci enet_ext: enet_ext { 2462306a36Sopenharmony_ci compatible = "fixed-clock"; 2562306a36Sopenharmony_ci #clock-cells = <0>; 2662306a36Sopenharmony_ci clock-frequency = <50000000>; 2762306a36Sopenharmony_ci }; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci&clks { 3162306a36Sopenharmony_ci clocks = <&sxosc>, <&fxosc>, <&enet_ext>; 3262306a36Sopenharmony_ci clock-names = "sxosc", "fxosc", "enet_ext"; 3362306a36Sopenharmony_ci}; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci&esdhc1 { 3662306a36Sopenharmony_ci pinctrl-names = "default"; 3762306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_esdhc1>; 3862306a36Sopenharmony_ci bus-width = <4>; 3962306a36Sopenharmony_ci status = "okay"; 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci&fec1 { 4362306a36Sopenharmony_ci phy-mode = "rmii"; 4462306a36Sopenharmony_ci pinctrl-names = "default"; 4562306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_fec1>; 4662306a36Sopenharmony_ci status = "okay"; 4762306a36Sopenharmony_ci}; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci&iomuxc { 5062306a36Sopenharmony_ci vf610-cosmic { 5162306a36Sopenharmony_ci pinctrl_esdhc1: esdhc1grp { 5262306a36Sopenharmony_ci fsl,pins = < 5362306a36Sopenharmony_ci VF610_PAD_PTA24__ESDHC1_CLK 0x31ef 5462306a36Sopenharmony_ci VF610_PAD_PTA25__ESDHC1_CMD 0x31ef 5562306a36Sopenharmony_ci VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef 5662306a36Sopenharmony_ci VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef 5762306a36Sopenharmony_ci VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef 5862306a36Sopenharmony_ci VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef 5962306a36Sopenharmony_ci VF610_PAD_PTB28__GPIO_98 0x219d 6062306a36Sopenharmony_ci >; 6162306a36Sopenharmony_ci }; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci pinctrl_fec1: fec1grp { 6462306a36Sopenharmony_ci fsl,pins = < 6562306a36Sopenharmony_ci VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 6662306a36Sopenharmony_ci VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 6762306a36Sopenharmony_ci VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 6862306a36Sopenharmony_ci VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 6962306a36Sopenharmony_ci VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 7062306a36Sopenharmony_ci VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 7162306a36Sopenharmony_ci VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 7262306a36Sopenharmony_ci VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 7362306a36Sopenharmony_ci VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 7462306a36Sopenharmony_ci >; 7562306a36Sopenharmony_ci }; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci pinctrl_uart1: uart1grp { 7862306a36Sopenharmony_ci fsl,pins = < 7962306a36Sopenharmony_ci VF610_PAD_PTB4__UART1_TX 0x21a2 8062306a36Sopenharmony_ci VF610_PAD_PTB5__UART1_RX 0x21a1 8162306a36Sopenharmony_ci >; 8262306a36Sopenharmony_ci }; 8362306a36Sopenharmony_ci }; 8462306a36Sopenharmony_ci}; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci&uart1 { 8762306a36Sopenharmony_ci pinctrl-names = "default"; 8862306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_uart1>; 8962306a36Sopenharmony_ci status = "okay"; 9062306a36Sopenharmony_ci}; 91