162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2019 462306a36Sopenharmony_ci * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci/dts-v1/; 862306a36Sopenharmony_ci#include "imxrt1050.dtsi" 962306a36Sopenharmony_ci#include "imxrt1050-pinfunc.h" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/ { 1262306a36Sopenharmony_ci model = "NXP IMXRT1050-evk board"; 1362306a36Sopenharmony_ci compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050"; 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci chosen { 1662306a36Sopenharmony_ci stdout-path = &lpuart1; 1762306a36Sopenharmony_ci }; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci aliases { 2062306a36Sopenharmony_ci gpio0 = &gpio1; 2162306a36Sopenharmony_ci gpio1 = &gpio2; 2262306a36Sopenharmony_ci gpio2 = &gpio3; 2362306a36Sopenharmony_ci gpio3 = &gpio4; 2462306a36Sopenharmony_ci gpio4 = &gpio5; 2562306a36Sopenharmony_ci mmc0 = &usdhc1; 2662306a36Sopenharmony_ci serial0 = &lpuart1; 2762306a36Sopenharmony_ci }; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci memory@80000000 { 3062306a36Sopenharmony_ci device_type = "memory"; 3162306a36Sopenharmony_ci reg = <0x80000000 0x2000000>; 3262306a36Sopenharmony_ci }; 3362306a36Sopenharmony_ci}; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci&lpuart1 { 3662306a36Sopenharmony_ci pinctrl-names = "default"; 3762306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_lpuart1>; 3862306a36Sopenharmony_ci status = "okay"; 3962306a36Sopenharmony_ci}; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci&iomuxc { 4262306a36Sopenharmony_ci pinctrl-names = "default"; 4362306a36Sopenharmony_ci pinctrl_lpuart1: lpuart1grp { 4462306a36Sopenharmony_ci fsl,pins = < 4562306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0xf1 4662306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0xf1 4762306a36Sopenharmony_ci >; 4862306a36Sopenharmony_ci }; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci pinctrl_usdhc0: usdhc0grp { 5162306a36Sopenharmony_ci fsl,pins = < 5262306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1B000 5362306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0xB069 5462306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x17061 5562306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x17061 5662306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x17061 5762306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x17061 5862306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x17061 5962306a36Sopenharmony_ci MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x17061 6062306a36Sopenharmony_ci >; 6162306a36Sopenharmony_ci }; 6262306a36Sopenharmony_ci}; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci&usdhc1 { 6562306a36Sopenharmony_ci pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 6662306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_usdhc0>; 6762306a36Sopenharmony_ci pinctrl-1 = <&pinctrl_usdhc0>; 6862306a36Sopenharmony_ci pinctrl-2 = <&pinctrl_usdhc0>; 6962306a36Sopenharmony_ci pinctrl-3 = <&pinctrl_usdhc0>; 7062306a36Sopenharmony_ci cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; 7162306a36Sopenharmony_ci status = "okay"; 7262306a36Sopenharmony_ci}; 73