162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci// 362306a36Sopenharmony_ci// Copyright 2019 NXP 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci/dts-v1/; 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#include "imx7ulp.dtsi" 862306a36Sopenharmony_ci#include <dt-bindings/input/input.h> 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/ { 1162306a36Sopenharmony_ci model = "Embedded Artists i.MX7ULP COM"; 1262306a36Sopenharmony_ci compatible = "ea,imx7ulp-com", "fsl,imx7ulp"; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci chosen { 1562306a36Sopenharmony_ci stdout-path = &lpuart4; 1662306a36Sopenharmony_ci }; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci memory@60000000 { 1962306a36Sopenharmony_ci device_type = "memory"; 2062306a36Sopenharmony_ci reg = <0x60000000 0x4000000>; 2162306a36Sopenharmony_ci }; 2262306a36Sopenharmony_ci}; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci&lpuart4 { 2562306a36Sopenharmony_ci pinctrl-names = "default"; 2662306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_lpuart4>; 2762306a36Sopenharmony_ci status = "okay"; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci&usbotg1 { 3162306a36Sopenharmony_ci pinctrl-names = "default"; 3262306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_usbotg1_id>; 3362306a36Sopenharmony_ci srp-disable; 3462306a36Sopenharmony_ci hnp-disable; 3562306a36Sopenharmony_ci adp-disable; 3662306a36Sopenharmony_ci status = "okay"; 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci&usdhc0 { 4062306a36Sopenharmony_ci assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>; 4162306a36Sopenharmony_ci assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>; 4262306a36Sopenharmony_ci pinctrl-names = "default"; 4362306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_usdhc0>; 4462306a36Sopenharmony_ci non-removable; 4562306a36Sopenharmony_ci bus-width = <8>; 4662306a36Sopenharmony_ci no-1-8-v; 4762306a36Sopenharmony_ci status = "okay"; 4862306a36Sopenharmony_ci}; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci&iomuxc1 { 5162306a36Sopenharmony_ci pinctrl_lpuart4: lpuart4grp { 5262306a36Sopenharmony_ci fsl,pins = < 5362306a36Sopenharmony_ci IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 5462306a36Sopenharmony_ci IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 5562306a36Sopenharmony_ci >; 5662306a36Sopenharmony_ci }; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci pinctrl_usbotg1_id: otg1idgrp { 5962306a36Sopenharmony_ci fsl,pins = < 6062306a36Sopenharmony_ci IMX7ULP_PAD_PTC13__USB0_ID 0x10003 6162306a36Sopenharmony_ci >; 6262306a36Sopenharmony_ci }; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci pinctrl_usdhc0: usdhc0grp { 6562306a36Sopenharmony_ci fsl,pins = < 6662306a36Sopenharmony_ci IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 6762306a36Sopenharmony_ci IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 6862306a36Sopenharmony_ci IMX7ULP_PAD_PTD3__SDHC0_D7 0x43 6962306a36Sopenharmony_ci IMX7ULP_PAD_PTD4__SDHC0_D6 0x43 7062306a36Sopenharmony_ci IMX7ULP_PAD_PTD5__SDHC0_D5 0x43 7162306a36Sopenharmony_ci IMX7ULP_PAD_PTD6__SDHC0_D4 0x43 7262306a36Sopenharmony_ci IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 7362306a36Sopenharmony_ci IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 7462306a36Sopenharmony_ci IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 7562306a36Sopenharmony_ci IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 7662306a36Sopenharmony_ci IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42 7762306a36Sopenharmony_ci >; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci}; 80