162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 OR X11 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2016 TQ-Systems GmbH 662306a36Sopenharmony_ci * Author: Markus Niebel <Markus.Niebel@tq-group.com> 762306a36Sopenharmony_ci * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com> 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/ { 1162306a36Sopenharmony_ci memory@80000000 { 1262306a36Sopenharmony_ci device_type = "memory"; 1362306a36Sopenharmony_ci /* 512 MB - default configuration */ 1462306a36Sopenharmony_ci reg = <0x80000000 0x20000000>; 1562306a36Sopenharmony_ci }; 1662306a36Sopenharmony_ci}; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci&cpu0 { 1962306a36Sopenharmony_ci cpu-supply = <&sw1a_reg>; 2062306a36Sopenharmony_ci}; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci&gpio2 { 2362306a36Sopenharmony_ci /* Configured as pullup by QSPI pin group */ 2462306a36Sopenharmony_ci qspi-reset-hog { 2562306a36Sopenharmony_ci gpio-hog; 2662306a36Sopenharmony_ci gpios = <4 GPIO_ACTIVE_LOW>; 2762306a36Sopenharmony_ci input; 2862306a36Sopenharmony_ci line-name = "qspi-reset"; 2962306a36Sopenharmony_ci }; 3062306a36Sopenharmony_ci}; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci&i2c1 { 3362306a36Sopenharmony_ci pinctrl-names = "default"; 3462306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_i2c1>; 3562306a36Sopenharmony_ci clock-frequency = <100000>; 3662306a36Sopenharmony_ci status = "okay"; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci pfuze3000: pmic@8 { 3962306a36Sopenharmony_ci pinctrl-names = "default"; 4062306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_pmic1>; 4162306a36Sopenharmony_ci compatible = "fsl,pfuze3000"; 4262306a36Sopenharmony_ci reg = <0x08>; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci regulators { 4562306a36Sopenharmony_ci sw1a_reg: sw1a { 4662306a36Sopenharmony_ci regulator-min-microvolt = <700000>; 4762306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 4862306a36Sopenharmony_ci regulator-boot-on; 4962306a36Sopenharmony_ci regulator-always-on; 5062306a36Sopenharmony_ci regulator-ramp-delay = <6250>; 5162306a36Sopenharmony_ci }; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci /* use sw1c_reg to align with pfuze100/pfuze200 */ 5462306a36Sopenharmony_ci sw1c_reg: sw1b { 5562306a36Sopenharmony_ci regulator-min-microvolt = <700000>; 5662306a36Sopenharmony_ci regulator-max-microvolt = <1475000>; 5762306a36Sopenharmony_ci regulator-boot-on; 5862306a36Sopenharmony_ci regulator-always-on; 5962306a36Sopenharmony_ci regulator-ramp-delay = <6250>; 6062306a36Sopenharmony_ci }; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci sw2_reg: sw2 { 6362306a36Sopenharmony_ci regulator-min-microvolt = <1500000>; 6462306a36Sopenharmony_ci regulator-max-microvolt = <1850000>; 6562306a36Sopenharmony_ci regulator-boot-on; 6662306a36Sopenharmony_ci regulator-always-on; 6762306a36Sopenharmony_ci }; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci sw3a_reg: sw3 { 7062306a36Sopenharmony_ci regulator-min-microvolt = <900000>; 7162306a36Sopenharmony_ci regulator-max-microvolt = <1650000>; 7262306a36Sopenharmony_ci regulator-boot-on; 7362306a36Sopenharmony_ci regulator-always-on; 7462306a36Sopenharmony_ci }; 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci swbst_reg: swbst { 7762306a36Sopenharmony_ci regulator-min-microvolt = <5000000>; 7862306a36Sopenharmony_ci regulator-max-microvolt = <5150000>; 7962306a36Sopenharmony_ci }; 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci snvs_reg: vsnvs { 8262306a36Sopenharmony_ci regulator-min-microvolt = <1000000>; 8362306a36Sopenharmony_ci regulator-max-microvolt = <3000000>; 8462306a36Sopenharmony_ci regulator-boot-on; 8562306a36Sopenharmony_ci regulator-always-on; 8662306a36Sopenharmony_ci }; 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci vref_reg: vrefddr { 8962306a36Sopenharmony_ci regulator-boot-on; 9062306a36Sopenharmony_ci regulator-always-on; 9162306a36Sopenharmony_ci }; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci vgen1_reg: vldo1 { 9462306a36Sopenharmony_ci regulator-min-microvolt = <1800000>; 9562306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 9662306a36Sopenharmony_ci regulator-always-on; 9762306a36Sopenharmony_ci }; 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci vgen2_reg: vldo2 { 10062306a36Sopenharmony_ci regulator-min-microvolt = <800000>; 10162306a36Sopenharmony_ci regulator-max-microvolt = <1550000>; 10262306a36Sopenharmony_ci regulator-always-on; 10362306a36Sopenharmony_ci }; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci vgen3_reg: vccsd { 10662306a36Sopenharmony_ci regulator-min-microvolt = <2850000>; 10762306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 10862306a36Sopenharmony_ci regulator-always-on; 10962306a36Sopenharmony_ci }; 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci vgen4_reg: v33 { 11262306a36Sopenharmony_ci regulator-min-microvolt = <2850000>; 11362306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 11462306a36Sopenharmony_ci regulator-always-on; 11562306a36Sopenharmony_ci }; 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci vgen5_reg: vldo3 { 11862306a36Sopenharmony_ci regulator-min-microvolt = <1800000>; 11962306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 12062306a36Sopenharmony_ci regulator-always-on; 12162306a36Sopenharmony_ci }; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci vgen6_reg: vldo4 { 12462306a36Sopenharmony_ci regulator-min-microvolt = <1800000>; 12562306a36Sopenharmony_ci regulator-max-microvolt = <3300000>; 12662306a36Sopenharmony_ci regulator-always-on; 12762306a36Sopenharmony_ci }; 12862306a36Sopenharmony_ci }; 12962306a36Sopenharmony_ci }; 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci /* NXP SE97BTP with temperature sensor + eeprom */ 13262306a36Sopenharmony_ci se97b: temperature-sensor-eeprom@1e { 13362306a36Sopenharmony_ci compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 13462306a36Sopenharmony_ci reg = <0x1e>; 13562306a36Sopenharmony_ci status = "okay"; 13662306a36Sopenharmony_ci }; 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_ci /* ST M24C64 */ 13962306a36Sopenharmony_ci m24c64: eeprom@50 { 14062306a36Sopenharmony_ci compatible = "atmel,24c64"; 14162306a36Sopenharmony_ci reg = <0x50>; 14262306a36Sopenharmony_ci pagesize = <32>; 14362306a36Sopenharmony_ci status = "okay"; 14462306a36Sopenharmony_ci }; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci at24c02: eeprom@56 { 14762306a36Sopenharmony_ci compatible = "atmel,24c02"; 14862306a36Sopenharmony_ci reg = <0x56>; 14962306a36Sopenharmony_ci pagesize = <16>; 15062306a36Sopenharmony_ci status = "okay"; 15162306a36Sopenharmony_ci }; 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ci ds1339: rtc@68 { 15462306a36Sopenharmony_ci compatible = "dallas,ds1339"; 15562306a36Sopenharmony_ci reg = <0x68>; 15662306a36Sopenharmony_ci }; 15762306a36Sopenharmony_ci}; 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci&iomuxc { 16062306a36Sopenharmony_ci pinctrl_i2c1: i2c1grp { 16162306a36Sopenharmony_ci fsl,pins = < 16262306a36Sopenharmony_ci MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078 16362306a36Sopenharmony_ci MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078 16462306a36Sopenharmony_ci >; 16562306a36Sopenharmony_ci }; 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci pinctrl_pmic1: pmic1grp { 16862306a36Sopenharmony_ci fsl,pins = < 16962306a36Sopenharmony_ci MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C 17062306a36Sopenharmony_ci >; 17162306a36Sopenharmony_ci }; 17262306a36Sopenharmony_ci 17362306a36Sopenharmony_ci pinctrl_qspi: qspigrp { 17462306a36Sopenharmony_ci fsl,pins = < 17562306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A 17662306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A 17762306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A 17862306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A 17962306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11 18062306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54 18162306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54 18262306a36Sopenharmony_ci >; 18362306a36Sopenharmony_ci }; 18462306a36Sopenharmony_ci 18562306a36Sopenharmony_ci pinctrl_qspi_reset: qspi_resetgrp { 18662306a36Sopenharmony_ci fsl,pins = < 18762306a36Sopenharmony_ci /* #QSPI_RESET */ 18862306a36Sopenharmony_ci MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52 18962306a36Sopenharmony_ci >; 19062306a36Sopenharmony_ci }; 19162306a36Sopenharmony_ci 19262306a36Sopenharmony_ci pinctrl_usdhc3: usdhc3grp { 19362306a36Sopenharmony_ci fsl,pins = < 19462306a36Sopenharmony_ci MX7D_PAD_SD3_CMD__SD3_CMD 0x59 19562306a36Sopenharmony_ci MX7D_PAD_SD3_CLK__SD3_CLK 0x56 19662306a36Sopenharmony_ci MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 19762306a36Sopenharmony_ci MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 19862306a36Sopenharmony_ci MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 19962306a36Sopenharmony_ci MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 20062306a36Sopenharmony_ci MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 20162306a36Sopenharmony_ci MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 20262306a36Sopenharmony_ci MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 20362306a36Sopenharmony_ci MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 20462306a36Sopenharmony_ci MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 20562306a36Sopenharmony_ci >; 20662306a36Sopenharmony_ci }; 20762306a36Sopenharmony_ci 20862306a36Sopenharmony_ci pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { 20962306a36Sopenharmony_ci fsl,pins = < 21062306a36Sopenharmony_ci MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 21162306a36Sopenharmony_ci MX7D_PAD_SD3_CLK__SD3_CLK 0x51 21262306a36Sopenharmony_ci MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a 21362306a36Sopenharmony_ci MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a 21462306a36Sopenharmony_ci MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a 21562306a36Sopenharmony_ci MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a 21662306a36Sopenharmony_ci MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a 21762306a36Sopenharmony_ci MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a 21862306a36Sopenharmony_ci MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a 21962306a36Sopenharmony_ci MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a 22062306a36Sopenharmony_ci MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a 22162306a36Sopenharmony_ci >; 22262306a36Sopenharmony_ci }; 22362306a36Sopenharmony_ci 22462306a36Sopenharmony_ci pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { 22562306a36Sopenharmony_ci fsl,pins = < 22662306a36Sopenharmony_ci MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 22762306a36Sopenharmony_ci MX7D_PAD_SD3_CLK__SD3_CLK 0x51 22862306a36Sopenharmony_ci MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b 22962306a36Sopenharmony_ci MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b 23062306a36Sopenharmony_ci MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b 23162306a36Sopenharmony_ci MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b 23262306a36Sopenharmony_ci MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b 23362306a36Sopenharmony_ci MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b 23462306a36Sopenharmony_ci MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b 23562306a36Sopenharmony_ci MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b 23662306a36Sopenharmony_ci MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b 23762306a36Sopenharmony_ci >; 23862306a36Sopenharmony_ci }; 23962306a36Sopenharmony_ci}; 24062306a36Sopenharmony_ci 24162306a36Sopenharmony_ci&iomuxc_lpsr { 24262306a36Sopenharmony_ci pinctrl_wdog1: wdog1grp { 24362306a36Sopenharmony_ci fsl,pins = < 24462306a36Sopenharmony_ci MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 24562306a36Sopenharmony_ci >; 24662306a36Sopenharmony_ci }; 24762306a36Sopenharmony_ci}; 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci&qspi { 25062306a36Sopenharmony_ci pinctrl-names = "default"; 25162306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>; 25262306a36Sopenharmony_ci status = "okay"; 25362306a36Sopenharmony_ci 25462306a36Sopenharmony_ci flash0: flash@0 { 25562306a36Sopenharmony_ci compatible = "jedec,spi-nor"; 25662306a36Sopenharmony_ci reg = <0>; 25762306a36Sopenharmony_ci spi-max-frequency = <29000000>; 25862306a36Sopenharmony_ci spi-rx-bus-width = <4>; 25962306a36Sopenharmony_ci spi-tx-bus-width = <4>; 26062306a36Sopenharmony_ci }; 26162306a36Sopenharmony_ci}; 26262306a36Sopenharmony_ci 26362306a36Sopenharmony_ci&sdma { 26462306a36Sopenharmony_ci status = "okay"; 26562306a36Sopenharmony_ci}; 26662306a36Sopenharmony_ci 26762306a36Sopenharmony_ci&usdhc3 { 26862306a36Sopenharmony_ci pinctrl-names = "default", "state_100mhz", "state_200mhz"; 26962306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_usdhc3>; 27062306a36Sopenharmony_ci pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 27162306a36Sopenharmony_ci pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 27262306a36Sopenharmony_ci assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 27362306a36Sopenharmony_ci assigned-clock-rates = <400000000>; 27462306a36Sopenharmony_ci bus-width = <8>; 27562306a36Sopenharmony_ci non-removable; 27662306a36Sopenharmony_ci vmmc-supply = <&vgen4_reg>; 27762306a36Sopenharmony_ci vqmmc-supply = <&sw2_reg>; 27862306a36Sopenharmony_ci status = "okay"; 27962306a36Sopenharmony_ci}; 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ci&wdog1 { 28262306a36Sopenharmony_ci pinctrl-names = "default"; 28362306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_wdog1>; 28462306a36Sopenharmony_ci /* 28562306a36Sopenharmony_ci * Errata e10574: 28662306a36Sopenharmony_ci * WDOG reset needs to run with WDOG_RESET_B signal enabled. 28762306a36Sopenharmony_ci * X1-51 (WDOG1#) signal needs carrier board handling to reset 28862306a36Sopenharmony_ci * TQMa7 on X1-22 (RESET_IN#). 28962306a36Sopenharmony_ci */ 29062306a36Sopenharmony_ci fsl,ext-reset-output; 29162306a36Sopenharmony_ci status = "okay"; 29262306a36Sopenharmony_ci}; 293