162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2018-2022 TQ-Systems GmbH 462306a36Sopenharmony_ci * Author: Markus Niebel <Markus.Niebel@tq-group.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci/dts-v1/; 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include "imx6ul-tqma6ul1.dtsi" 1062306a36Sopenharmony_ci#include "mba6ulx.dtsi" 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/ { 1362306a36Sopenharmony_ci model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board"; 1462306a36Sopenharmony_ci compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul"; 1562306a36Sopenharmony_ci}; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci/* 1862306a36Sopenharmony_ci * Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage) 1962306a36Sopenharmony_ci * and need to be disabled here again 2062306a36Sopenharmony_ci */ 2162306a36Sopenharmony_ci&can2 { 2262306a36Sopenharmony_ci status = "disabled"; 2362306a36Sopenharmony_ci}; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci&fec1 { 2662306a36Sopenharmony_ci pinctrl-names = "default"; 2762306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>; 2862306a36Sopenharmony_ci status = "okay"; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci mdio { 3162306a36Sopenharmony_ci #address-cells = <1>; 3262306a36Sopenharmony_ci #size-cells = <0>; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci ethphy0: ethernet-phy@0 { 3562306a36Sopenharmony_ci compatible = "ethernet-phy-ieee802.3-c22"; 3662306a36Sopenharmony_ci max-speed = <100>; 3762306a36Sopenharmony_ci reg = <0>; 3862306a36Sopenharmony_ci }; 3962306a36Sopenharmony_ci }; 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci&fec2 { 4362306a36Sopenharmony_ci /delete-property/ phy-handle; 4462306a36Sopenharmony_ci /delete-node/ mdio; 4562306a36Sopenharmony_ci}; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci&iomuxc { 4862306a36Sopenharmony_ci pinctrl_enet1_mdc: enet1mdcgrp { 4962306a36Sopenharmony_ci fsl,pins = < 5062306a36Sopenharmony_ci /* mdio */ 5162306a36Sopenharmony_ci MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 5262306a36Sopenharmony_ci MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 5362306a36Sopenharmony_ci >; 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci}; 56