xref: /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/arm/nxp/imx/imx6qp-sabreauto.dts

// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.

/dts-v1/;

#include "imx6qp.dtsi"
#include "imx6qdl-sabreauto.dtsi"

/ {
	model = "Freescale i.MX6 Quad Plus SABRE Automotive Board";
	compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp";
};

&i2c2 {
	max7322: gpio@68 {
		compatible = "maxim,max7322";
		reg = <0x68>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&iomuxc {
	imx6qdl-sabreauto {
		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
				MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b018
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b018
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b018
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b018
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b018
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b018
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b018
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b018
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b018
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b018
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b018
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b018
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
			>;
		};
	};
};

&pcie {
	reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&sata {
	status = "okay";
};

&vgen3_reg {
	regulator-always-on;
};