162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ OR MIT 262306a36Sopenharmony_ci// 362306a36Sopenharmony_ci// Copyright 2017 NXP 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#include "imx6qdl-pico.dtsi" 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci/ { 862306a36Sopenharmony_ci leds { 962306a36Sopenharmony_ci compatible = "gpio-leds"; 1062306a36Sopenharmony_ci pinctrl-names = "default"; 1162306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_gpio_leds>; 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci led { 1462306a36Sopenharmony_ci label = "gpio-led"; 1562306a36Sopenharmony_ci gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; 1662306a36Sopenharmony_ci }; 1762306a36Sopenharmony_ci }; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci&hdmi { 2262306a36Sopenharmony_ci status = "disabled"; 2362306a36Sopenharmony_ci}; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci&iomuxc { 2662306a36Sopenharmony_ci pinctrl_gpio_leds: gpioledsgrp { 2762306a36Sopenharmony_ci fsl,pins = < 2862306a36Sopenharmony_ci MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 2962306a36Sopenharmony_ci >; 3062306a36Sopenharmony_ci }; 3162306a36Sopenharmony_ci}; 32