162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2014 Protonic Holland
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/dts-v1/;
762306a36Sopenharmony_ci#include "imx6dl.dtsi"
862306a36Sopenharmony_ci#include "imx6qdl-prti6q.dtsi"
962306a36Sopenharmony_ci#include <dt-bindings/leds/common.h>
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/ {
1262306a36Sopenharmony_ci	model = "Protonic RVT board";
1362306a36Sopenharmony_ci	compatible = "prt,prtrvt", "fsl,imx6dl";
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci	memory@10000000 {
1662306a36Sopenharmony_ci		device_type = "memory";
1762306a36Sopenharmony_ci		reg = <0x10000000 0x10000000>;
1862306a36Sopenharmony_ci	};
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci	leds {
2162306a36Sopenharmony_ci		compatible = "gpio-leds";
2262306a36Sopenharmony_ci		pinctrl-names = "default";
2362306a36Sopenharmony_ci		pinctrl-0 = <&pinctrl_leds>;
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci		led-debug0 {
2662306a36Sopenharmony_ci			function = LED_FUNCTION_STATUS;
2762306a36Sopenharmony_ci			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
2862306a36Sopenharmony_ci			linux,default-trigger = "heartbeat";
2962306a36Sopenharmony_ci		};
3062306a36Sopenharmony_ci	};
3162306a36Sopenharmony_ci};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci&can1 {
3462306a36Sopenharmony_ci	pinctrl-names = "default";
3562306a36Sopenharmony_ci	pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
3662306a36Sopenharmony_ci	status = "okay";
3762306a36Sopenharmony_ci};
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci&ecspi1 {
4062306a36Sopenharmony_ci	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
4162306a36Sopenharmony_ci	pinctrl-names = "default";
4262306a36Sopenharmony_ci	pinctrl-0 = <&pinctrl_ecspi1>;
4362306a36Sopenharmony_ci	status = "okay";
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci	flash@0 {
4662306a36Sopenharmony_ci		compatible = "jedec,spi-nor";
4762306a36Sopenharmony_ci		reg = <0>;
4862306a36Sopenharmony_ci		spi-max-frequency = <20000000>;
4962306a36Sopenharmony_ci		#address-cells = <1>;
5062306a36Sopenharmony_ci		#size-cells = <1>;
5162306a36Sopenharmony_ci	};
5262306a36Sopenharmony_ci};
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci&ecspi3 {
5562306a36Sopenharmony_ci	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
5662306a36Sopenharmony_ci	pinctrl-names = "default";
5762306a36Sopenharmony_ci	pinctrl-0 = <&pinctrl_ecspi3>;
5862306a36Sopenharmony_ci	status = "okay";
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci	nfc@0 {
6162306a36Sopenharmony_ci		compatible = "ti,trf7970a";
6262306a36Sopenharmony_ci		reg = <0>;
6362306a36Sopenharmony_ci		pinctrl-names = "default";
6462306a36Sopenharmony_ci		pinctrl-0 = <&pinctrl_nfc>;
6562306a36Sopenharmony_ci		spi-max-frequency = <2000000>;
6662306a36Sopenharmony_ci		interrupts-extended = <&gpio5 14 IRQ_TYPE_LEVEL_LOW>;
6762306a36Sopenharmony_ci		ti,enable-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>,
6862306a36Sopenharmony_ci				  <&gpio5 11 GPIO_ACTIVE_LOW>;
6962306a36Sopenharmony_ci		vin-supply = <&reg_3v3>;
7062306a36Sopenharmony_ci		autosuspend-delay = <30000>;
7162306a36Sopenharmony_ci		irq-status-read-quirk;
7262306a36Sopenharmony_ci		en2-rf-quirk;
7362306a36Sopenharmony_ci		status = "okay";
7462306a36Sopenharmony_ci	};
7562306a36Sopenharmony_ci};
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci&i2c3 {
7862306a36Sopenharmony_ci	adc@49 {
7962306a36Sopenharmony_ci		compatible = "ti,ads1015";
8062306a36Sopenharmony_ci		reg = <0x49>;
8162306a36Sopenharmony_ci		#address-cells = <1>;
8262306a36Sopenharmony_ci		#size-cells = <0>;
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci		/* nc */
8562306a36Sopenharmony_ci		channel@4 {
8662306a36Sopenharmony_ci			reg = <4>;
8762306a36Sopenharmony_ci			ti,gain = <3>;
8862306a36Sopenharmony_ci			ti,datarate = <3>;
8962306a36Sopenharmony_ci		};
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci		/* nc */
9262306a36Sopenharmony_ci		channel@5 {
9362306a36Sopenharmony_ci			reg = <5>;
9462306a36Sopenharmony_ci			ti,gain = <3>;
9562306a36Sopenharmony_ci			ti,datarate = <3>;
9662306a36Sopenharmony_ci		};
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci		/* can1_l */
9962306a36Sopenharmony_ci		channel@6 {
10062306a36Sopenharmony_ci			reg = <6>;
10162306a36Sopenharmony_ci			ti,gain = <3>;
10262306a36Sopenharmony_ci			ti,datarate = <3>;
10362306a36Sopenharmony_ci		};
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci		/* can1_h */
10662306a36Sopenharmony_ci		channel@7 {
10762306a36Sopenharmony_ci			reg = <7>;
10862306a36Sopenharmony_ci			ti,gain = <3>;
10962306a36Sopenharmony_ci			ti,datarate = <3>;
11062306a36Sopenharmony_ci		};
11162306a36Sopenharmony_ci	};
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci	rtc@51 {
11462306a36Sopenharmony_ci		compatible = "nxp,pcf8563";
11562306a36Sopenharmony_ci		reg = <0x51>;
11662306a36Sopenharmony_ci	};
11762306a36Sopenharmony_ci};
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ci&pcie {
12062306a36Sopenharmony_ci	status = "okay";
12162306a36Sopenharmony_ci};
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci&usbh1 {
12462306a36Sopenharmony_ci	status = "disabled";
12562306a36Sopenharmony_ci};
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_ci&usbotg {
12862306a36Sopenharmony_ci	disable-over-current;
12962306a36Sopenharmony_ci};
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_ci&vpu {
13262306a36Sopenharmony_ci	status = "disabled";
13362306a36Sopenharmony_ci};
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci&iomuxc {
13662306a36Sopenharmony_ci	pinctrl_can1phy: can1phy {
13762306a36Sopenharmony_ci		fsl,pins = <
13862306a36Sopenharmony_ci			/* CAN1_SR */
13962306a36Sopenharmony_ci			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x13070
14062306a36Sopenharmony_ci			/* CAN1_TERM */
14162306a36Sopenharmony_ci			MX6QDL_PAD_GPIO_0__GPIO1_IO00	0x1b0b0
14262306a36Sopenharmony_ci		>;
14362306a36Sopenharmony_ci	};
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci	pinctrl_ecspi1: ecspi1grp {
14662306a36Sopenharmony_ci		fsl,pins = <
14762306a36Sopenharmony_ci			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
14862306a36Sopenharmony_ci			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
14962306a36Sopenharmony_ci			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
15062306a36Sopenharmony_ci			/* CS */
15162306a36Sopenharmony_ci			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
15262306a36Sopenharmony_ci		>;
15362306a36Sopenharmony_ci	};
15462306a36Sopenharmony_ci
15562306a36Sopenharmony_ci	pinctrl_ecspi3: ecspi3grp {
15662306a36Sopenharmony_ci		fsl,pins = <
15762306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
15862306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
15962306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
16062306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x000b1
16162306a36Sopenharmony_ci		>;
16262306a36Sopenharmony_ci	};
16362306a36Sopenharmony_ci
16462306a36Sopenharmony_ci	pinctrl_leds: ledsgrp {
16562306a36Sopenharmony_ci		fsl,pins = <
16662306a36Sopenharmony_ci			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x1b0b0
16762306a36Sopenharmony_ci		>;
16862306a36Sopenharmony_ci	};
16962306a36Sopenharmony_ci
17062306a36Sopenharmony_ci	pinctrl_nfc: nfcgrp {
17162306a36Sopenharmony_ci		fsl,pins = <
17262306a36Sopenharmony_ci			/* NFC_ASK_OOK */
17362306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x100b1
17462306a36Sopenharmony_ci			/* NFC_PWR_EN */
17562306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10	0x100b1
17662306a36Sopenharmony_ci			/* NFC_EN2 */
17762306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	0x100b1
17862306a36Sopenharmony_ci			/* NFC_EN */
17962306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x100b1
18062306a36Sopenharmony_ci			/* NFC_MOD */
18162306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x100b1
18262306a36Sopenharmony_ci			/* NFC_IRQ */
18362306a36Sopenharmony_ci			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x100b1
18462306a36Sopenharmony_ci		>;
18562306a36Sopenharmony_ci	};
18662306a36Sopenharmony_ci};
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