162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2012 Armadeus Systems - <support@armadeus.com> 462306a36Sopenharmony_ci * Copyright 2012 Laurent Cans <laurent.cans@gmail.com> 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Based on mx51-babbage.dts 762306a36Sopenharmony_ci * Copyright 2011 Freescale Semiconductor, Inc. 862306a36Sopenharmony_ci * Copyright 2011 Linaro Ltd. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/dts-v1/; 1262306a36Sopenharmony_ci#include "imx51.dtsi" 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/ { 1562306a36Sopenharmony_ci model = "Armadeus Systems APF51 module"; 1662306a36Sopenharmony_ci compatible = "armadeus,imx51-apf51", "fsl,imx51"; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci memory@90000000 { 1962306a36Sopenharmony_ci device_type = "memory"; 2062306a36Sopenharmony_ci reg = <0x90000000 0x20000000>; 2162306a36Sopenharmony_ci }; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci clocks { 2462306a36Sopenharmony_ci osc { 2562306a36Sopenharmony_ci clock-frequency = <33554432>; 2662306a36Sopenharmony_ci }; 2762306a36Sopenharmony_ci }; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci&fec { 3162306a36Sopenharmony_ci pinctrl-names = "default"; 3262306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_fec>; 3362306a36Sopenharmony_ci phy-mode = "mii"; 3462306a36Sopenharmony_ci phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; 3562306a36Sopenharmony_ci phy-reset-duration = <1>; 3662306a36Sopenharmony_ci status = "okay"; 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci&iomuxc { 4062306a36Sopenharmony_ci imx51-apf51 { 4162306a36Sopenharmony_ci pinctrl_fec: fecgrp { 4262306a36Sopenharmony_ci fsl,pins = < 4362306a36Sopenharmony_ci MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000 4462306a36Sopenharmony_ci MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000 4562306a36Sopenharmony_ci MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000 4662306a36Sopenharmony_ci MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000 4762306a36Sopenharmony_ci MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000 4862306a36Sopenharmony_ci MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000 4962306a36Sopenharmony_ci MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000 5062306a36Sopenharmony_ci MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000 5162306a36Sopenharmony_ci MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000 5262306a36Sopenharmony_ci MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000 5362306a36Sopenharmony_ci MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000 5462306a36Sopenharmony_ci MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000 5562306a36Sopenharmony_ci MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000 5662306a36Sopenharmony_ci MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000 5762306a36Sopenharmony_ci MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000 5862306a36Sopenharmony_ci MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000 5962306a36Sopenharmony_ci MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000 6062306a36Sopenharmony_ci MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000 6162306a36Sopenharmony_ci >; 6262306a36Sopenharmony_ci }; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci pinctrl_uart3: uart3grp { 6562306a36Sopenharmony_ci fsl,pins = < 6662306a36Sopenharmony_ci MX51_PAD_UART3_RXD__UART3_RXD 0x1c5 6762306a36Sopenharmony_ci MX51_PAD_UART3_TXD__UART3_TXD 0x1c5 6862306a36Sopenharmony_ci >; 6962306a36Sopenharmony_ci }; 7062306a36Sopenharmony_ci }; 7162306a36Sopenharmony_ci}; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci&nfc { 7462306a36Sopenharmony_ci nand-bus-width = <8>; 7562306a36Sopenharmony_ci nand-ecc-mode = "hw"; 7662306a36Sopenharmony_ci nand-on-flash-bbt; 7762306a36Sopenharmony_ci status = "okay"; 7862306a36Sopenharmony_ci}; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci&uart3 { 8162306a36Sopenharmony_ci pinctrl-names = "default"; 8262306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_uart3>; 8362306a36Sopenharmony_ci status = "okay"; 8462306a36Sopenharmony_ci}; 85