162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright 2022 Broadcom Ltd.
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/arm-gic.h>
762306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/irq.h>
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci/ {
1062306a36Sopenharmony_ci	compatible = "brcm,bcm63178", "brcm,bcmbca";
1162306a36Sopenharmony_ci	#address-cells = <1>;
1262306a36Sopenharmony_ci	#size-cells = <1>;
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci	interrupt-parent = <&gic>;
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci	cpus {
1762306a36Sopenharmony_ci		#address-cells = <1>;
1862306a36Sopenharmony_ci		#size-cells = <0>;
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci		CA7_0: cpu@0 {
2162306a36Sopenharmony_ci			device_type = "cpu";
2262306a36Sopenharmony_ci			compatible = "arm,cortex-a7";
2362306a36Sopenharmony_ci			reg = <0x0>;
2462306a36Sopenharmony_ci			next-level-cache = <&L2_0>;
2562306a36Sopenharmony_ci			enable-method = "psci";
2662306a36Sopenharmony_ci		};
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci		CA7_1: cpu@1 {
2962306a36Sopenharmony_ci			device_type = "cpu";
3062306a36Sopenharmony_ci			compatible = "arm,cortex-a7";
3162306a36Sopenharmony_ci			reg = <0x1>;
3262306a36Sopenharmony_ci			next-level-cache = <&L2_0>;
3362306a36Sopenharmony_ci			enable-method = "psci";
3462306a36Sopenharmony_ci		};
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci		CA7_2: cpu@2 {
3762306a36Sopenharmony_ci			device_type = "cpu";
3862306a36Sopenharmony_ci			compatible = "arm,cortex-a7";
3962306a36Sopenharmony_ci			reg = <0x2>;
4062306a36Sopenharmony_ci			next-level-cache = <&L2_0>;
4162306a36Sopenharmony_ci			enable-method = "psci";
4262306a36Sopenharmony_ci		};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci		L2_0: l2-cache0 {
4562306a36Sopenharmony_ci			compatible = "cache";
4662306a36Sopenharmony_ci			cache-level = <2>;
4762306a36Sopenharmony_ci			cache-unified;
4862306a36Sopenharmony_ci		};
4962306a36Sopenharmony_ci	};
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci	timer {
5262306a36Sopenharmony_ci		compatible = "arm,armv7-timer";
5362306a36Sopenharmony_ci		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
5462306a36Sopenharmony_ci			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
5562306a36Sopenharmony_ci			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
5662306a36Sopenharmony_ci			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>;
5762306a36Sopenharmony_ci		arm,cpu-registers-not-fw-configured;
5862306a36Sopenharmony_ci	};
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci	pmu: pmu {
6162306a36Sopenharmony_ci		compatible = "arm,cortex-a7-pmu";
6262306a36Sopenharmony_ci		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
6362306a36Sopenharmony_ci			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
6462306a36Sopenharmony_ci			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
6562306a36Sopenharmony_ci		interrupt-affinity = <&CA7_0>, <&CA7_1>,
6662306a36Sopenharmony_ci			<&CA7_2>;
6762306a36Sopenharmony_ci	};
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci	clocks: clocks {
7062306a36Sopenharmony_ci		periph_clk: periph-clk {
7162306a36Sopenharmony_ci			compatible = "fixed-clock";
7262306a36Sopenharmony_ci			#clock-cells = <0>;
7362306a36Sopenharmony_ci			clock-frequency = <200000000>;
7462306a36Sopenharmony_ci		};
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci		uart_clk: uart-clk {
7762306a36Sopenharmony_ci			compatible = "fixed-factor-clock";
7862306a36Sopenharmony_ci			#clock-cells = <0>;
7962306a36Sopenharmony_ci			clocks = <&periph_clk>;
8062306a36Sopenharmony_ci			clock-div = <4>;
8162306a36Sopenharmony_ci			clock-mult = <1>;
8262306a36Sopenharmony_ci		};
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci		hsspi_pll: hsspi-pll {
8562306a36Sopenharmony_ci			compatible = "fixed-clock";
8662306a36Sopenharmony_ci			#clock-cells = <0>;
8762306a36Sopenharmony_ci			clock-frequency = <200000000>;
8862306a36Sopenharmony_ci		};
8962306a36Sopenharmony_ci	};
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci	psci {
9262306a36Sopenharmony_ci		compatible = "arm,psci-0.2";
9362306a36Sopenharmony_ci		method = "smc";
9462306a36Sopenharmony_ci	};
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci	axi@81000000 {
9762306a36Sopenharmony_ci		compatible = "simple-bus";
9862306a36Sopenharmony_ci		#address-cells = <1>;
9962306a36Sopenharmony_ci		#size-cells = <1>;
10062306a36Sopenharmony_ci		ranges = <0 0x81000000 0x8000>;
10162306a36Sopenharmony_ci
10262306a36Sopenharmony_ci		gic: interrupt-controller@1000 {
10362306a36Sopenharmony_ci			compatible = "arm,cortex-a7-gic";
10462306a36Sopenharmony_ci			#interrupt-cells = <3>;
10562306a36Sopenharmony_ci			interrupt-controller;
10662306a36Sopenharmony_ci			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>;
10762306a36Sopenharmony_ci			reg = <0x1000 0x1000>,
10862306a36Sopenharmony_ci				<0x2000 0x2000>,
10962306a36Sopenharmony_ci				<0x4000 0x2000>,
11062306a36Sopenharmony_ci				<0x6000 0x2000>;
11162306a36Sopenharmony_ci		};
11262306a36Sopenharmony_ci	};
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ci	bus@ff800000 {
11562306a36Sopenharmony_ci		compatible = "simple-bus";
11662306a36Sopenharmony_ci		#address-cells = <1>;
11762306a36Sopenharmony_ci		#size-cells = <1>;
11862306a36Sopenharmony_ci		ranges = <0 0xff800000 0x800000>;
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci		hsspi: spi@1000 {
12162306a36Sopenharmony_ci			#address-cells = <1>;
12262306a36Sopenharmony_ci			#size-cells = <0>;
12362306a36Sopenharmony_ci			compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0";
12462306a36Sopenharmony_ci			reg = <0x1000 0x600>;
12562306a36Sopenharmony_ci			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
12662306a36Sopenharmony_ci			clocks = <&hsspi_pll &hsspi_pll>;
12762306a36Sopenharmony_ci			clock-names = "hsspi", "pll";
12862306a36Sopenharmony_ci			num-cs = <8>;
12962306a36Sopenharmony_ci			status = "disabled";
13062306a36Sopenharmony_ci		};
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci		uart0: serial@12000 {
13362306a36Sopenharmony_ci			compatible = "arm,pl011", "arm,primecell";
13462306a36Sopenharmony_ci			reg = <0x12000 0x1000>;
13562306a36Sopenharmony_ci			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
13662306a36Sopenharmony_ci			clocks = <&uart_clk>, <&uart_clk>;
13762306a36Sopenharmony_ci			clock-names = "uartclk", "apb_pclk";
13862306a36Sopenharmony_ci			status = "disabled";
13962306a36Sopenharmony_ci		};
14062306a36Sopenharmony_ci	};
14162306a36Sopenharmony_ci};
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