162306a36Sopenharmony_ci/* SPDX-License-Identifier: MIT */
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci#ifndef __XEN_PUBLIC_PHYSDEV_H__
462306a36Sopenharmony_ci#define __XEN_PUBLIC_PHYSDEV_H__
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/*
762306a36Sopenharmony_ci * Prototype for this hypercall is:
862306a36Sopenharmony_ci *  int physdev_op(int cmd, void *args)
962306a36Sopenharmony_ci * @cmd	 == PHYSDEVOP_??? (physdev operation).
1062306a36Sopenharmony_ci * @args == Operation-specific extra arguments (NULL if none).
1162306a36Sopenharmony_ci */
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci/*
1462306a36Sopenharmony_ci * Notify end-of-interrupt (EOI) for the specified IRQ.
1562306a36Sopenharmony_ci * @arg == pointer to physdev_eoi structure.
1662306a36Sopenharmony_ci */
1762306a36Sopenharmony_ci#define PHYSDEVOP_eoi			12
1862306a36Sopenharmony_cistruct physdev_eoi {
1962306a36Sopenharmony_ci	/* IN */
2062306a36Sopenharmony_ci	uint32_t irq;
2162306a36Sopenharmony_ci};
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci/*
2462306a36Sopenharmony_ci * Register a shared page for the hypervisor to indicate whether the guest
2562306a36Sopenharmony_ci * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly
2662306a36Sopenharmony_ci * once the guest used this function in that the associated event channel
2762306a36Sopenharmony_ci * will automatically get unmasked. The page registered is used as a bit
2862306a36Sopenharmony_ci * array indexed by Xen's PIRQ value.
2962306a36Sopenharmony_ci */
3062306a36Sopenharmony_ci#define PHYSDEVOP_pirq_eoi_gmfn_v1       17
3162306a36Sopenharmony_ci/*
3262306a36Sopenharmony_ci * Register a shared page for the hypervisor to indicate whether the
3362306a36Sopenharmony_ci * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to
3462306a36Sopenharmony_ci * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of
3562306a36Sopenharmony_ci * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by
3662306a36Sopenharmony_ci * Xen's PIRQ value.
3762306a36Sopenharmony_ci */
3862306a36Sopenharmony_ci#define PHYSDEVOP_pirq_eoi_gmfn_v2       28
3962306a36Sopenharmony_cistruct physdev_pirq_eoi_gmfn {
4062306a36Sopenharmony_ci    /* IN */
4162306a36Sopenharmony_ci    xen_ulong_t gmfn;
4262306a36Sopenharmony_ci};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci/*
4562306a36Sopenharmony_ci * Query the status of an IRQ line.
4662306a36Sopenharmony_ci * @arg == pointer to physdev_irq_status_query structure.
4762306a36Sopenharmony_ci */
4862306a36Sopenharmony_ci#define PHYSDEVOP_irq_status_query	 5
4962306a36Sopenharmony_cistruct physdev_irq_status_query {
5062306a36Sopenharmony_ci	/* IN */
5162306a36Sopenharmony_ci	uint32_t irq;
5262306a36Sopenharmony_ci	/* OUT */
5362306a36Sopenharmony_ci	uint32_t flags; /* XENIRQSTAT_* */
5462306a36Sopenharmony_ci};
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci/* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */
5762306a36Sopenharmony_ci#define _XENIRQSTAT_needs_eoi	(0)
5862306a36Sopenharmony_ci#define	 XENIRQSTAT_needs_eoi	(1U<<_XENIRQSTAT_needs_eoi)
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci/* IRQ shared by multiple guests? */
6162306a36Sopenharmony_ci#define _XENIRQSTAT_shared	(1)
6262306a36Sopenharmony_ci#define	 XENIRQSTAT_shared	(1U<<_XENIRQSTAT_shared)
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci/*
6562306a36Sopenharmony_ci * Set the current VCPU's I/O privilege level.
6662306a36Sopenharmony_ci * @arg == pointer to physdev_set_iopl structure.
6762306a36Sopenharmony_ci */
6862306a36Sopenharmony_ci#define PHYSDEVOP_set_iopl		 6
6962306a36Sopenharmony_cistruct physdev_set_iopl {
7062306a36Sopenharmony_ci	/* IN */
7162306a36Sopenharmony_ci	uint32_t iopl;
7262306a36Sopenharmony_ci};
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci/*
7562306a36Sopenharmony_ci * Set the current VCPU's I/O-port permissions bitmap.
7662306a36Sopenharmony_ci * @arg == pointer to physdev_set_iobitmap structure.
7762306a36Sopenharmony_ci */
7862306a36Sopenharmony_ci#define PHYSDEVOP_set_iobitmap		 7
7962306a36Sopenharmony_cistruct physdev_set_iobitmap {
8062306a36Sopenharmony_ci	/* IN */
8162306a36Sopenharmony_ci	uint8_t * bitmap;
8262306a36Sopenharmony_ci	uint32_t nr_ports;
8362306a36Sopenharmony_ci};
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci/*
8662306a36Sopenharmony_ci * Read or write an IO-APIC register.
8762306a36Sopenharmony_ci * @arg == pointer to physdev_apic structure.
8862306a36Sopenharmony_ci */
8962306a36Sopenharmony_ci#define PHYSDEVOP_apic_read		 8
9062306a36Sopenharmony_ci#define PHYSDEVOP_apic_write		 9
9162306a36Sopenharmony_cistruct physdev_apic {
9262306a36Sopenharmony_ci	/* IN */
9362306a36Sopenharmony_ci	unsigned long apic_physbase;
9462306a36Sopenharmony_ci	uint32_t reg;
9562306a36Sopenharmony_ci	/* IN or OUT */
9662306a36Sopenharmony_ci	uint32_t value;
9762306a36Sopenharmony_ci};
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci/*
10062306a36Sopenharmony_ci * Allocate or free a physical upcall vector for the specified IRQ line.
10162306a36Sopenharmony_ci * @arg == pointer to physdev_irq structure.
10262306a36Sopenharmony_ci */
10362306a36Sopenharmony_ci#define PHYSDEVOP_alloc_irq_vector	10
10462306a36Sopenharmony_ci#define PHYSDEVOP_free_irq_vector	11
10562306a36Sopenharmony_cistruct physdev_irq {
10662306a36Sopenharmony_ci	/* IN */
10762306a36Sopenharmony_ci	uint32_t irq;
10862306a36Sopenharmony_ci	/* IN or OUT */
10962306a36Sopenharmony_ci	uint32_t vector;
11062306a36Sopenharmony_ci};
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci#define MAP_PIRQ_TYPE_MSI		0x0
11362306a36Sopenharmony_ci#define MAP_PIRQ_TYPE_GSI		0x1
11462306a36Sopenharmony_ci#define MAP_PIRQ_TYPE_UNKNOWN		0x2
11562306a36Sopenharmony_ci#define MAP_PIRQ_TYPE_MSI_SEG		0x3
11662306a36Sopenharmony_ci#define MAP_PIRQ_TYPE_MULTI_MSI		0x4
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_ci#define PHYSDEVOP_map_pirq		13
11962306a36Sopenharmony_cistruct physdev_map_pirq {
12062306a36Sopenharmony_ci    domid_t domid;
12162306a36Sopenharmony_ci    /* IN */
12262306a36Sopenharmony_ci    int type;
12362306a36Sopenharmony_ci    /* IN */
12462306a36Sopenharmony_ci    int index;
12562306a36Sopenharmony_ci    /* IN or OUT */
12662306a36Sopenharmony_ci    int pirq;
12762306a36Sopenharmony_ci    /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */
12862306a36Sopenharmony_ci    int bus;
12962306a36Sopenharmony_ci    /* IN */
13062306a36Sopenharmony_ci    int devfn;
13162306a36Sopenharmony_ci    /* IN
13262306a36Sopenharmony_ci     * - For MSI-X contains entry number.
13362306a36Sopenharmony_ci     * - For MSI with ..._MULTI_MSI contains number of vectors.
13462306a36Sopenharmony_ci     * OUT (..._MULTI_MSI only)
13562306a36Sopenharmony_ci     * - Number of vectors allocated.
13662306a36Sopenharmony_ci     */
13762306a36Sopenharmony_ci    int entry_nr;
13862306a36Sopenharmony_ci    /* IN */
13962306a36Sopenharmony_ci    uint64_t table_base;
14062306a36Sopenharmony_ci};
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci#define PHYSDEVOP_unmap_pirq		14
14362306a36Sopenharmony_cistruct physdev_unmap_pirq {
14462306a36Sopenharmony_ci    domid_t domid;
14562306a36Sopenharmony_ci    /* IN */
14662306a36Sopenharmony_ci    int pirq;
14762306a36Sopenharmony_ci};
14862306a36Sopenharmony_ci
14962306a36Sopenharmony_ci#define PHYSDEVOP_manage_pci_add	15
15062306a36Sopenharmony_ci#define PHYSDEVOP_manage_pci_remove	16
15162306a36Sopenharmony_cistruct physdev_manage_pci {
15262306a36Sopenharmony_ci	/* IN */
15362306a36Sopenharmony_ci	uint8_t bus;
15462306a36Sopenharmony_ci	uint8_t devfn;
15562306a36Sopenharmony_ci};
15662306a36Sopenharmony_ci
15762306a36Sopenharmony_ci#define PHYSDEVOP_restore_msi            19
15862306a36Sopenharmony_cistruct physdev_restore_msi {
15962306a36Sopenharmony_ci	/* IN */
16062306a36Sopenharmony_ci	uint8_t bus;
16162306a36Sopenharmony_ci	uint8_t devfn;
16262306a36Sopenharmony_ci};
16362306a36Sopenharmony_ci
16462306a36Sopenharmony_ci#define PHYSDEVOP_manage_pci_add_ext	20
16562306a36Sopenharmony_cistruct physdev_manage_pci_ext {
16662306a36Sopenharmony_ci	/* IN */
16762306a36Sopenharmony_ci	uint8_t bus;
16862306a36Sopenharmony_ci	uint8_t devfn;
16962306a36Sopenharmony_ci	unsigned is_extfn;
17062306a36Sopenharmony_ci	unsigned is_virtfn;
17162306a36Sopenharmony_ci	struct {
17262306a36Sopenharmony_ci		uint8_t bus;
17362306a36Sopenharmony_ci		uint8_t devfn;
17462306a36Sopenharmony_ci	} physfn;
17562306a36Sopenharmony_ci};
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci/*
17862306a36Sopenharmony_ci * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op()
17962306a36Sopenharmony_ci * hypercall since 0x00030202.
18062306a36Sopenharmony_ci */
18162306a36Sopenharmony_cistruct physdev_op {
18262306a36Sopenharmony_ci	uint32_t cmd;
18362306a36Sopenharmony_ci	union {
18462306a36Sopenharmony_ci		struct physdev_irq_status_query	     irq_status_query;
18562306a36Sopenharmony_ci		struct physdev_set_iopl		     set_iopl;
18662306a36Sopenharmony_ci		struct physdev_set_iobitmap	     set_iobitmap;
18762306a36Sopenharmony_ci		struct physdev_apic		     apic_op;
18862306a36Sopenharmony_ci		struct physdev_irq		     irq_op;
18962306a36Sopenharmony_ci	} u;
19062306a36Sopenharmony_ci};
19162306a36Sopenharmony_ci
19262306a36Sopenharmony_ci#define PHYSDEVOP_setup_gsi    21
19362306a36Sopenharmony_cistruct physdev_setup_gsi {
19462306a36Sopenharmony_ci    int gsi;
19562306a36Sopenharmony_ci    /* IN */
19662306a36Sopenharmony_ci    uint8_t triggering;
19762306a36Sopenharmony_ci    /* IN */
19862306a36Sopenharmony_ci    uint8_t polarity;
19962306a36Sopenharmony_ci    /* IN */
20062306a36Sopenharmony_ci};
20162306a36Sopenharmony_ci
20262306a36Sopenharmony_ci#define PHYSDEVOP_get_nr_pirqs    22
20362306a36Sopenharmony_cistruct physdev_nr_pirqs {
20462306a36Sopenharmony_ci    /* OUT */
20562306a36Sopenharmony_ci    uint32_t nr_pirqs;
20662306a36Sopenharmony_ci};
20762306a36Sopenharmony_ci
20862306a36Sopenharmony_ci/* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI
20962306a36Sopenharmony_ci * the hypercall returns a free pirq */
21062306a36Sopenharmony_ci#define PHYSDEVOP_get_free_pirq    23
21162306a36Sopenharmony_cistruct physdev_get_free_pirq {
21262306a36Sopenharmony_ci    /* IN */
21362306a36Sopenharmony_ci    int type;
21462306a36Sopenharmony_ci    /* OUT */
21562306a36Sopenharmony_ci    uint32_t pirq;
21662306a36Sopenharmony_ci};
21762306a36Sopenharmony_ci
21862306a36Sopenharmony_ci#define XEN_PCI_DEV_EXTFN              0x1
21962306a36Sopenharmony_ci#define XEN_PCI_DEV_VIRTFN             0x2
22062306a36Sopenharmony_ci#define XEN_PCI_DEV_PXM                0x4
22162306a36Sopenharmony_ci
22262306a36Sopenharmony_ci#define XEN_PCI_MMCFG_RESERVED         0x1
22362306a36Sopenharmony_ci
22462306a36Sopenharmony_ci#define PHYSDEVOP_pci_mmcfg_reserved    24
22562306a36Sopenharmony_cistruct physdev_pci_mmcfg_reserved {
22662306a36Sopenharmony_ci    uint64_t address;
22762306a36Sopenharmony_ci    uint16_t segment;
22862306a36Sopenharmony_ci    uint8_t start_bus;
22962306a36Sopenharmony_ci    uint8_t end_bus;
23062306a36Sopenharmony_ci    uint32_t flags;
23162306a36Sopenharmony_ci};
23262306a36Sopenharmony_ci
23362306a36Sopenharmony_ci#define PHYSDEVOP_pci_device_add        25
23462306a36Sopenharmony_cistruct physdev_pci_device_add {
23562306a36Sopenharmony_ci    /* IN */
23662306a36Sopenharmony_ci    uint16_t seg;
23762306a36Sopenharmony_ci    uint8_t bus;
23862306a36Sopenharmony_ci    uint8_t devfn;
23962306a36Sopenharmony_ci    uint32_t flags;
24062306a36Sopenharmony_ci    struct {
24162306a36Sopenharmony_ci        uint8_t bus;
24262306a36Sopenharmony_ci        uint8_t devfn;
24362306a36Sopenharmony_ci    } physfn;
24462306a36Sopenharmony_ci#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
24562306a36Sopenharmony_ci    uint32_t optarr[];
24662306a36Sopenharmony_ci#elif defined(__GNUC__)
24762306a36Sopenharmony_ci    uint32_t optarr[0];
24862306a36Sopenharmony_ci#endif
24962306a36Sopenharmony_ci};
25062306a36Sopenharmony_ci
25162306a36Sopenharmony_ci#define PHYSDEVOP_pci_device_remove     26
25262306a36Sopenharmony_ci#define PHYSDEVOP_restore_msi_ext       27
25362306a36Sopenharmony_ci/*
25462306a36Sopenharmony_ci * Dom0 should use these two to announce MMIO resources assigned to
25562306a36Sopenharmony_ci * MSI-X capable devices won't (prepare) or may (release) change.
25662306a36Sopenharmony_ci */
25762306a36Sopenharmony_ci#define PHYSDEVOP_prepare_msix          30
25862306a36Sopenharmony_ci#define PHYSDEVOP_release_msix          31
25962306a36Sopenharmony_cistruct physdev_pci_device {
26062306a36Sopenharmony_ci    /* IN */
26162306a36Sopenharmony_ci    uint16_t seg;
26262306a36Sopenharmony_ci    uint8_t bus;
26362306a36Sopenharmony_ci    uint8_t devfn;
26462306a36Sopenharmony_ci};
26562306a36Sopenharmony_ci
26662306a36Sopenharmony_ci#define PHYSDEVOP_DBGP_RESET_PREPARE    1
26762306a36Sopenharmony_ci#define PHYSDEVOP_DBGP_RESET_DONE       2
26862306a36Sopenharmony_ci
26962306a36Sopenharmony_ci#define PHYSDEVOP_DBGP_BUS_UNKNOWN      0
27062306a36Sopenharmony_ci#define PHYSDEVOP_DBGP_BUS_PCI          1
27162306a36Sopenharmony_ci
27262306a36Sopenharmony_ci#define PHYSDEVOP_dbgp_op               29
27362306a36Sopenharmony_cistruct physdev_dbgp_op {
27462306a36Sopenharmony_ci    /* IN */
27562306a36Sopenharmony_ci    uint8_t op;
27662306a36Sopenharmony_ci    uint8_t bus;
27762306a36Sopenharmony_ci    union {
27862306a36Sopenharmony_ci        struct physdev_pci_device pci;
27962306a36Sopenharmony_ci    } u;
28062306a36Sopenharmony_ci};
28162306a36Sopenharmony_ci
28262306a36Sopenharmony_ci/*
28362306a36Sopenharmony_ci * Notify that some PIRQ-bound event channels have been unmasked.
28462306a36Sopenharmony_ci * ** This command is obsolete since interface version 0x00030202 and is **
28562306a36Sopenharmony_ci * ** unsupported by newer versions of Xen.				 **
28662306a36Sopenharmony_ci */
28762306a36Sopenharmony_ci#define PHYSDEVOP_IRQ_UNMASK_NOTIFY	 4
28862306a36Sopenharmony_ci
28962306a36Sopenharmony_ci/*
29062306a36Sopenharmony_ci * These all-capitals physdev operation names are superceded by the new names
29162306a36Sopenharmony_ci * (defined above) since interface version 0x00030202.
29262306a36Sopenharmony_ci */
29362306a36Sopenharmony_ci#define PHYSDEVOP_IRQ_STATUS_QUERY	 PHYSDEVOP_irq_status_query
29462306a36Sopenharmony_ci#define PHYSDEVOP_SET_IOPL		 PHYSDEVOP_set_iopl
29562306a36Sopenharmony_ci#define PHYSDEVOP_SET_IOBITMAP		 PHYSDEVOP_set_iobitmap
29662306a36Sopenharmony_ci#define PHYSDEVOP_APIC_READ		 PHYSDEVOP_apic_read
29762306a36Sopenharmony_ci#define PHYSDEVOP_APIC_WRITE		 PHYSDEVOP_apic_write
29862306a36Sopenharmony_ci#define PHYSDEVOP_ASSIGN_VECTOR		 PHYSDEVOP_alloc_irq_vector
29962306a36Sopenharmony_ci#define PHYSDEVOP_FREE_VECTOR		 PHYSDEVOP_free_irq_vector
30062306a36Sopenharmony_ci#define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi
30162306a36Sopenharmony_ci#define PHYSDEVOP_IRQ_SHARED		 XENIRQSTAT_shared
30262306a36Sopenharmony_ci
30362306a36Sopenharmony_ci#endif /* __XEN_PUBLIC_PHYSDEV_H__ */
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