162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2009 Marvell International Ltd. 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef __ASM_MACH_PXA168FB_H 762306a36Sopenharmony_ci#define __ASM_MACH_PXA168FB_H 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <linux/fb.h> 1062306a36Sopenharmony_ci#include <linux/interrupt.h> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/* Dumb interface */ 1362306a36Sopenharmony_ci#define PIN_MODE_DUMB_24 0 1462306a36Sopenharmony_ci#define PIN_MODE_DUMB_18_SPI 1 1562306a36Sopenharmony_ci#define PIN_MODE_DUMB_18_GPIO 2 1662306a36Sopenharmony_ci#define PIN_MODE_DUMB_16_SPI 3 1762306a36Sopenharmony_ci#define PIN_MODE_DUMB_16_GPIO 4 1862306a36Sopenharmony_ci#define PIN_MODE_DUMB_12_SPI_GPIO 5 1962306a36Sopenharmony_ci#define PIN_MODE_SMART_18_SPI 6 2062306a36Sopenharmony_ci#define PIN_MODE_SMART_16_SPI 7 2162306a36Sopenharmony_ci#define PIN_MODE_SMART_8_SPI_GPIO 8 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci/* Dumb interface pin allocation */ 2462306a36Sopenharmony_ci#define DUMB_MODE_RGB565 0 2562306a36Sopenharmony_ci#define DUMB_MODE_RGB565_UPPER 1 2662306a36Sopenharmony_ci#define DUMB_MODE_RGB666 2 2762306a36Sopenharmony_ci#define DUMB_MODE_RGB666_UPPER 3 2862306a36Sopenharmony_ci#define DUMB_MODE_RGB444 4 2962306a36Sopenharmony_ci#define DUMB_MODE_RGB444_UPPER 5 3062306a36Sopenharmony_ci#define DUMB_MODE_RGB888 6 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci/* default fb buffer size WVGA-32bits */ 3362306a36Sopenharmony_ci#define DEFAULT_FB_SIZE (800 * 480 * 4) 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci/* 3662306a36Sopenharmony_ci * Buffer pixel format 3762306a36Sopenharmony_ci * bit0 is for rb swap. 3862306a36Sopenharmony_ci * bit12 is for Y UorV swap 3962306a36Sopenharmony_ci */ 4062306a36Sopenharmony_ci#define PIX_FMT_RGB565 0 4162306a36Sopenharmony_ci#define PIX_FMT_BGR565 1 4262306a36Sopenharmony_ci#define PIX_FMT_RGB1555 2 4362306a36Sopenharmony_ci#define PIX_FMT_BGR1555 3 4462306a36Sopenharmony_ci#define PIX_FMT_RGB888PACK 4 4562306a36Sopenharmony_ci#define PIX_FMT_BGR888PACK 5 4662306a36Sopenharmony_ci#define PIX_FMT_RGB888UNPACK 6 4762306a36Sopenharmony_ci#define PIX_FMT_BGR888UNPACK 7 4862306a36Sopenharmony_ci#define PIX_FMT_RGBA888 8 4962306a36Sopenharmony_ci#define PIX_FMT_BGRA888 9 5062306a36Sopenharmony_ci#define PIX_FMT_YUV422PACK 10 5162306a36Sopenharmony_ci#define PIX_FMT_YVU422PACK 11 5262306a36Sopenharmony_ci#define PIX_FMT_YUV422PLANAR 12 5362306a36Sopenharmony_ci#define PIX_FMT_YVU422PLANAR 13 5462306a36Sopenharmony_ci#define PIX_FMT_YUV420PLANAR 14 5562306a36Sopenharmony_ci#define PIX_FMT_YVU420PLANAR 15 5662306a36Sopenharmony_ci#define PIX_FMT_PSEUDOCOLOR 20 5762306a36Sopenharmony_ci#define PIX_FMT_UYVY422PACK (0x1000|PIX_FMT_YUV422PACK) 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci/* 6062306a36Sopenharmony_ci * PXA LCD controller private state. 6162306a36Sopenharmony_ci */ 6262306a36Sopenharmony_cistruct pxa168fb_info { 6362306a36Sopenharmony_ci struct device *dev; 6462306a36Sopenharmony_ci struct clk *clk; 6562306a36Sopenharmony_ci struct fb_info *info; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci void __iomem *reg_base; 6862306a36Sopenharmony_ci dma_addr_t fb_start_dma; 6962306a36Sopenharmony_ci u32 pseudo_palette[16]; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci int pix_fmt; 7262306a36Sopenharmony_ci unsigned is_blanked:1; 7362306a36Sopenharmony_ci unsigned panel_rbswap:1; 7462306a36Sopenharmony_ci unsigned active:1; 7562306a36Sopenharmony_ci}; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci/* 7862306a36Sopenharmony_ci * PXA fb machine information 7962306a36Sopenharmony_ci */ 8062306a36Sopenharmony_cistruct pxa168fb_mach_info { 8162306a36Sopenharmony_ci char id[16]; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci int num_modes; 8462306a36Sopenharmony_ci struct fb_videomode *modes; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci /* 8762306a36Sopenharmony_ci * Pix_fmt 8862306a36Sopenharmony_ci */ 8962306a36Sopenharmony_ci unsigned pix_fmt; 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci /* 9262306a36Sopenharmony_ci * I/O pin allocation. 9362306a36Sopenharmony_ci */ 9462306a36Sopenharmony_ci unsigned io_pin_allocation_mode:4; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci /* 9762306a36Sopenharmony_ci * Dumb panel -- assignment of R/G/B component info to the 24 9862306a36Sopenharmony_ci * available external data lanes. 9962306a36Sopenharmony_ci */ 10062306a36Sopenharmony_ci unsigned dumb_mode:4; 10162306a36Sopenharmony_ci unsigned panel_rgb_reverse_lanes:1; 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci /* 10462306a36Sopenharmony_ci * Dumb panel -- GPIO output data. 10562306a36Sopenharmony_ci */ 10662306a36Sopenharmony_ci unsigned gpio_output_mask:8; 10762306a36Sopenharmony_ci unsigned gpio_output_data:8; 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci /* 11062306a36Sopenharmony_ci * Dumb panel -- configurable output signal polarity. 11162306a36Sopenharmony_ci */ 11262306a36Sopenharmony_ci unsigned invert_composite_blank:1; 11362306a36Sopenharmony_ci unsigned invert_pix_val_ena:1; 11462306a36Sopenharmony_ci unsigned invert_pixclock:1; 11562306a36Sopenharmony_ci unsigned panel_rbswap:1; 11662306a36Sopenharmony_ci unsigned active:1; 11762306a36Sopenharmony_ci unsigned enable_lcd:1; 11862306a36Sopenharmony_ci}; 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci#endif /* __ASM_MACH_PXA168FB_H */ 121