1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
2/*
3 * Copyright (c) 2016 Hisilicon Limited.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses.  You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 *     Redistribution and use in source and binary forms, with or
12 *     without modification, are permitted provided that the following
13 *     conditions are met:
14 *
15 *      - Redistributions of source code must retain the above
16 *        copyright notice, this list of conditions and the following
17 *        disclaimer.
18 *
19 *      - Redistributions in binary form must reproduce the above
20 *        copyright notice, this list of conditions and the following
21 *        disclaimer in the documentation and/or other materials
22 *        provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef HNS_ABI_USER_H
35#define HNS_ABI_USER_H
36
37#include <linux/types.h>
38
39struct hns_roce_ib_create_cq {
40	__aligned_u64 buf_addr;
41	__aligned_u64 db_addr;
42	__u32 cqe_size;
43	__u32 reserved;
44};
45
46enum hns_roce_cq_cap_flags {
47	HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0,
48};
49
50struct hns_roce_ib_create_cq_resp {
51	__aligned_u64 cqn; /* Only 32 bits used, 64 for compat */
52	__aligned_u64 cap_flags;
53};
54
55struct hns_roce_ib_create_srq {
56	__aligned_u64 buf_addr;
57	__aligned_u64 db_addr;
58	__aligned_u64 que_addr;
59};
60
61struct hns_roce_ib_create_srq_resp {
62	__u32	srqn;
63	__u32	reserved;
64};
65
66struct hns_roce_ib_create_qp {
67	__aligned_u64 buf_addr;
68	__aligned_u64 db_addr;
69	__u8    log_sq_bb_count;
70	__u8    log_sq_stride;
71	__u8    sq_no_prefetch;
72	__u8    reserved[5];
73	__aligned_u64 sdb_addr;
74};
75
76enum hns_roce_qp_cap_flags {
77	HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
78	HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
79	HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
80	HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5,
81};
82
83struct hns_roce_ib_create_qp_resp {
84	__aligned_u64 cap_flags;
85	__aligned_u64 dwqe_mmap_key;
86};
87
88enum {
89	HNS_ROCE_EXSGE_FLAGS = 1 << 0,
90	HNS_ROCE_RQ_INLINE_FLAGS = 1 << 1,
91	HNS_ROCE_CQE_INLINE_FLAGS = 1 << 2,
92};
93
94enum {
95	HNS_ROCE_RSP_EXSGE_FLAGS = 1 << 0,
96	HNS_ROCE_RSP_RQ_INLINE_FLAGS = 1 << 1,
97	HNS_ROCE_RSP_CQE_INLINE_FLAGS = 1 << 2,
98};
99
100struct hns_roce_ib_alloc_ucontext_resp {
101	__u32	qp_tab_size;
102	__u32	cqe_size;
103	__u32	srq_tab_size;
104	__u32	reserved;
105	__u32	config;
106	__u32	max_inline_data;
107};
108
109struct hns_roce_ib_alloc_ucontext {
110	__u32 config;
111	__u32 reserved;
112};
113
114struct hns_roce_ib_alloc_pd_resp {
115	__u32 pdn;
116};
117
118#endif /* HNS_ABI_USER_H */
119