162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * i2c.h - definitions for the I2C bus interface
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 1995-2000 Simon G. Vogl
662306a36Sopenharmony_ci * With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
762306a36Sopenharmony_ci * Frodo Looijaard <frodol@dds.nl>
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#ifndef _UAPI_LINUX_I2C_H
1162306a36Sopenharmony_ci#define _UAPI_LINUX_I2C_H
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include <linux/types.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/**
1662306a36Sopenharmony_ci * struct i2c_msg - an I2C transaction segment beginning with START
1762306a36Sopenharmony_ci *
1862306a36Sopenharmony_ci * @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
1962306a36Sopenharmony_ci *   %I2C_M_TEN must be set in @flags and the adapter must support
2062306a36Sopenharmony_ci *   %I2C_FUNC_10BIT_ADDR.
2162306a36Sopenharmony_ci *
2262306a36Sopenharmony_ci * @flags:
2362306a36Sopenharmony_ci *   Supported by all adapters:
2462306a36Sopenharmony_ci *   %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
2562306a36Sopenharmony_ci *
2662306a36Sopenharmony_ci *   Optional:
2762306a36Sopenharmony_ci *   %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense
2862306a36Sopenharmony_ci *     in kernelspace, because userspace buffers are copied anyway
2962306a36Sopenharmony_ci *
3062306a36Sopenharmony_ci *   Only if I2C_FUNC_10BIT_ADDR is set:
3162306a36Sopenharmony_ci *   %I2C_M_TEN: this is a 10 bit chip address
3262306a36Sopenharmony_ci *
3362306a36Sopenharmony_ci *   Only if I2C_FUNC_SMBUS_READ_BLOCK_DATA is set:
3462306a36Sopenharmony_ci *   %I2C_M_RECV_LEN: message length will be first received byte
3562306a36Sopenharmony_ci *
3662306a36Sopenharmony_ci *   Only if I2C_FUNC_NOSTART is set:
3762306a36Sopenharmony_ci *   %I2C_M_NOSTART: skip repeated start sequence
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci *   Only if I2C_FUNC_PROTOCOL_MANGLING is set:
4062306a36Sopenharmony_ci *   %I2C_M_NO_RD_ACK: in a read message, master ACK/NACK bit is skipped
4162306a36Sopenharmony_ci *   %I2C_M_IGNORE_NAK: treat NACK from client as ACK
4262306a36Sopenharmony_ci *   %I2C_M_REV_DIR_ADDR: toggles the Rd/Wr bit
4362306a36Sopenharmony_ci *   %I2C_M_STOP: force a STOP condition after the message
4462306a36Sopenharmony_ci *
4562306a36Sopenharmony_ci * @len: Number of data bytes in @buf being read from or written to the I2C
4662306a36Sopenharmony_ci *   slave address. For read transactions where %I2C_M_RECV_LEN is set, the
4762306a36Sopenharmony_ci *   caller guarantees that this buffer can hold up to %I2C_SMBUS_BLOCK_MAX
4862306a36Sopenharmony_ci *   bytes in addition to the initial length byte sent by the slave (plus,
4962306a36Sopenharmony_ci *   if used, the SMBus PEC); and this value will be incremented by the number
5062306a36Sopenharmony_ci *   of block data bytes received.
5162306a36Sopenharmony_ci *
5262306a36Sopenharmony_ci * @buf: The buffer into which data is read, or from which it's written.
5362306a36Sopenharmony_ci *
5462306a36Sopenharmony_ci * An i2c_msg is the low level representation of one segment of an I2C
5562306a36Sopenharmony_ci * transaction.  It is visible to drivers in the @i2c_transfer() procedure,
5662306a36Sopenharmony_ci * to userspace from i2c-dev, and to I2C adapter drivers through the
5762306a36Sopenharmony_ci * @i2c_adapter.@master_xfer() method.
5862306a36Sopenharmony_ci *
5962306a36Sopenharmony_ci * Except when I2C "protocol mangling" is used, all I2C adapters implement
6062306a36Sopenharmony_ci * the standard rules for I2C transactions.  Each transaction begins with a
6162306a36Sopenharmony_ci * START.  That is followed by the slave address, and a bit encoding read
6262306a36Sopenharmony_ci * versus write.  Then follow all the data bytes, possibly including a byte
6362306a36Sopenharmony_ci * with SMBus PEC.  The transfer terminates with a NAK, or when all those
6462306a36Sopenharmony_ci * bytes have been transferred and ACKed.  If this is the last message in a
6562306a36Sopenharmony_ci * group, it is followed by a STOP.  Otherwise it is followed by the next
6662306a36Sopenharmony_ci * @i2c_msg transaction segment, beginning with a (repeated) START.
6762306a36Sopenharmony_ci *
6862306a36Sopenharmony_ci * Alternatively, when the adapter supports %I2C_FUNC_PROTOCOL_MANGLING then
6962306a36Sopenharmony_ci * passing certain @flags may have changed those standard protocol behaviors.
7062306a36Sopenharmony_ci * Those flags are only for use with broken/nonconforming slaves, and with
7162306a36Sopenharmony_ci * adapters which are known to support the specific mangling options they need.
7262306a36Sopenharmony_ci */
7362306a36Sopenharmony_cistruct i2c_msg {
7462306a36Sopenharmony_ci	__u16 addr;
7562306a36Sopenharmony_ci	__u16 flags;
7662306a36Sopenharmony_ci#define I2C_M_RD		0x0001	/* guaranteed to be 0x0001! */
7762306a36Sopenharmony_ci#define I2C_M_TEN		0x0010	/* use only if I2C_FUNC_10BIT_ADDR */
7862306a36Sopenharmony_ci#define I2C_M_DMA_SAFE		0x0200	/* use only in kernel space */
7962306a36Sopenharmony_ci#define I2C_M_RECV_LEN		0x0400	/* use only if I2C_FUNC_SMBUS_READ_BLOCK_DATA */
8062306a36Sopenharmony_ci#define I2C_M_NO_RD_ACK		0x0800	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
8162306a36Sopenharmony_ci#define I2C_M_IGNORE_NAK	0x1000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
8262306a36Sopenharmony_ci#define I2C_M_REV_DIR_ADDR	0x2000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
8362306a36Sopenharmony_ci#define I2C_M_NOSTART		0x4000	/* use only if I2C_FUNC_NOSTART */
8462306a36Sopenharmony_ci#define I2C_M_STOP		0x8000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
8562306a36Sopenharmony_ci	__u16 len;
8662306a36Sopenharmony_ci	__u8 *buf;
8762306a36Sopenharmony_ci};
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci/* To determine what functionality is present */
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci#define I2C_FUNC_I2C			0x00000001
9262306a36Sopenharmony_ci#define I2C_FUNC_10BIT_ADDR		0x00000002 /* required for I2C_M_TEN */
9362306a36Sopenharmony_ci#define I2C_FUNC_PROTOCOL_MANGLING	0x00000004 /* required for I2C_M_IGNORE_NAK etc. */
9462306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_PEC		0x00000008
9562306a36Sopenharmony_ci#define I2C_FUNC_NOSTART		0x00000010 /* required for I2C_M_NOSTART */
9662306a36Sopenharmony_ci#define I2C_FUNC_SLAVE			0x00000020
9762306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL	0x00008000 /* SMBus 2.0 or later */
9862306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_QUICK		0x00010000
9962306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_READ_BYTE	0x00020000
10062306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WRITE_BYTE	0x00040000
10162306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_READ_BYTE_DATA	0x00080000
10262306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA	0x00100000
10362306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_READ_WORD_DATA	0x00200000
10462306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WRITE_WORD_DATA	0x00400000
10562306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_PROC_CALL	0x00800000
10662306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_READ_BLOCK_DATA	0x01000000 /* required for I2C_M_RECV_LEN */
10762306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
10862306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_READ_I2C_BLOCK	0x04000000 /* I2C-like block xfer  */
10962306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK	0x08000000 /* w/ 1-byte reg. addr. */
11062306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_HOST_NOTIFY	0x10000000 /* SMBus 2.0 or later */
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_BYTE		(I2C_FUNC_SMBUS_READ_BYTE | \
11362306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_BYTE)
11462306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_BYTE_DATA	(I2C_FUNC_SMBUS_READ_BYTE_DATA | \
11562306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
11662306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_WORD_DATA	(I2C_FUNC_SMBUS_READ_WORD_DATA | \
11762306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
11862306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_BLOCK_DATA	(I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
11962306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
12062306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_I2C_BLOCK	(I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
12162306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_EMUL		(I2C_FUNC_SMBUS_QUICK | \
12462306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_BYTE | \
12562306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_BYTE_DATA | \
12662306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WORD_DATA | \
12762306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_PROC_CALL | \
12862306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
12962306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_I2C_BLOCK | \
13062306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_PEC)
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci/* if I2C_M_RECV_LEN is also supported */
13362306a36Sopenharmony_ci#define I2C_FUNC_SMBUS_EMUL_ALL		(I2C_FUNC_SMBUS_EMUL | \
13462306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
13562306a36Sopenharmony_ci					 I2C_FUNC_SMBUS_BLOCK_PROC_CALL)
13662306a36Sopenharmony_ci
13762306a36Sopenharmony_ci/*
13862306a36Sopenharmony_ci * Data for SMBus Messages
13962306a36Sopenharmony_ci */
14062306a36Sopenharmony_ci#define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */
14162306a36Sopenharmony_ciunion i2c_smbus_data {
14262306a36Sopenharmony_ci	__u8 byte;
14362306a36Sopenharmony_ci	__u16 word;
14462306a36Sopenharmony_ci	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
14562306a36Sopenharmony_ci			       /* and one more for user-space compatibility */
14662306a36Sopenharmony_ci};
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ci/* i2c_smbus_xfer read or write markers */
14962306a36Sopenharmony_ci#define I2C_SMBUS_READ	1
15062306a36Sopenharmony_ci#define I2C_SMBUS_WRITE	0
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci/* SMBus transaction types (size parameter in the above functions)
15362306a36Sopenharmony_ci   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
15462306a36Sopenharmony_ci#define I2C_SMBUS_QUICK		    0
15562306a36Sopenharmony_ci#define I2C_SMBUS_BYTE		    1
15662306a36Sopenharmony_ci#define I2C_SMBUS_BYTE_DATA	    2
15762306a36Sopenharmony_ci#define I2C_SMBUS_WORD_DATA	    3
15862306a36Sopenharmony_ci#define I2C_SMBUS_PROC_CALL	    4
15962306a36Sopenharmony_ci#define I2C_SMBUS_BLOCK_DATA	    5
16062306a36Sopenharmony_ci#define I2C_SMBUS_I2C_BLOCK_BROKEN  6
16162306a36Sopenharmony_ci#define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */
16262306a36Sopenharmony_ci#define I2C_SMBUS_I2C_BLOCK_DATA    8
16362306a36Sopenharmony_ci
16462306a36Sopenharmony_ci#endif /* _UAPI_LINUX_I2C_H */
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