162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * linux/sound/wm2200.h -- Platform data for WM2200
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright 2012 Wolfson Microelectronics. PLC.
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#ifndef __LINUX_SND_WM2200_H
962306a36Sopenharmony_ci#define __LINUX_SND_WM2200_H
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#define WM2200_GPIO_SET 0x10000
1262306a36Sopenharmony_ci#define WM2200_MAX_MICBIAS 2
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cienum wm2200_in_mode {
1562306a36Sopenharmony_ci	WM2200_IN_SE = 0,
1662306a36Sopenharmony_ci	WM2200_IN_DIFF = 1,
1762306a36Sopenharmony_ci	WM2200_IN_DMIC = 2,
1862306a36Sopenharmony_ci};
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_cienum wm2200_dmic_sup {
2162306a36Sopenharmony_ci	WM2200_DMIC_SUP_MICVDD = 0,
2262306a36Sopenharmony_ci	WM2200_DMIC_SUP_MICBIAS1 = 1,
2362306a36Sopenharmony_ci	WM2200_DMIC_SUP_MICBIAS2 = 2,
2462306a36Sopenharmony_ci};
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_cienum wm2200_mbias_lvl {
2762306a36Sopenharmony_ci	WM2200_MBIAS_LVL_1V5 = 1,
2862306a36Sopenharmony_ci	WM2200_MBIAS_LVL_1V8 = 2,
2962306a36Sopenharmony_ci	WM2200_MBIAS_LVL_1V9 = 3,
3062306a36Sopenharmony_ci	WM2200_MBIAS_LVL_2V0 = 4,
3162306a36Sopenharmony_ci	WM2200_MBIAS_LVL_2V2 = 5,
3262306a36Sopenharmony_ci	WM2200_MBIAS_LVL_2V4 = 6,
3362306a36Sopenharmony_ci	WM2200_MBIAS_LVL_2V5 = 7,
3462306a36Sopenharmony_ci	WM2200_MBIAS_LVL_2V6 = 8,
3562306a36Sopenharmony_ci};
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_cistruct wm2200_micbias {
3862306a36Sopenharmony_ci	enum wm2200_mbias_lvl mb_lvl;      /** Regulated voltage */
3962306a36Sopenharmony_ci	unsigned int discharge:1;          /** Actively discharge */
4062306a36Sopenharmony_ci	unsigned int fast_start:1;         /** Enable aggressive startup ramp rate */
4162306a36Sopenharmony_ci	unsigned int bypass:1;             /** Use bypass mode */
4262306a36Sopenharmony_ci};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_cistruct wm2200_pdata {
4562306a36Sopenharmony_ci	int reset;      /** GPIO controlling /RESET, if any */
4662306a36Sopenharmony_ci	int ldo_ena;    /** GPIO controlling LODENA, if any */
4762306a36Sopenharmony_ci	int irq_flags;
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci	int gpio_defaults[4];
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci	enum wm2200_in_mode in_mode[3];
5262306a36Sopenharmony_ci	enum wm2200_dmic_sup dmic_sup[3];
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci	/** MICBIAS configurations */
5562306a36Sopenharmony_ci	struct wm2200_micbias micbias[WM2200_MAX_MICBIAS];
5662306a36Sopenharmony_ci};
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci#endif
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