162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * This file is provided under a dual BSD/GPLv2 license. When using or 462306a36Sopenharmony_ci * redistributing this file, you may do so under either license. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright(c) 2018 Intel Corporation. All rights reserved. 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef __INCLUDE_SOUND_SOF_DAI_H__ 1062306a36Sopenharmony_ci#define __INCLUDE_SOUND_SOF_DAI_H__ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <sound/sof/header.h> 1362306a36Sopenharmony_ci#include <sound/sof/dai-intel.h> 1462306a36Sopenharmony_ci#include <sound/sof/dai-imx.h> 1562306a36Sopenharmony_ci#include <sound/sof/dai-amd.h> 1662306a36Sopenharmony_ci#include <sound/sof/dai-mediatek.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* 1962306a36Sopenharmony_ci * DAI Configuration. 2062306a36Sopenharmony_ci * 2162306a36Sopenharmony_ci * Each different DAI type will have it's own structure and IPC cmd. 2262306a36Sopenharmony_ci */ 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci#define SOF_DAI_FMT_I2S 1 /**< I2S mode */ 2562306a36Sopenharmony_ci#define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */ 2662306a36Sopenharmony_ci#define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */ 2762306a36Sopenharmony_ci#define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */ 2862306a36Sopenharmony_ci#define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */ 2962306a36Sopenharmony_ci#define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */ 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */ 3262306a36Sopenharmony_ci#define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */ 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci#define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */ 3562306a36Sopenharmony_ci#define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */ 3662306a36Sopenharmony_ci#define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */ 3762306a36Sopenharmony_ci#define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */ 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci#define SOF_DAI_FMT_CBP_CFP (0 << 12) /**< codec bclk provider & frame provider */ 4062306a36Sopenharmony_ci#define SOF_DAI_FMT_CBC_CFP (2 << 12) /**< codec bclk consumer & frame provider */ 4162306a36Sopenharmony_ci#define SOF_DAI_FMT_CBP_CFC (3 << 12) /**< codec bclk provider & frame consumer */ 4262306a36Sopenharmony_ci#define SOF_DAI_FMT_CBC_CFC (4 << 12) /**< codec bclk consumer & frame consumer */ 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci/* keep old definitions for backwards compatibility */ 4562306a36Sopenharmony_ci#define SOF_DAI_FMT_CBM_CFM SOF_DAI_FMT_CBP_CFP 4662306a36Sopenharmony_ci#define SOF_DAI_FMT_CBS_CFM SOF_DAI_FMT_CBC_CFP 4762306a36Sopenharmony_ci#define SOF_DAI_FMT_CBM_CFS SOF_DAI_FMT_CBP_CFC 4862306a36Sopenharmony_ci#define SOF_DAI_FMT_CBS_CFS SOF_DAI_FMT_CBC_CFC 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci#define SOF_DAI_FMT_FORMAT_MASK 0x000f 5162306a36Sopenharmony_ci#define SOF_DAI_FMT_CLOCK_MASK 0x00f0 5262306a36Sopenharmony_ci#define SOF_DAI_FMT_INV_MASK 0x0f00 5362306a36Sopenharmony_ci#define SOF_DAI_FMT_CLOCK_PROVIDER_MASK 0xf000 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* 5662306a36Sopenharmony_ci * DAI_CONFIG flags. The 4 LSB bits are used for the commands, HW_PARAMS, HW_FREE and PAUSE 5762306a36Sopenharmony_ci * representing when the IPC is sent. The 4 MSB bits are used to add quirks along with the above 5862306a36Sopenharmony_ci * commands. 5962306a36Sopenharmony_ci */ 6062306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_CMD_MASK 0xF 6162306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_NONE 0 /**< DAI_CONFIG sent without stage information */ 6262306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_HW_PARAMS BIT(0) /**< DAI_CONFIG sent during hw_params stage */ 6362306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_HW_FREE BIT(1) /**< DAI_CONFIG sent during hw_free stage */ 6462306a36Sopenharmony_ci/**< DAI_CONFIG sent during pause trigger. Only available ABI 3.20 onwards */ 6562306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_PAUSE BIT(2) 6662306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT 4 6762306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_QUIRK_MASK (0xF << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT) 6862306a36Sopenharmony_ci/* 6962306a36Sopenharmony_ci * This should be used along with the SOF_DAI_CONFIG_FLAGS_HW_PARAMS to indicate that pipeline 7062306a36Sopenharmony_ci * stop/pause and DAI DMA stop/pause should happen in two steps. This change is only available 7162306a36Sopenharmony_ci * ABI 3.20 onwards. 7262306a36Sopenharmony_ci */ 7362306a36Sopenharmony_ci#define SOF_DAI_CONFIG_FLAGS_2_STEP_STOP BIT(0) 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci/** \brief Types of DAI */ 7662306a36Sopenharmony_cienum sof_ipc_dai_type { 7762306a36Sopenharmony_ci SOF_DAI_INTEL_NONE = 0, /**< None */ 7862306a36Sopenharmony_ci SOF_DAI_INTEL_SSP, /**< Intel SSP */ 7962306a36Sopenharmony_ci SOF_DAI_INTEL_DMIC, /**< Intel DMIC */ 8062306a36Sopenharmony_ci SOF_DAI_INTEL_HDA, /**< Intel HD/A */ 8162306a36Sopenharmony_ci SOF_DAI_INTEL_ALH, /**< Intel ALH */ 8262306a36Sopenharmony_ci SOF_DAI_IMX_SAI, /**< i.MX SAI */ 8362306a36Sopenharmony_ci SOF_DAI_IMX_ESAI, /**< i.MX ESAI */ 8462306a36Sopenharmony_ci SOF_DAI_AMD_BT, /**< AMD ACP BT*/ 8562306a36Sopenharmony_ci SOF_DAI_AMD_SP, /**< AMD ACP SP */ 8662306a36Sopenharmony_ci SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */ 8762306a36Sopenharmony_ci SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */ 8862306a36Sopenharmony_ci SOF_DAI_AMD_HS, /**< Amd HS */ 8962306a36Sopenharmony_ci SOF_DAI_AMD_SP_VIRTUAL, /**< AMD ACP SP VIRTUAL */ 9062306a36Sopenharmony_ci SOF_DAI_AMD_HS_VIRTUAL, /**< AMD ACP HS VIRTUAL */ 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci/* general purpose DAI configuration */ 9462306a36Sopenharmony_cistruct sof_ipc_dai_config { 9562306a36Sopenharmony_ci struct sof_ipc_cmd_hdr hdr; 9662306a36Sopenharmony_ci uint32_t type; /**< DAI type - enum sof_ipc_dai_type */ 9762306a36Sopenharmony_ci uint32_t dai_index; /**< index of this type dai */ 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci /* physical protocol and clocking */ 10062306a36Sopenharmony_ci uint16_t format; /**< SOF_DAI_FMT_ */ 10162306a36Sopenharmony_ci uint8_t group_id; /**< group ID, 0 means no group (ABI 3.17) */ 10262306a36Sopenharmony_ci uint8_t flags; /**< SOF_DAI_CONFIG_FLAGS_ (ABI 3.19) */ 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci /* reserved for future use */ 10562306a36Sopenharmony_ci uint32_t reserved[8]; 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci /* HW specific data */ 10862306a36Sopenharmony_ci union { 10962306a36Sopenharmony_ci struct sof_ipc_dai_ssp_params ssp; 11062306a36Sopenharmony_ci struct sof_ipc_dai_dmic_params dmic; 11162306a36Sopenharmony_ci struct sof_ipc_dai_hda_params hda; 11262306a36Sopenharmony_ci struct sof_ipc_dai_alh_params alh; 11362306a36Sopenharmony_ci struct sof_ipc_dai_esai_params esai; 11462306a36Sopenharmony_ci struct sof_ipc_dai_sai_params sai; 11562306a36Sopenharmony_ci struct sof_ipc_dai_acp_params acpbt; 11662306a36Sopenharmony_ci struct sof_ipc_dai_acp_params acpsp; 11762306a36Sopenharmony_ci struct sof_ipc_dai_acpdmic_params acpdmic; 11862306a36Sopenharmony_ci struct sof_ipc_dai_acp_params acphs; 11962306a36Sopenharmony_ci struct sof_ipc_dai_mtk_afe_params afe; 12062306a36Sopenharmony_ci }; 12162306a36Sopenharmony_ci} __packed; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_cistruct sof_dai_private_data { 12462306a36Sopenharmony_ci struct sof_ipc_comp_dai *comp_dai; 12562306a36Sopenharmony_ci struct sof_ipc_dai_config *dai_config; 12662306a36Sopenharmony_ci}; 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci#endif 129