162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef _ACI_H_ 362306a36Sopenharmony_ci#define _ACI_H_ 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#define ACI_REG_COMMAND 0 /* write register offset */ 662306a36Sopenharmony_ci#define ACI_REG_STATUS 1 /* read register offset */ 762306a36Sopenharmony_ci#define ACI_REG_BUSY 2 /* busy register offset */ 862306a36Sopenharmony_ci#define ACI_REG_RDS 2 /* PCM20: RDS register offset */ 962306a36Sopenharmony_ci#define ACI_MINTIME 500 /* ACI time out limit */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#define ACI_SET_MUTE 0x0d 1262306a36Sopenharmony_ci#define ACI_SET_POWERAMP 0x0f 1362306a36Sopenharmony_ci#define ACI_SET_TUNERMUTE 0xa3 1462306a36Sopenharmony_ci#define ACI_SET_TUNERMONO 0xa4 1562306a36Sopenharmony_ci#define ACI_SET_IDE 0xd0 1662306a36Sopenharmony_ci#define ACI_SET_WSS 0xd1 1762306a36Sopenharmony_ci#define ACI_SET_SOLOMODE 0xd2 1862306a36Sopenharmony_ci#define ACI_SET_PREAMP 0x03 1962306a36Sopenharmony_ci#define ACI_GET_PREAMP 0x21 2062306a36Sopenharmony_ci#define ACI_WRITE_TUNE 0xa7 2162306a36Sopenharmony_ci#define ACI_READ_TUNERSTEREO 0xa8 2262306a36Sopenharmony_ci#define ACI_READ_TUNERSTATION 0xa9 2362306a36Sopenharmony_ci#define ACI_READ_VERSION 0xf1 2462306a36Sopenharmony_ci#define ACI_READ_IDCODE 0xf2 2562306a36Sopenharmony_ci#define ACI_INIT 0xff 2662306a36Sopenharmony_ci#define ACI_STATUS 0xf0 2762306a36Sopenharmony_ci#define ACI_S_GENERAL 0x00 2862306a36Sopenharmony_ci#define ACI_ERROR_OP 0xdf 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci/* ACI Mixer */ 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci/* These are the values for the right channel GET registers. 3362306a36Sopenharmony_ci Add an offset of 0x01 for the left channel register. 3462306a36Sopenharmony_ci (left=right+0x01) */ 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci#define ACI_GET_MASTER 0x03 3762306a36Sopenharmony_ci#define ACI_GET_MIC 0x05 3862306a36Sopenharmony_ci#define ACI_GET_LINE 0x07 3962306a36Sopenharmony_ci#define ACI_GET_CD 0x09 4062306a36Sopenharmony_ci#define ACI_GET_SYNTH 0x0b 4162306a36Sopenharmony_ci#define ACI_GET_PCM 0x0d 4262306a36Sopenharmony_ci#define ACI_GET_LINE1 0x10 /* Radio on PCM20 */ 4362306a36Sopenharmony_ci#define ACI_GET_LINE2 0x12 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci#define ACI_GET_EQ1 0x22 /* from Bass ... */ 4662306a36Sopenharmony_ci#define ACI_GET_EQ2 0x24 4762306a36Sopenharmony_ci#define ACI_GET_EQ3 0x26 4862306a36Sopenharmony_ci#define ACI_GET_EQ4 0x28 4962306a36Sopenharmony_ci#define ACI_GET_EQ5 0x2a 5062306a36Sopenharmony_ci#define ACI_GET_EQ6 0x2c 5162306a36Sopenharmony_ci#define ACI_GET_EQ7 0x2e /* ... to Treble */ 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* And these are the values for the right channel SET registers. 5462306a36Sopenharmony_ci For left channel access you have to add an offset of 0x08. 5562306a36Sopenharmony_ci MASTER is an exception, which needs an offset of 0x01 */ 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci#define ACI_SET_MASTER 0x00 5862306a36Sopenharmony_ci#define ACI_SET_MIC 0x30 5962306a36Sopenharmony_ci#define ACI_SET_LINE 0x31 6062306a36Sopenharmony_ci#define ACI_SET_CD 0x34 6162306a36Sopenharmony_ci#define ACI_SET_SYNTH 0x33 6262306a36Sopenharmony_ci#define ACI_SET_PCM 0x32 6362306a36Sopenharmony_ci#define ACI_SET_LINE1 0x35 /* Radio on PCM20 */ 6462306a36Sopenharmony_ci#define ACI_SET_LINE2 0x36 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci#define ACI_SET_EQ1 0x40 /* from Bass ... */ 6762306a36Sopenharmony_ci#define ACI_SET_EQ2 0x41 6862306a36Sopenharmony_ci#define ACI_SET_EQ3 0x42 6962306a36Sopenharmony_ci#define ACI_SET_EQ4 0x43 7062306a36Sopenharmony_ci#define ACI_SET_EQ5 0x44 7162306a36Sopenharmony_ci#define ACI_SET_EQ6 0x45 7262306a36Sopenharmony_ci#define ACI_SET_EQ7 0x46 /* ... to Treble */ 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_cistruct snd_miro_aci { 7562306a36Sopenharmony_ci unsigned long aci_port; 7662306a36Sopenharmony_ci int aci_vendor; 7762306a36Sopenharmony_ci int aci_product; 7862306a36Sopenharmony_ci int aci_version; 7962306a36Sopenharmony_ci int aci_amp; 8062306a36Sopenharmony_ci int aci_preamp; 8162306a36Sopenharmony_ci int aci_solomode; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci struct mutex aci_mutex; 8462306a36Sopenharmony_ci}; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ciint snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3); 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_cistruct snd_miro_aci *snd_aci_get_aci(void); 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci#endif /* _ACI_H_ */ 9162306a36Sopenharmony_ci 92