162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Microchip PolarFire SoC (MPFS)
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Copyright (c) 2020 Microchip Corporation. All rights reserved.
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * Author: Conor Dooley <conor.dooley@microchip.com>
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci */
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#ifndef __SOC_MPFS_H__
1362306a36Sopenharmony_ci#define __SOC_MPFS_H__
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#include <linux/types.h>
1662306a36Sopenharmony_ci#include <linux/of_device.h>
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_cistruct mpfs_sys_controller;
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_cistruct mpfs_mss_msg {
2162306a36Sopenharmony_ci	u8 cmd_opcode;
2262306a36Sopenharmony_ci	u16 cmd_data_size;
2362306a36Sopenharmony_ci	struct mpfs_mss_response *response;
2462306a36Sopenharmony_ci	u8 *cmd_data;
2562306a36Sopenharmony_ci	u16 mbox_offset;
2662306a36Sopenharmony_ci	u16 resp_offset;
2762306a36Sopenharmony_ci};
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_cistruct mpfs_mss_response {
3062306a36Sopenharmony_ci	u32 resp_status;
3162306a36Sopenharmony_ci	u32 *resp_msg;
3262306a36Sopenharmony_ci	u16 resp_size;
3362306a36Sopenharmony_ci};
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL)
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ciint mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, struct mpfs_mss_msg *msg);
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_cistruct mpfs_sys_controller *mpfs_sys_controller_get(struct device *dev);
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_MCHP_CLK_MPFS)
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ciu32 mpfs_reset_read(struct device *dev);
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_civoid mpfs_reset_write(struct device *dev, u32 val);
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci#endif /* if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) */
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci#endif /* __SOC_MPFS_H__ */
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