162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * itg3200.h -- support InvenSense ITG3200
462306a36Sopenharmony_ci *              Digital 3-Axis Gyroscope driver
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Copyright (c) 2011 Christian Strobel <christian.strobel@iis.fraunhofer.de>
762306a36Sopenharmony_ci * Copyright (c) 2011 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
862306a36Sopenharmony_ci * Copyright (c) 2012 Thorsten Nowak <thorsten.nowak@iis.fraunhofer.de>
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#ifndef I2C_ITG3200_H_
1262306a36Sopenharmony_ci#define I2C_ITG3200_H_
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#include <linux/iio/iio.h>
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci/* Register with I2C address (34h) */
1762306a36Sopenharmony_ci#define ITG3200_REG_ADDRESS		0x00
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci/* Sample rate divider
2062306a36Sopenharmony_ci * Range: 0 to 255
2162306a36Sopenharmony_ci * Default value: 0x00 */
2262306a36Sopenharmony_ci#define ITG3200_REG_SAMPLE_RATE_DIV	0x15
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci/* Digital low pass filter settings */
2562306a36Sopenharmony_ci#define ITG3200_REG_DLPF		0x16
2662306a36Sopenharmony_ci/* DLPF full scale range */
2762306a36Sopenharmony_ci#define ITG3200_DLPF_FS_SEL_2000	0x18
2862306a36Sopenharmony_ci/* Bandwidth (Hz) and internal sample rate
2962306a36Sopenharmony_ci * (kHz) of DLPF */
3062306a36Sopenharmony_ci#define ITG3200_DLPF_256_8		0x00
3162306a36Sopenharmony_ci#define ITG3200_DLPF_188_1		0x01
3262306a36Sopenharmony_ci#define ITG3200_DLPF_98_1		0x02
3362306a36Sopenharmony_ci#define ITG3200_DLPF_42_1		0x03
3462306a36Sopenharmony_ci#define ITG3200_DLPF_20_1		0x04
3562306a36Sopenharmony_ci#define ITG3200_DLPF_10_1		0x05
3662306a36Sopenharmony_ci#define ITG3200_DLPF_5_1		0x06
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci#define ITG3200_DLPF_CFG_MASK		0x07
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci/* Configuration for interrupt operations */
4162306a36Sopenharmony_ci#define ITG3200_REG_IRQ_CONFIG		0x17
4262306a36Sopenharmony_ci/* Logic level */
4362306a36Sopenharmony_ci#define ITG3200_IRQ_ACTIVE_LOW		0x80
4462306a36Sopenharmony_ci#define ITG3200_IRQ_ACTIVE_HIGH		0x00
4562306a36Sopenharmony_ci/* Drive type */
4662306a36Sopenharmony_ci#define ITG3200_IRQ_OPEN_DRAIN		0x40
4762306a36Sopenharmony_ci#define ITG3200_IRQ_PUSH_PULL		0x00
4862306a36Sopenharmony_ci/* Latch mode */
4962306a36Sopenharmony_ci#define ITG3200_IRQ_LATCH_UNTIL_CLEARED	0x20
5062306a36Sopenharmony_ci#define ITG3200_IRQ_LATCH_50US_PULSE	0x00
5162306a36Sopenharmony_ci/* Latch clear method */
5262306a36Sopenharmony_ci#define ITG3200_IRQ_LATCH_CLEAR_ANY	0x10
5362306a36Sopenharmony_ci#define ITG3200_IRQ_LATCH_CLEAR_STATUS	0x00
5462306a36Sopenharmony_ci/* Enable interrupt when device is ready */
5562306a36Sopenharmony_ci#define ITG3200_IRQ_DEVICE_RDY_ENABLE	0x04
5662306a36Sopenharmony_ci/* Enable interrupt when data is available */
5762306a36Sopenharmony_ci#define ITG3200_IRQ_DATA_RDY_ENABLE	0x01
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci/* Determine the status of ITG-3200 interrupts */
6062306a36Sopenharmony_ci#define ITG3200_REG_IRQ_STATUS		0x1A
6162306a36Sopenharmony_ci/* Status of 'device is ready'-interrupt */
6262306a36Sopenharmony_ci#define ITG3200_IRQ_DEVICE_RDY_STATUS	0x04
6362306a36Sopenharmony_ci/* Status of 'data is available'-interrupt */
6462306a36Sopenharmony_ci#define ITG3200_IRQ_DATA_RDY_STATUS	0x01
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci/* Sensor registers */
6762306a36Sopenharmony_ci#define ITG3200_REG_TEMP_OUT_H		0x1B
6862306a36Sopenharmony_ci#define ITG3200_REG_TEMP_OUT_L		0x1C
6962306a36Sopenharmony_ci#define ITG3200_REG_GYRO_XOUT_H		0x1D
7062306a36Sopenharmony_ci#define ITG3200_REG_GYRO_XOUT_L		0x1E
7162306a36Sopenharmony_ci#define ITG3200_REG_GYRO_YOUT_H		0x1F
7262306a36Sopenharmony_ci#define ITG3200_REG_GYRO_YOUT_L		0x20
7362306a36Sopenharmony_ci#define ITG3200_REG_GYRO_ZOUT_H		0x21
7462306a36Sopenharmony_ci#define ITG3200_REG_GYRO_ZOUT_L		0x22
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci/* Power management */
7762306a36Sopenharmony_ci#define ITG3200_REG_POWER_MANAGEMENT	0x3E
7862306a36Sopenharmony_ci/* Reset device and internal registers to the
7962306a36Sopenharmony_ci * power-up-default settings */
8062306a36Sopenharmony_ci#define ITG3200_RESET			0x80
8162306a36Sopenharmony_ci/* Enable low power sleep mode */
8262306a36Sopenharmony_ci#define ITG3200_SLEEP			0x40
8362306a36Sopenharmony_ci/* Put according gyroscope in standby mode */
8462306a36Sopenharmony_ci#define ITG3200_STANDBY_GYRO_X		0x20
8562306a36Sopenharmony_ci#define ITG3200_STANDBY_GYRO_Y		0x10
8662306a36Sopenharmony_ci#define ITG3200_STANDBY_GYRO_Z		0x08
8762306a36Sopenharmony_ci/* Determine the device clock source */
8862306a36Sopenharmony_ci#define ITG3200_CLK_INTERNAL		0x00
8962306a36Sopenharmony_ci#define ITG3200_CLK_GYRO_X		0x01
9062306a36Sopenharmony_ci#define ITG3200_CLK_GYRO_Y		0x02
9162306a36Sopenharmony_ci#define ITG3200_CLK_GYRO_Z		0x03
9262306a36Sopenharmony_ci#define ITG3200_CLK_EXT_32K		0x04
9362306a36Sopenharmony_ci#define ITG3200_CLK_EXT_19M		0x05
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci/**
9762306a36Sopenharmony_ci * struct itg3200 - device instance specific data
9862306a36Sopenharmony_ci * @i2c:    actual i2c_client
9962306a36Sopenharmony_ci * @trig:   data ready trigger from itg3200 pin
10062306a36Sopenharmony_ci **/
10162306a36Sopenharmony_cistruct itg3200 {
10262306a36Sopenharmony_ci	struct i2c_client	*i2c;
10362306a36Sopenharmony_ci	struct iio_trigger	*trig;
10462306a36Sopenharmony_ci	struct iio_mount_matrix orientation;
10562306a36Sopenharmony_ci	/* lock to protect against multiple access to the device */
10662306a36Sopenharmony_ci	struct mutex		lock;
10762306a36Sopenharmony_ci};
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_cienum ITG3200_SCAN_INDEX {
11062306a36Sopenharmony_ci	ITG3200_SCAN_TEMP,
11162306a36Sopenharmony_ci	ITG3200_SCAN_GYRO_X,
11262306a36Sopenharmony_ci	ITG3200_SCAN_GYRO_Y,
11362306a36Sopenharmony_ci	ITG3200_SCAN_GYRO_Z,
11462306a36Sopenharmony_ci	ITG3200_SCAN_ELEMENTS,
11562306a36Sopenharmony_ci};
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ciint itg3200_write_reg_8(struct iio_dev *indio_dev,
11862306a36Sopenharmony_ci		u8 reg_address, u8 val);
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ciint itg3200_read_reg_8(struct iio_dev *indio_dev,
12162306a36Sopenharmony_ci		u8 reg_address, u8 *val);
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci#ifdef CONFIG_IIO_BUFFER
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_civoid itg3200_remove_trigger(struct iio_dev *indio_dev);
12762306a36Sopenharmony_ciint itg3200_probe_trigger(struct iio_dev *indio_dev);
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ciint itg3200_buffer_configure(struct iio_dev *indio_dev);
13062306a36Sopenharmony_civoid itg3200_buffer_unconfigure(struct iio_dev *indio_dev);
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci#else /* CONFIG_IIO_BUFFER */
13362306a36Sopenharmony_ci
13462306a36Sopenharmony_cistatic inline void itg3200_remove_trigger(struct iio_dev *indio_dev)
13562306a36Sopenharmony_ci{
13662306a36Sopenharmony_ci}
13762306a36Sopenharmony_ci
13862306a36Sopenharmony_cistatic inline int itg3200_probe_trigger(struct iio_dev *indio_dev)
13962306a36Sopenharmony_ci{
14062306a36Sopenharmony_ci	return 0;
14162306a36Sopenharmony_ci}
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_cistatic inline int itg3200_buffer_configure(struct iio_dev *indio_dev)
14462306a36Sopenharmony_ci{
14562306a36Sopenharmony_ci	return 0;
14662306a36Sopenharmony_ci}
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_cistatic inline void itg3200_buffer_unconfigure(struct iio_dev *indio_dev)
14962306a36Sopenharmony_ci{
15062306a36Sopenharmony_ci}
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci#endif  /* CONFIG_IIO_BUFFER */
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci#endif /* ITG3200_H_ */
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