162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2020 MediaTek Inc.
462306a36Sopenharmony_ci * Author: Yong Liang <yong.liang@mediatek.com>
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
862306a36Sopenharmony_ci#define _DT_BINDINGS_RESET_CONTROLLER_MT8192
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci/* TOPRGU resets */
1162306a36Sopenharmony_ci#define MT8192_TOPRGU_MM_SW_RST					1
1262306a36Sopenharmony_ci#define MT8192_TOPRGU_MFG_SW_RST				2
1362306a36Sopenharmony_ci#define MT8192_TOPRGU_VENC_SW_RST				3
1462306a36Sopenharmony_ci#define MT8192_TOPRGU_VDEC_SW_RST				4
1562306a36Sopenharmony_ci#define MT8192_TOPRGU_IMG_SW_RST				5
1662306a36Sopenharmony_ci#define MT8192_TOPRGU_MD_SW_RST					7
1762306a36Sopenharmony_ci#define MT8192_TOPRGU_CONN_SW_RST				9
1862306a36Sopenharmony_ci#define MT8192_TOPRGU_CONN_MCU_SW_RST			12
1962306a36Sopenharmony_ci#define MT8192_TOPRGU_IPU0_SW_RST				14
2062306a36Sopenharmony_ci#define MT8192_TOPRGU_IPU1_SW_RST				15
2162306a36Sopenharmony_ci#define MT8192_TOPRGU_AUDIO_SW_RST				17
2262306a36Sopenharmony_ci#define MT8192_TOPRGU_CAMSYS_SW_RST				18
2362306a36Sopenharmony_ci#define MT8192_TOPRGU_MJC_SW_RST				19
2462306a36Sopenharmony_ci#define MT8192_TOPRGU_C2K_S2_SW_RST				20
2562306a36Sopenharmony_ci#define MT8192_TOPRGU_C2K_SW_RST				21
2662306a36Sopenharmony_ci#define MT8192_TOPRGU_PERI_SW_RST				22
2762306a36Sopenharmony_ci#define MT8192_TOPRGU_PERI_AO_SW_RST			23
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci#define MT8192_TOPRGU_SW_RST_NUM				23
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci/* MMSYS resets */
3262306a36Sopenharmony_ci#define MT8192_MMSYS_SW0_RST_B_DISP_DSI0			15
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci/* INFRA resets */
3562306a36Sopenharmony_ci#define MT8192_INFRA_RST0_THERM_CTRL_SWRST		0
3662306a36Sopenharmony_ci#define MT8192_INFRA_RST2_PEXTP_PHY_SWRST		1
3762306a36Sopenharmony_ci#define MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST	2
3862306a36Sopenharmony_ci#define MT8192_INFRA_RST4_PCIE_TOP_SWRST		3
3962306a36Sopenharmony_ci#define MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST	4
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */
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