162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * This header provides constants for the STM32H7 RCC IP 362306a36Sopenharmony_ci */ 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#ifndef _DT_BINDINGS_MFD_STM32H7_RCC_H 662306a36Sopenharmony_ci#define _DT_BINDINGS_MFD_STM32H7_RCC_H 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci/* AHB3 */ 962306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_MDMA 0 1062306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_DMA2D 4 1162306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_JPGDEC 5 1262306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_FMC 12 1362306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_QUADSPI 14 1462306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_SDMMC1 16 1562306a36Sopenharmony_ci#define STM32H7_RCC_AHB3_CPU 31 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#define STM32H7_AHB3_RESET(bit) (STM32H7_RCC_AHB3_##bit + (0x7C * 8)) 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci/* AHB1 */ 2062306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_DMA1 0 2162306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_DMA2 1 2262306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_ADC12 5 2362306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_ART 14 2462306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_ETH1MAC 15 2562306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_USB1OTG 25 2662306a36Sopenharmony_ci#define STM32H7_RCC_AHB1_USB2OTG 27 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci#define STM32H7_AHB1_RESET(bit) (STM32H7_RCC_AHB1_##bit + (0x80 * 8)) 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci/* AHB2 */ 3162306a36Sopenharmony_ci#define STM32H7_RCC_AHB2_CAMITF 0 3262306a36Sopenharmony_ci#define STM32H7_RCC_AHB2_CRYPT 4 3362306a36Sopenharmony_ci#define STM32H7_RCC_AHB2_HASH 5 3462306a36Sopenharmony_ci#define STM32H7_RCC_AHB2_RNG 6 3562306a36Sopenharmony_ci#define STM32H7_RCC_AHB2_SDMMC2 9 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#define STM32H7_AHB2_RESET(bit) (STM32H7_RCC_AHB2_##bit + (0x84 * 8)) 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci/* AHB4 */ 4062306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOA 0 4162306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOB 1 4262306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOC 2 4362306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOD 3 4462306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOE 4 4562306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOF 5 4662306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOG 6 4762306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOH 7 4862306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOI 8 4962306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOJ 9 5062306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_GPIOK 10 5162306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_CRC 19 5262306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_BDMA 21 5362306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_ADC3 24 5462306a36Sopenharmony_ci#define STM32H7_RCC_AHB4_HSEM 25 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci#define STM32H7_AHB4_RESET(bit) (STM32H7_RCC_AHB4_##bit + (0x88 * 8)) 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/* APB3 */ 5962306a36Sopenharmony_ci#define STM32H7_RCC_APB3_LTDC 3 6062306a36Sopenharmony_ci#define STM32H7_RCC_APB3_DSI 4 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci#define STM32H7_APB3_RESET(bit) (STM32H7_RCC_APB3_##bit + (0x8C * 8)) 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci/* APB1L */ 6562306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM2 0 6662306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM3 1 6762306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM4 2 6862306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM5 3 6962306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM6 4 7062306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM7 5 7162306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM12 6 7262306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM13 7 7362306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_TIM14 8 7462306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_LPTIM1 9 7562306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_SPI2 14 7662306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_SPI3 15 7762306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_SPDIF_RX 16 7862306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_USART2 17 7962306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_USART3 18 8062306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_UART4 19 8162306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_UART5 20 8262306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_I2C1 21 8362306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_I2C2 22 8462306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_I2C3 23 8562306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_HDMICEC 27 8662306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_DAC12 29 8762306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_USART7 30 8862306a36Sopenharmony_ci#define STM32H7_RCC_APB1L_USART8 31 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci#define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci/* APB1H */ 9362306a36Sopenharmony_ci#define STM32H7_RCC_APB1H_CRS 1 9462306a36Sopenharmony_ci#define STM32H7_RCC_APB1H_SWP 2 9562306a36Sopenharmony_ci#define STM32H7_RCC_APB1H_OPAMP 4 9662306a36Sopenharmony_ci#define STM32H7_RCC_APB1H_MDIOS 5 9762306a36Sopenharmony_ci#define STM32H7_RCC_APB1H_FDCAN 8 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci#define STM32H7_APB1H_RESET(bit) (STM32H7_RCC_APB1H_##bit + (0x94 * 8)) 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci/* APB2 */ 10262306a36Sopenharmony_ci#define STM32H7_RCC_APB2_TIM1 0 10362306a36Sopenharmony_ci#define STM32H7_RCC_APB2_TIM8 1 10462306a36Sopenharmony_ci#define STM32H7_RCC_APB2_USART1 4 10562306a36Sopenharmony_ci#define STM32H7_RCC_APB2_USART6 5 10662306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SPI1 12 10762306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SPI4 13 10862306a36Sopenharmony_ci#define STM32H7_RCC_APB2_TIM15 16 10962306a36Sopenharmony_ci#define STM32H7_RCC_APB2_TIM16 17 11062306a36Sopenharmony_ci#define STM32H7_RCC_APB2_TIM17 18 11162306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SPI5 20 11262306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SAI1 22 11362306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SAI2 23 11462306a36Sopenharmony_ci#define STM32H7_RCC_APB2_SAI3 24 11562306a36Sopenharmony_ci#define STM32H7_RCC_APB2_DFSDM1 28 11662306a36Sopenharmony_ci#define STM32H7_RCC_APB2_HRTIM 29 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_ci#define STM32H7_APB2_RESET(bit) (STM32H7_RCC_APB2_##bit + (0x98 * 8)) 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci/* APB4 */ 12162306a36Sopenharmony_ci#define STM32H7_RCC_APB4_SYSCFG 1 12262306a36Sopenharmony_ci#define STM32H7_RCC_APB4_LPUART1 3 12362306a36Sopenharmony_ci#define STM32H7_RCC_APB4_SPI6 5 12462306a36Sopenharmony_ci#define STM32H7_RCC_APB4_I2C4 7 12562306a36Sopenharmony_ci#define STM32H7_RCC_APB4_LPTIM2 9 12662306a36Sopenharmony_ci#define STM32H7_RCC_APB4_LPTIM3 10 12762306a36Sopenharmony_ci#define STM32H7_RCC_APB4_LPTIM4 11 12862306a36Sopenharmony_ci#define STM32H7_RCC_APB4_LPTIM5 12 12962306a36Sopenharmony_ci#define STM32H7_RCC_APB4_COMP12 14 13062306a36Sopenharmony_ci#define STM32H7_RCC_APB4_VREF 15 13162306a36Sopenharmony_ci#define STM32H7_RCC_APB4_SAI4 21 13262306a36Sopenharmony_ci#define STM32H7_RCC_APB4_TMPSENS 26 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci#define STM32H7_APB4_RESET(bit) (STM32H7_RCC_APB4_##bit + (0x9C * 8)) 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci#endif /* _DT_BINDINGS_MFD_STM32H7_RCC_H */ 137