162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Copyright (C) 2017 Socionext Inc. 362306a36Sopenharmony_ci * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef _DT_BINDINGS_GPIO_UNIPHIER_H 762306a36Sopenharmony_ci#define _DT_BINDINGS_GPIO_UNIPHIER_H 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#define UNIPHIER_GPIO_LINES_PER_BANK 8 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#define UNIPHIER_GPIO_IRQ_OFFSET ((UNIPHIER_GPIO_LINES_PER_BANK) * 15) 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#define UNIPHIER_GPIO_PORT(bank, line) \ 1462306a36Sopenharmony_ci ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line)) 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#define UNIPHIER_GPIO_IRQ(n) ((UNIPHIER_GPIO_IRQ_OFFSET) + (n)) 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#endif /* _DT_BINDINGS_GPIO_UNIPHIER_H */ 19