162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */
362306a36Sopenharmony_ci
462306a36Sopenharmony_ci/*
562306a36Sopenharmony_ci * This header provides constants for the nvidia,tegra241-gpio DT binding.
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
862306a36Sopenharmony_ci * provide names for this.
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * The second cell contains standard flag values specified in gpio.h.
1162306a36Sopenharmony_ci */
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
1462306a36Sopenharmony_ci#define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h>
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci/* GPIOs implemented by main GPIO controller */
1962306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_A 0
2062306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_B 1
2162306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_C 2
2262306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_D 3
2362306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_E 4
2462306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_F 5
2562306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_G 6
2662306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_H 7
2762306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_I 8
2862306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_J 9
2962306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_K 10
3062306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO_PORT_L 11
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci#define TEGRA241_MAIN_GPIO(port, offset) \
3362306a36Sopenharmony_ci	((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci/* GPIOs implemented by AON GPIO controller */
3662306a36Sopenharmony_ci#define TEGRA241_AON_GPIO_PORT_AA 0
3762306a36Sopenharmony_ci#define TEGRA241_AON_GPIO_PORT_BB 1
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci#define TEGRA241_AON_GPIO(port, offset) \
4062306a36Sopenharmony_ci	((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci#endif
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