162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2019 SiFive, Inc. 462306a36Sopenharmony_ci * Wesley Terpstra 562306a36Sopenharmony_ci * Paul Walmsley 662306a36Sopenharmony_ci * Zong Li 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H 1062306a36Sopenharmony_ci#define __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/* Clock indexes for use by Device Tree data and the PRCI driver */ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#define FU740_PRCI_CLK_COREPLL 0 1562306a36Sopenharmony_ci#define FU740_PRCI_CLK_DDRPLL 1 1662306a36Sopenharmony_ci#define FU740_PRCI_CLK_GEMGXLPLL 2 1762306a36Sopenharmony_ci#define FU740_PRCI_CLK_DVFSCOREPLL 3 1862306a36Sopenharmony_ci#define FU740_PRCI_CLK_HFPCLKPLL 4 1962306a36Sopenharmony_ci#define FU740_PRCI_CLK_CLTXPLL 5 2062306a36Sopenharmony_ci#define FU740_PRCI_CLK_TLCLK 6 2162306a36Sopenharmony_ci#define FU740_PRCI_CLK_PCLK 7 2262306a36Sopenharmony_ci#define FU740_PRCI_CLK_PCIE_AUX 8 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci#endif /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */ 25