162306a36Sopenharmony_ci/* SPDX-License-Identifier: MIT
262306a36Sopenharmony_ci * Copyright (C) 2018 Intel Corp.
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Authors:
562306a36Sopenharmony_ci * Manasi Navare <manasi.d.navare@intel.com>
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#ifndef DRM_DSC_H_
962306a36Sopenharmony_ci#define DRM_DSC_H_
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include <drm/display/drm_dp.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci/* VESA Display Stream Compression DSC 1.2 constants */
1462306a36Sopenharmony_ci#define DSC_NUM_BUF_RANGES			15
1562306a36Sopenharmony_ci#define DSC_MUX_WORD_SIZE_8_10_BPC		48
1662306a36Sopenharmony_ci#define DSC_MUX_WORD_SIZE_12_BPC		64
1762306a36Sopenharmony_ci#define DSC_RC_PIXELS_PER_GROUP			3
1862306a36Sopenharmony_ci#define DSC_SCALE_DECREMENT_INTERVAL_MAX	4095
1962306a36Sopenharmony_ci#define DSC_RANGE_BPG_OFFSET_MASK		0x3f
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci/* DSC Rate Control Constants */
2262306a36Sopenharmony_ci#define DSC_RC_MODEL_SIZE_CONST		    8192
2362306a36Sopenharmony_ci#define DSC_RC_EDGE_FACTOR_CONST	    6
2462306a36Sopenharmony_ci#define DSC_RC_TGT_OFFSET_HI_CONST	    3
2562306a36Sopenharmony_ci#define DSC_RC_TGT_OFFSET_LO_CONST	    3
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci/* DSC PPS constants and macros */
2862306a36Sopenharmony_ci#define DSC_PPS_VERSION_MAJOR_SHIFT		4
2962306a36Sopenharmony_ci#define DSC_PPS_BPC_SHIFT			4
3062306a36Sopenharmony_ci#define DSC_PPS_MSB_SHIFT			8
3162306a36Sopenharmony_ci#define DSC_PPS_LSB_MASK			(0xFF << 0)
3262306a36Sopenharmony_ci#define DSC_PPS_BPP_HIGH_MASK			(0x3 << 8)
3362306a36Sopenharmony_ci#define DSC_PPS_VBR_EN_SHIFT			2
3462306a36Sopenharmony_ci#define DSC_PPS_SIMPLE422_SHIFT			3
3562306a36Sopenharmony_ci#define DSC_PPS_CONVERT_RGB_SHIFT		4
3662306a36Sopenharmony_ci#define DSC_PPS_BLOCK_PRED_EN_SHIFT		5
3762306a36Sopenharmony_ci#define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK	(0x3 << 8)
3862306a36Sopenharmony_ci#define DSC_PPS_SCALE_DEC_INT_HIGH_MASK		(0xF << 8)
3962306a36Sopenharmony_ci#define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT		4
4062306a36Sopenharmony_ci#define DSC_PPS_RC_RANGE_MINQP_SHIFT		11
4162306a36Sopenharmony_ci#define DSC_PPS_RC_RANGE_MAXQP_SHIFT		6
4262306a36Sopenharmony_ci#define DSC_PPS_NATIVE_420_SHIFT		1
4362306a36Sopenharmony_ci#define DSC_1_2_MAX_LINEBUF_DEPTH_BITS		16
4462306a36Sopenharmony_ci#define DSC_1_2_MAX_LINEBUF_DEPTH_VAL		0
4562306a36Sopenharmony_ci#define DSC_1_1_MAX_LINEBUF_DEPTH_BITS		13
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci/**
4862306a36Sopenharmony_ci * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
4962306a36Sopenharmony_ci *
5062306a36Sopenharmony_ci * This defines different rate control parameters used by the DSC engine
5162306a36Sopenharmony_ci * to compress the frame.
5262306a36Sopenharmony_ci */
5362306a36Sopenharmony_cistruct drm_dsc_rc_range_parameters {
5462306a36Sopenharmony_ci	/**
5562306a36Sopenharmony_ci	 * @range_min_qp: Min Quantization Parameters allowed for this range
5662306a36Sopenharmony_ci	 */
5762306a36Sopenharmony_ci	u8 range_min_qp;
5862306a36Sopenharmony_ci	/**
5962306a36Sopenharmony_ci	 * @range_max_qp: Max Quantization Parameters allowed for this range
6062306a36Sopenharmony_ci	 */
6162306a36Sopenharmony_ci	u8 range_max_qp;
6262306a36Sopenharmony_ci	/**
6362306a36Sopenharmony_ci	 * @range_bpg_offset:
6462306a36Sopenharmony_ci	 * Bits/group offset to apply to target for this group
6562306a36Sopenharmony_ci	 */
6662306a36Sopenharmony_ci	u8 range_bpg_offset;
6762306a36Sopenharmony_ci};
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci/**
7062306a36Sopenharmony_ci * struct drm_dsc_config - Parameters required to configure DSC
7162306a36Sopenharmony_ci *
7262306a36Sopenharmony_ci * Driver populates this structure with all the parameters required
7362306a36Sopenharmony_ci * to configure the display stream compression on the source.
7462306a36Sopenharmony_ci */
7562306a36Sopenharmony_cistruct drm_dsc_config {
7662306a36Sopenharmony_ci	/**
7762306a36Sopenharmony_ci	 * @line_buf_depth:
7862306a36Sopenharmony_ci	 * Bits per component for previous reconstructed line buffer
7962306a36Sopenharmony_ci	 */
8062306a36Sopenharmony_ci	u8 line_buf_depth;
8162306a36Sopenharmony_ci	/**
8262306a36Sopenharmony_ci	 * @bits_per_component: Bits per component to code (8/10/12)
8362306a36Sopenharmony_ci	 */
8462306a36Sopenharmony_ci	u8 bits_per_component;
8562306a36Sopenharmony_ci	/**
8662306a36Sopenharmony_ci	 * @convert_rgb:
8762306a36Sopenharmony_ci	 * Flag to indicate if RGB - YCoCg conversion is needed
8862306a36Sopenharmony_ci	 * True if RGB input, False if YCoCg input
8962306a36Sopenharmony_ci	 */
9062306a36Sopenharmony_ci	bool convert_rgb;
9162306a36Sopenharmony_ci	/**
9262306a36Sopenharmony_ci	 * @slice_count: Number fo slices per line used by the DSC encoder
9362306a36Sopenharmony_ci	 */
9462306a36Sopenharmony_ci	u8 slice_count;
9562306a36Sopenharmony_ci	/**
9662306a36Sopenharmony_ci	 *  @slice_width: Width of each slice in pixels
9762306a36Sopenharmony_ci	 */
9862306a36Sopenharmony_ci	u16 slice_width;
9962306a36Sopenharmony_ci	/**
10062306a36Sopenharmony_ci	 * @slice_height: Slice height in pixels
10162306a36Sopenharmony_ci	 */
10262306a36Sopenharmony_ci	u16 slice_height;
10362306a36Sopenharmony_ci	/**
10462306a36Sopenharmony_ci	 * @simple_422: True if simple 4_2_2 mode is enabled else False
10562306a36Sopenharmony_ci	 */
10662306a36Sopenharmony_ci	bool simple_422;
10762306a36Sopenharmony_ci	/**
10862306a36Sopenharmony_ci	 * @pic_width: Width of the input display frame in pixels
10962306a36Sopenharmony_ci	 */
11062306a36Sopenharmony_ci	u16 pic_width;
11162306a36Sopenharmony_ci	/**
11262306a36Sopenharmony_ci	 * @pic_height: Vertical height of the input display frame
11362306a36Sopenharmony_ci	 */
11462306a36Sopenharmony_ci	u16 pic_height;
11562306a36Sopenharmony_ci	/**
11662306a36Sopenharmony_ci	 * @rc_tgt_offset_high:
11762306a36Sopenharmony_ci	 * Offset to bits/group used by RC to determine QP adjustment
11862306a36Sopenharmony_ci	 */
11962306a36Sopenharmony_ci	u8 rc_tgt_offset_high;
12062306a36Sopenharmony_ci	/**
12162306a36Sopenharmony_ci	 * @rc_tgt_offset_low:
12262306a36Sopenharmony_ci	 * Offset to bits/group used by RC to determine QP adjustment
12362306a36Sopenharmony_ci	 */
12462306a36Sopenharmony_ci	u8 rc_tgt_offset_low;
12562306a36Sopenharmony_ci	/**
12662306a36Sopenharmony_ci	 * @bits_per_pixel:
12762306a36Sopenharmony_ci	 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
12862306a36Sopenharmony_ci	 */
12962306a36Sopenharmony_ci	u16 bits_per_pixel;
13062306a36Sopenharmony_ci	/**
13162306a36Sopenharmony_ci	 * @rc_edge_factor:
13262306a36Sopenharmony_ci	 * Factor to determine if an edge is present based on the bits produced
13362306a36Sopenharmony_ci	 */
13462306a36Sopenharmony_ci	u8 rc_edge_factor;
13562306a36Sopenharmony_ci	/**
13662306a36Sopenharmony_ci	 * @rc_quant_incr_limit1:
13762306a36Sopenharmony_ci	 * Slow down incrementing once the range reaches this value
13862306a36Sopenharmony_ci	 */
13962306a36Sopenharmony_ci	u8 rc_quant_incr_limit1;
14062306a36Sopenharmony_ci	/**
14162306a36Sopenharmony_ci	 * @rc_quant_incr_limit0:
14262306a36Sopenharmony_ci	 * Slow down incrementing once the range reaches this value
14362306a36Sopenharmony_ci	 */
14462306a36Sopenharmony_ci	u8 rc_quant_incr_limit0;
14562306a36Sopenharmony_ci	/**
14662306a36Sopenharmony_ci	 * @initial_xmit_delay:
14762306a36Sopenharmony_ci	 * Number of pixels to delay the initial transmission
14862306a36Sopenharmony_ci	 */
14962306a36Sopenharmony_ci	u16 initial_xmit_delay;
15062306a36Sopenharmony_ci	/**
15162306a36Sopenharmony_ci	 * @initial_dec_delay:
15262306a36Sopenharmony_ci	 * Initial decoder delay, number of pixel times that the decoder
15362306a36Sopenharmony_ci	 * accumulates data in its rate buffer before starting to decode
15462306a36Sopenharmony_ci	 * and output pixels.
15562306a36Sopenharmony_ci	 */
15662306a36Sopenharmony_ci	u16  initial_dec_delay;
15762306a36Sopenharmony_ci	/**
15862306a36Sopenharmony_ci	 * @block_pred_enable:
15962306a36Sopenharmony_ci	 * True if block prediction is used to code any groups within the
16062306a36Sopenharmony_ci	 * picture. False if BP not used
16162306a36Sopenharmony_ci	 */
16262306a36Sopenharmony_ci	bool block_pred_enable;
16362306a36Sopenharmony_ci	/**
16462306a36Sopenharmony_ci	 * @first_line_bpg_offset:
16562306a36Sopenharmony_ci	 * Number of additional bits allocated for each group on the first
16662306a36Sopenharmony_ci	 * line of slice.
16762306a36Sopenharmony_ci	 */
16862306a36Sopenharmony_ci	u8 first_line_bpg_offset;
16962306a36Sopenharmony_ci	/**
17062306a36Sopenharmony_ci	 * @initial_offset: Value to use for RC model offset at slice start
17162306a36Sopenharmony_ci	 */
17262306a36Sopenharmony_ci	u16 initial_offset;
17362306a36Sopenharmony_ci	/**
17462306a36Sopenharmony_ci	 * @rc_buf_thresh: Thresholds defining each of the buffer ranges
17562306a36Sopenharmony_ci	 */
17662306a36Sopenharmony_ci	u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
17762306a36Sopenharmony_ci	/**
17862306a36Sopenharmony_ci	 * @rc_range_params:
17962306a36Sopenharmony_ci	 * Parameters for each of the RC ranges defined in
18062306a36Sopenharmony_ci	 * &struct drm_dsc_rc_range_parameters
18162306a36Sopenharmony_ci	 */
18262306a36Sopenharmony_ci	struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
18362306a36Sopenharmony_ci	/**
18462306a36Sopenharmony_ci	 * @rc_model_size: Total size of RC model
18562306a36Sopenharmony_ci	 */
18662306a36Sopenharmony_ci	u16 rc_model_size;
18762306a36Sopenharmony_ci	/**
18862306a36Sopenharmony_ci	 * @flatness_min_qp: Minimum QP where flatness information is sent
18962306a36Sopenharmony_ci	 */
19062306a36Sopenharmony_ci	u8 flatness_min_qp;
19162306a36Sopenharmony_ci	/**
19262306a36Sopenharmony_ci	 * @flatness_max_qp: Maximum QP where flatness information is sent
19362306a36Sopenharmony_ci	 */
19462306a36Sopenharmony_ci	u8 flatness_max_qp;
19562306a36Sopenharmony_ci	/**
19662306a36Sopenharmony_ci	 * @initial_scale_value: Initial value for the scale factor
19762306a36Sopenharmony_ci	 */
19862306a36Sopenharmony_ci	u8 initial_scale_value;
19962306a36Sopenharmony_ci	/**
20062306a36Sopenharmony_ci	 * @scale_decrement_interval:
20162306a36Sopenharmony_ci	 * Specifies number of group times between decrementing the scale factor
20262306a36Sopenharmony_ci	 * at beginning of a slice.
20362306a36Sopenharmony_ci	 */
20462306a36Sopenharmony_ci	u16 scale_decrement_interval;
20562306a36Sopenharmony_ci	/**
20662306a36Sopenharmony_ci	 * @scale_increment_interval:
20762306a36Sopenharmony_ci	 * Number of group times between incrementing the scale factor value
20862306a36Sopenharmony_ci	 * used at the beginning of a slice.
20962306a36Sopenharmony_ci	 */
21062306a36Sopenharmony_ci	u16 scale_increment_interval;
21162306a36Sopenharmony_ci	/**
21262306a36Sopenharmony_ci	 * @nfl_bpg_offset: Non first line BPG offset to be used
21362306a36Sopenharmony_ci	 */
21462306a36Sopenharmony_ci	u16 nfl_bpg_offset;
21562306a36Sopenharmony_ci	/**
21662306a36Sopenharmony_ci	 * @slice_bpg_offset: BPG offset used to enforce slice bit
21762306a36Sopenharmony_ci	 */
21862306a36Sopenharmony_ci	u16 slice_bpg_offset;
21962306a36Sopenharmony_ci	/**
22062306a36Sopenharmony_ci	 * @final_offset: Final RC linear transformation offset value
22162306a36Sopenharmony_ci	 */
22262306a36Sopenharmony_ci	u16 final_offset;
22362306a36Sopenharmony_ci	/**
22462306a36Sopenharmony_ci	 * @vbr_enable: True if VBR mode is enabled, false if disabled
22562306a36Sopenharmony_ci	 */
22662306a36Sopenharmony_ci	bool vbr_enable;
22762306a36Sopenharmony_ci	/**
22862306a36Sopenharmony_ci	 * @mux_word_size: Mux word size (in bits) for SSM mode
22962306a36Sopenharmony_ci	 */
23062306a36Sopenharmony_ci	u8 mux_word_size;
23162306a36Sopenharmony_ci	/**
23262306a36Sopenharmony_ci	 * @slice_chunk_size:
23362306a36Sopenharmony_ci	 * The (max) size in bytes of the "chunks" that are used in slice
23462306a36Sopenharmony_ci	 * multiplexing.
23562306a36Sopenharmony_ci	 */
23662306a36Sopenharmony_ci	u16 slice_chunk_size;
23762306a36Sopenharmony_ci	/**
23862306a36Sopenharmony_ci	 * @rc_bits: Rate control buffer size in bits
23962306a36Sopenharmony_ci	 */
24062306a36Sopenharmony_ci	u16 rc_bits;
24162306a36Sopenharmony_ci	/**
24262306a36Sopenharmony_ci	 * @dsc_version_minor: DSC minor version
24362306a36Sopenharmony_ci	 */
24462306a36Sopenharmony_ci	u8 dsc_version_minor;
24562306a36Sopenharmony_ci	/**
24662306a36Sopenharmony_ci	 * @dsc_version_major: DSC major version
24762306a36Sopenharmony_ci	 */
24862306a36Sopenharmony_ci	u8 dsc_version_major;
24962306a36Sopenharmony_ci	/**
25062306a36Sopenharmony_ci	 * @native_422: True if Native 4:2:2 supported, else false
25162306a36Sopenharmony_ci	 */
25262306a36Sopenharmony_ci	bool native_422;
25362306a36Sopenharmony_ci	/**
25462306a36Sopenharmony_ci	 * @native_420: True if Native 4:2:0 supported else false.
25562306a36Sopenharmony_ci	 */
25662306a36Sopenharmony_ci	bool native_420;
25762306a36Sopenharmony_ci	/**
25862306a36Sopenharmony_ci	 * @second_line_bpg_offset:
25962306a36Sopenharmony_ci	 * Additional bits/grp for seconnd line of slice for native 4:2:0
26062306a36Sopenharmony_ci	 */
26162306a36Sopenharmony_ci	u8 second_line_bpg_offset;
26262306a36Sopenharmony_ci	/**
26362306a36Sopenharmony_ci	 * @nsl_bpg_offset:
26462306a36Sopenharmony_ci	 * Num of bits deallocated for each grp that is not in second line of
26562306a36Sopenharmony_ci	 * slice
26662306a36Sopenharmony_ci	 */
26762306a36Sopenharmony_ci	u16 nsl_bpg_offset;
26862306a36Sopenharmony_ci	/**
26962306a36Sopenharmony_ci	 * @second_line_offset_adj:
27062306a36Sopenharmony_ci	 * Offset adjustment for second line in Native 4:2:0 mode
27162306a36Sopenharmony_ci	 */
27262306a36Sopenharmony_ci	u16 second_line_offset_adj;
27362306a36Sopenharmony_ci};
27462306a36Sopenharmony_ci
27562306a36Sopenharmony_ci/**
27662306a36Sopenharmony_ci * struct drm_dsc_picture_parameter_set - Represents 128 bytes of
27762306a36Sopenharmony_ci * 	Picture Parameter Set
27862306a36Sopenharmony_ci *
27962306a36Sopenharmony_ci * The VESA DSC standard defines picture parameter set (PPS) which display
28062306a36Sopenharmony_ci * stream compression encoders must communicate to decoders.
28162306a36Sopenharmony_ci * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in
28262306a36Sopenharmony_ci * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2.
28362306a36Sopenharmony_ci * The PPS fields that span over more than a byte should be stored in Big Endian
28462306a36Sopenharmony_ci * format.
28562306a36Sopenharmony_ci */
28662306a36Sopenharmony_cistruct drm_dsc_picture_parameter_set {
28762306a36Sopenharmony_ci	/**
28862306a36Sopenharmony_ci	 * @dsc_version:
28962306a36Sopenharmony_ci	 * PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC
29062306a36Sopenharmony_ci	 * PPS0[7:4] - dsc_version_major: Contains major version of DSC
29162306a36Sopenharmony_ci	 */
29262306a36Sopenharmony_ci	u8 dsc_version;
29362306a36Sopenharmony_ci	/**
29462306a36Sopenharmony_ci	 * @pps_identifier:
29562306a36Sopenharmony_ci	 * PPS1[7:0] - Application specific identifier that can be
29662306a36Sopenharmony_ci	 * used to differentiate between different PPS tables.
29762306a36Sopenharmony_ci	 */
29862306a36Sopenharmony_ci	u8 pps_identifier;
29962306a36Sopenharmony_ci	/**
30062306a36Sopenharmony_ci	 * @pps_reserved:
30162306a36Sopenharmony_ci	 * PPS2[7:0]- RESERVED Byte
30262306a36Sopenharmony_ci	 */
30362306a36Sopenharmony_ci	u8 pps_reserved;
30462306a36Sopenharmony_ci	/**
30562306a36Sopenharmony_ci	 * @pps_3:
30662306a36Sopenharmony_ci	 * PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to
30762306a36Sopenharmony_ci	 * generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits,
30862306a36Sopenharmony_ci	 * 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits,
30962306a36Sopenharmony_ci	 * 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2.
31062306a36Sopenharmony_ci	 * PPS3[7:4] - bits_per_component: Bits per component for the original
31162306a36Sopenharmony_ci	 * pixels of the encoded picture.
31262306a36Sopenharmony_ci	 * 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2)
31362306a36Sopenharmony_ci	 * 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also
31462306a36Sopenharmony_ci	 * allowed only when dsc_minor_version = 0x2)
31562306a36Sopenharmony_ci	 */
31662306a36Sopenharmony_ci	u8 pps_3;
31762306a36Sopenharmony_ci	/**
31862306a36Sopenharmony_ci	 * @pps_4:
31962306a36Sopenharmony_ci	 * PPS4[1:0] -These are the most significant 2 bits of
32062306a36Sopenharmony_ci	 * compressed BPP bits_per_pixel[9:0] syntax element.
32162306a36Sopenharmony_ci	 * PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled
32262306a36Sopenharmony_ci	 * PPS4[3] - simple_422: Indicates if decoder drops samples to
32362306a36Sopenharmony_ci	 * reconstruct the 4:2:2 picture.
32462306a36Sopenharmony_ci	 * PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is
32562306a36Sopenharmony_ci	 * active.
32662306a36Sopenharmony_ci	 * PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any
32762306a36Sopenharmony_ci	 * groups in picture
32862306a36Sopenharmony_ci	 * PPS4[7:6] - Reseved bits
32962306a36Sopenharmony_ci	 */
33062306a36Sopenharmony_ci	u8 pps_4;
33162306a36Sopenharmony_ci	/**
33262306a36Sopenharmony_ci	 * @bits_per_pixel_low:
33362306a36Sopenharmony_ci	 * PPS5[7:0] - This indicates the lower significant 8 bits of
33462306a36Sopenharmony_ci	 * the compressed BPP bits_per_pixel[9:0] element.
33562306a36Sopenharmony_ci	 */
33662306a36Sopenharmony_ci	u8 bits_per_pixel_low;
33762306a36Sopenharmony_ci	/**
33862306a36Sopenharmony_ci	 * @pic_height:
33962306a36Sopenharmony_ci	 * PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows
34062306a36Sopenharmony_ci	 * within the raster.
34162306a36Sopenharmony_ci	 */
34262306a36Sopenharmony_ci	__be16 pic_height;
34362306a36Sopenharmony_ci	/**
34462306a36Sopenharmony_ci	 * @pic_width:
34562306a36Sopenharmony_ci	 * PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within
34662306a36Sopenharmony_ci	 * the raster.
34762306a36Sopenharmony_ci	 */
34862306a36Sopenharmony_ci	__be16 pic_width;
34962306a36Sopenharmony_ci	/**
35062306a36Sopenharmony_ci	 * @slice_height:
35162306a36Sopenharmony_ci	 * PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.
35262306a36Sopenharmony_ci	 */
35362306a36Sopenharmony_ci	__be16 slice_height;
35462306a36Sopenharmony_ci	/**
35562306a36Sopenharmony_ci	 * @slice_width:
35662306a36Sopenharmony_ci	 * PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.
35762306a36Sopenharmony_ci	 */
35862306a36Sopenharmony_ci	__be16 slice_width;
35962306a36Sopenharmony_ci	/**
36062306a36Sopenharmony_ci	 * @chunk_size:
36162306a36Sopenharmony_ci	 * PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks
36262306a36Sopenharmony_ci	 * that are used for slice multiplexing.
36362306a36Sopenharmony_ci	 */
36462306a36Sopenharmony_ci	__be16 chunk_size;
36562306a36Sopenharmony_ci	/**
36662306a36Sopenharmony_ci	 * @initial_xmit_delay_high:
36762306a36Sopenharmony_ci	 * PPS16[1:0] - Most Significant two bits of initial transmission delay.
36862306a36Sopenharmony_ci	 * It specifies the number of pixel times that the encoder waits before
36962306a36Sopenharmony_ci	 * transmitting data from its rate buffer.
37062306a36Sopenharmony_ci	 * PPS16[7:2] - Reserved
37162306a36Sopenharmony_ci	 */
37262306a36Sopenharmony_ci	u8 initial_xmit_delay_high;
37362306a36Sopenharmony_ci	/**
37462306a36Sopenharmony_ci	 * @initial_xmit_delay_low:
37562306a36Sopenharmony_ci	 * PPS17[7:0] - Least significant 8 bits of initial transmission delay.
37662306a36Sopenharmony_ci	 */
37762306a36Sopenharmony_ci	u8 initial_xmit_delay_low;
37862306a36Sopenharmony_ci	/**
37962306a36Sopenharmony_ci	 * @initial_dec_delay:
38062306a36Sopenharmony_ci	 *
38162306a36Sopenharmony_ci	 * PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number
38262306a36Sopenharmony_ci	 * of pixel times that the decoder accumulates data in its rate buffer
38362306a36Sopenharmony_ci	 * before starting to decode and output pixels.
38462306a36Sopenharmony_ci	 */
38562306a36Sopenharmony_ci	__be16 initial_dec_delay;
38662306a36Sopenharmony_ci	/**
38762306a36Sopenharmony_ci	 * @pps20_reserved:
38862306a36Sopenharmony_ci	 *
38962306a36Sopenharmony_ci	 * PPS20[7:0] - Reserved
39062306a36Sopenharmony_ci	 */
39162306a36Sopenharmony_ci	u8 pps20_reserved;
39262306a36Sopenharmony_ci	/**
39362306a36Sopenharmony_ci	 * @initial_scale_value:
39462306a36Sopenharmony_ci	 * PPS21[5:0] - Initial rcXformScale factor used at beginning
39562306a36Sopenharmony_ci	 * of a slice.
39662306a36Sopenharmony_ci	 * PPS21[7:6] - Reserved
39762306a36Sopenharmony_ci	 */
39862306a36Sopenharmony_ci	u8 initial_scale_value;
39962306a36Sopenharmony_ci	/**
40062306a36Sopenharmony_ci	 * @scale_increment_interval:
40162306a36Sopenharmony_ci	 * PPS22[7:0], PPS23[7:0] - Number of group times between incrementing
40262306a36Sopenharmony_ci	 * the rcXformScale factor at end of a slice.
40362306a36Sopenharmony_ci	 */
40462306a36Sopenharmony_ci	__be16 scale_increment_interval;
40562306a36Sopenharmony_ci	/**
40662306a36Sopenharmony_ci	 * @scale_decrement_interval_high:
40762306a36Sopenharmony_ci	 * PPS24[3:0] - Higher 4 bits indicating number of group times between
40862306a36Sopenharmony_ci	 * decrementing the rcXformScale factor at beginning of a slice.
40962306a36Sopenharmony_ci	 * PPS24[7:4] - Reserved
41062306a36Sopenharmony_ci	 */
41162306a36Sopenharmony_ci	u8 scale_decrement_interval_high;
41262306a36Sopenharmony_ci	/**
41362306a36Sopenharmony_ci	 * @scale_decrement_interval_low:
41462306a36Sopenharmony_ci	 * PPS25[7:0] - Lower 8 bits of scale decrement interval
41562306a36Sopenharmony_ci	 */
41662306a36Sopenharmony_ci	u8 scale_decrement_interval_low;
41762306a36Sopenharmony_ci	/**
41862306a36Sopenharmony_ci	 * @pps26_reserved:
41962306a36Sopenharmony_ci	 * PPS26[7:0]
42062306a36Sopenharmony_ci	 */
42162306a36Sopenharmony_ci	u8 pps26_reserved;
42262306a36Sopenharmony_ci	/**
42362306a36Sopenharmony_ci	 * @first_line_bpg_offset:
42462306a36Sopenharmony_ci	 * PPS27[4:0] - Number of additional bits that are allocated
42562306a36Sopenharmony_ci	 * for each group on first line of a slice.
42662306a36Sopenharmony_ci	 * PPS27[7:5] - Reserved
42762306a36Sopenharmony_ci	 */
42862306a36Sopenharmony_ci	u8 first_line_bpg_offset;
42962306a36Sopenharmony_ci	/**
43062306a36Sopenharmony_ci	 * @nfl_bpg_offset:
43162306a36Sopenharmony_ci	 * PPS28[7:0], PPS29[7:0] - Number of bits including frac bits
43262306a36Sopenharmony_ci	 * deallocated for each group for groups after the first line of slice.
43362306a36Sopenharmony_ci	 */
43462306a36Sopenharmony_ci	__be16 nfl_bpg_offset;
43562306a36Sopenharmony_ci	/**
43662306a36Sopenharmony_ci	 * @slice_bpg_offset:
43762306a36Sopenharmony_ci	 * PPS30, PPS31[7:0] - Number of bits that are deallocated for each
43862306a36Sopenharmony_ci	 * group to enforce the slice constraint.
43962306a36Sopenharmony_ci	 */
44062306a36Sopenharmony_ci	__be16 slice_bpg_offset;
44162306a36Sopenharmony_ci	/**
44262306a36Sopenharmony_ci	 * @initial_offset:
44362306a36Sopenharmony_ci	 * PPS32,33[7:0] - Initial value for rcXformOffset
44462306a36Sopenharmony_ci	 */
44562306a36Sopenharmony_ci	__be16 initial_offset;
44662306a36Sopenharmony_ci	/**
44762306a36Sopenharmony_ci	 * @final_offset:
44862306a36Sopenharmony_ci	 * PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset
44962306a36Sopenharmony_ci	 */
45062306a36Sopenharmony_ci	__be16 final_offset;
45162306a36Sopenharmony_ci	/**
45262306a36Sopenharmony_ci	 * @flatness_min_qp:
45362306a36Sopenharmony_ci	 * PPS36[4:0] - Minimum QP at which flatness is signaled and
45462306a36Sopenharmony_ci	 * flatness QP adjustment is made.
45562306a36Sopenharmony_ci	 * PPS36[7:5] - Reserved
45662306a36Sopenharmony_ci	 */
45762306a36Sopenharmony_ci	u8 flatness_min_qp;
45862306a36Sopenharmony_ci	/**
45962306a36Sopenharmony_ci	 * @flatness_max_qp:
46062306a36Sopenharmony_ci	 * PPS37[4:0] - Max QP at which flatness is signalled and
46162306a36Sopenharmony_ci	 * the flatness adjustment is made.
46262306a36Sopenharmony_ci	 * PPS37[7:5] - Reserved
46362306a36Sopenharmony_ci	 */
46462306a36Sopenharmony_ci	u8 flatness_max_qp;
46562306a36Sopenharmony_ci	/**
46662306a36Sopenharmony_ci	 * @rc_model_size:
46762306a36Sopenharmony_ci	 * PPS38,39[7:0] - Number of bits within RC Model.
46862306a36Sopenharmony_ci	 */
46962306a36Sopenharmony_ci	__be16 rc_model_size;
47062306a36Sopenharmony_ci	/**
47162306a36Sopenharmony_ci	 * @rc_edge_factor:
47262306a36Sopenharmony_ci	 * PPS40[3:0] - Ratio of current activity vs, previous
47362306a36Sopenharmony_ci	 * activity to determine presence of edge.
47462306a36Sopenharmony_ci	 * PPS40[7:4] - Reserved
47562306a36Sopenharmony_ci	 */
47662306a36Sopenharmony_ci	u8 rc_edge_factor;
47762306a36Sopenharmony_ci	/**
47862306a36Sopenharmony_ci	 * @rc_quant_incr_limit0:
47962306a36Sopenharmony_ci	 * PPS41[4:0] - QP threshold used in short term RC
48062306a36Sopenharmony_ci	 * PPS41[7:5] - Reserved
48162306a36Sopenharmony_ci	 */
48262306a36Sopenharmony_ci	u8 rc_quant_incr_limit0;
48362306a36Sopenharmony_ci	/**
48462306a36Sopenharmony_ci	 * @rc_quant_incr_limit1:
48562306a36Sopenharmony_ci	 * PPS42[4:0] - QP threshold used in short term RC
48662306a36Sopenharmony_ci	 * PPS42[7:5] - Reserved
48762306a36Sopenharmony_ci	 */
48862306a36Sopenharmony_ci	u8 rc_quant_incr_limit1;
48962306a36Sopenharmony_ci	/**
49062306a36Sopenharmony_ci	 * @rc_tgt_offset:
49162306a36Sopenharmony_ci	 * PPS43[3:0] - Lower end of the variability range around the target
49262306a36Sopenharmony_ci	 * bits per group that is allowed by short term RC.
49362306a36Sopenharmony_ci	 * PPS43[7:4]- Upper end of the variability range around the target
49462306a36Sopenharmony_ci	 * bits per group that i allowed by short term rc.
49562306a36Sopenharmony_ci	 */
49662306a36Sopenharmony_ci	u8 rc_tgt_offset;
49762306a36Sopenharmony_ci	/**
49862306a36Sopenharmony_ci	 * @rc_buf_thresh:
49962306a36Sopenharmony_ci	 * PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for
50062306a36Sopenharmony_ci	 * the 15 ranges defined by 14 thresholds.
50162306a36Sopenharmony_ci	 */
50262306a36Sopenharmony_ci	u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
50362306a36Sopenharmony_ci	/**
50462306a36Sopenharmony_ci	 * @rc_range_parameters:
50562306a36Sopenharmony_ci	 * PPS58[7:0] - PPS87[7:0]
50662306a36Sopenharmony_ci	 * Parameters that correspond to each of the 15 ranges.
50762306a36Sopenharmony_ci	 */
50862306a36Sopenharmony_ci	__be16 rc_range_parameters[DSC_NUM_BUF_RANGES];
50962306a36Sopenharmony_ci	/**
51062306a36Sopenharmony_ci	 * @native_422_420:
51162306a36Sopenharmony_ci	 * PPS88[0] - 0 = Native 4:2:2 not used
51262306a36Sopenharmony_ci	 * 1 = Native 4:2:2 used
51362306a36Sopenharmony_ci	 * PPS88[1] - 0 = Native 4:2:0 not use
51462306a36Sopenharmony_ci	 * 1 = Native 4:2:0 used
51562306a36Sopenharmony_ci	 * PPS88[7:2] - Reserved 6 bits
51662306a36Sopenharmony_ci	 */
51762306a36Sopenharmony_ci	u8 native_422_420;
51862306a36Sopenharmony_ci	/**
51962306a36Sopenharmony_ci	 * @second_line_bpg_offset:
52062306a36Sopenharmony_ci	 * PPS89[4:0] - Additional bits/group budget for the
52162306a36Sopenharmony_ci	 * second line of a slice in Native 4:2:0 mode.
52262306a36Sopenharmony_ci	 * Set to 0 if DSC minor version is 1 or native420 is 0.
52362306a36Sopenharmony_ci	 * PPS89[7:5] - Reserved
52462306a36Sopenharmony_ci	 */
52562306a36Sopenharmony_ci	u8 second_line_bpg_offset;
52662306a36Sopenharmony_ci	/**
52762306a36Sopenharmony_ci	 * @nsl_bpg_offset:
52862306a36Sopenharmony_ci	 * PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated
52962306a36Sopenharmony_ci	 * for each group that is not in the second line of a slice.
53062306a36Sopenharmony_ci	 */
53162306a36Sopenharmony_ci	__be16 nsl_bpg_offset;
53262306a36Sopenharmony_ci	/**
53362306a36Sopenharmony_ci	 * @second_line_offset_adj:
53462306a36Sopenharmony_ci	 * PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second
53562306a36Sopenharmony_ci	 * line in Native 4:2:0 mode.
53662306a36Sopenharmony_ci	 */
53762306a36Sopenharmony_ci	__be16 second_line_offset_adj;
53862306a36Sopenharmony_ci	/**
53962306a36Sopenharmony_ci	 * @pps_long_94_reserved:
54062306a36Sopenharmony_ci	 * PPS 94, 95, 96, 97 - Reserved
54162306a36Sopenharmony_ci	 */
54262306a36Sopenharmony_ci	u32 pps_long_94_reserved;
54362306a36Sopenharmony_ci	/**
54462306a36Sopenharmony_ci	 * @pps_long_98_reserved:
54562306a36Sopenharmony_ci	 * PPS 98, 99, 100, 101 - Reserved
54662306a36Sopenharmony_ci	 */
54762306a36Sopenharmony_ci	u32 pps_long_98_reserved;
54862306a36Sopenharmony_ci	/**
54962306a36Sopenharmony_ci	 * @pps_long_102_reserved:
55062306a36Sopenharmony_ci	 * PPS 102, 103, 104, 105 - Reserved
55162306a36Sopenharmony_ci	 */
55262306a36Sopenharmony_ci	u32 pps_long_102_reserved;
55362306a36Sopenharmony_ci	/**
55462306a36Sopenharmony_ci	 * @pps_long_106_reserved:
55562306a36Sopenharmony_ci	 * PPS 106, 107, 108, 109 - reserved
55662306a36Sopenharmony_ci	 */
55762306a36Sopenharmony_ci	u32 pps_long_106_reserved;
55862306a36Sopenharmony_ci	/**
55962306a36Sopenharmony_ci	 * @pps_long_110_reserved:
56062306a36Sopenharmony_ci	 * PPS 110, 111, 112, 113 - reserved
56162306a36Sopenharmony_ci	 */
56262306a36Sopenharmony_ci	u32 pps_long_110_reserved;
56362306a36Sopenharmony_ci	/**
56462306a36Sopenharmony_ci	 * @pps_long_114_reserved:
56562306a36Sopenharmony_ci	 * PPS 114 - 117 - reserved
56662306a36Sopenharmony_ci	 */
56762306a36Sopenharmony_ci	u32 pps_long_114_reserved;
56862306a36Sopenharmony_ci	/**
56962306a36Sopenharmony_ci	 * @pps_long_118_reserved:
57062306a36Sopenharmony_ci	 * PPS 118 - 121 - reserved
57162306a36Sopenharmony_ci	 */
57262306a36Sopenharmony_ci	u32 pps_long_118_reserved;
57362306a36Sopenharmony_ci	/**
57462306a36Sopenharmony_ci	 * @pps_long_122_reserved:
57562306a36Sopenharmony_ci	 * PPS 122- 125 - reserved
57662306a36Sopenharmony_ci	 */
57762306a36Sopenharmony_ci	u32 pps_long_122_reserved;
57862306a36Sopenharmony_ci	/**
57962306a36Sopenharmony_ci	 * @pps_short_126_reserved:
58062306a36Sopenharmony_ci	 * PPS 126, 127 - reserved
58162306a36Sopenharmony_ci	 */
58262306a36Sopenharmony_ci	__be16 pps_short_126_reserved;
58362306a36Sopenharmony_ci} __packed;
58462306a36Sopenharmony_ci
58562306a36Sopenharmony_ci/**
58662306a36Sopenharmony_ci * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter
58762306a36Sopenharmony_ci * Set Metadata
58862306a36Sopenharmony_ci *
58962306a36Sopenharmony_ci * This structure represents the DSC PPS infoframe required to send the Picture
59062306a36Sopenharmony_ci * Parameter Set metadata required before enabling VESA Display Stream
59162306a36Sopenharmony_ci * Compression. This is based on the DP Secondary Data Packet structure and
59262306a36Sopenharmony_ci * comprises of SDP Header as defined &struct dp_sdp_header in drm_dp_helper.h
59362306a36Sopenharmony_ci * and PPS payload defined in &struct drm_dsc_picture_parameter_set.
59462306a36Sopenharmony_ci *
59562306a36Sopenharmony_ci * @pps_header: Header for PPS as per DP SDP header format of type
59662306a36Sopenharmony_ci *              &struct dp_sdp_header
59762306a36Sopenharmony_ci * @pps_payload: PPS payload fields as per DSC specification Table 4-1
59862306a36Sopenharmony_ci *               as represented in &struct drm_dsc_picture_parameter_set
59962306a36Sopenharmony_ci */
60062306a36Sopenharmony_cistruct drm_dsc_pps_infoframe {
60162306a36Sopenharmony_ci	struct dp_sdp_header pps_header;
60262306a36Sopenharmony_ci	struct drm_dsc_picture_parameter_set pps_payload;
60362306a36Sopenharmony_ci} __packed;
60462306a36Sopenharmony_ci
60562306a36Sopenharmony_ci#endif /* _DRM_DSC_H_ */
606