1/* 2 * Driver for AT91 LCD Controller 3 * 4 * Copyright (C) 2007 Atmel Corporation 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive for 8 * more details. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/platform_device.h> 13#include <linux/dma-mapping.h> 14#include <linux/interrupt.h> 15#include <linux/clk.h> 16#include <linux/fb.h> 17#include <linux/init.h> 18#include <linux/delay.h> 19#include <linux/backlight.h> 20#include <linux/gfp.h> 21#include <linux/gpio/consumer.h> 22#include <linux/module.h> 23#include <linux/of.h> 24#include <linux/of_device.h> 25#include <video/of_videomode.h> 26#include <video/of_display_timing.h> 27#include <linux/regulator/consumer.h> 28#include <video/videomode.h> 29 30#include <video/atmel_lcdc.h> 31 32struct atmel_lcdfb_config { 33 bool have_alt_pixclock; 34 bool have_hozval; 35 bool have_intensity_bit; 36}; 37 38 /* LCD Controller info data structure, stored in device platform_data */ 39struct atmel_lcdfb_info { 40 spinlock_t lock; 41 struct fb_info *info; 42 void __iomem *mmio; 43 int irq_base; 44 struct work_struct task; 45 46 unsigned int smem_len; 47 struct platform_device *pdev; 48 struct clk *bus_clk; 49 struct clk *lcdc_clk; 50 51 struct backlight_device *backlight; 52 u8 saved_lcdcon; 53 54 u32 pseudo_palette[16]; 55 bool have_intensity_bit; 56 57 struct atmel_lcdfb_pdata pdata; 58 59 struct atmel_lcdfb_config *config; 60 struct regulator *reg_lcd; 61}; 62 63struct atmel_lcdfb_power_ctrl_gpio { 64 struct gpio_desc *gpiod; 65 66 struct list_head list; 67}; 68 69#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) 70#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) 71 72/* configurable parameters */ 73#define ATMEL_LCDC_CVAL_DEFAULT 0xc8 74#define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */ 75#define ATMEL_LCDC_FIFO_SIZE 512 /* words */ 76 77static struct atmel_lcdfb_config at91sam9261_config = { 78 .have_hozval = true, 79 .have_intensity_bit = true, 80}; 81 82static struct atmel_lcdfb_config at91sam9263_config = { 83 .have_intensity_bit = true, 84}; 85 86static struct atmel_lcdfb_config at91sam9g10_config = { 87 .have_hozval = true, 88}; 89 90static struct atmel_lcdfb_config at91sam9g45_config = { 91 .have_alt_pixclock = true, 92}; 93 94static struct atmel_lcdfb_config at91sam9g45es_config = { 95}; 96 97static struct atmel_lcdfb_config at91sam9rl_config = { 98 .have_intensity_bit = true, 99}; 100 101static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 102 | ATMEL_LCDC_POL_POSITIVE 103 | ATMEL_LCDC_ENA_PWMENABLE; 104 105#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC 106 107/* some bl->props field just changed */ 108static int atmel_bl_update_status(struct backlight_device *bl) 109{ 110 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 111 int brightness = backlight_get_brightness(bl); 112 113 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness); 114 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE) 115 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 116 brightness ? contrast_ctr : 0); 117 else 118 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 119 120 return 0; 121} 122 123static int atmel_bl_get_brightness(struct backlight_device *bl) 124{ 125 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 126 127 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 128} 129 130static const struct backlight_ops atmel_lcdc_bl_ops = { 131 .update_status = atmel_bl_update_status, 132 .get_brightness = atmel_bl_get_brightness, 133}; 134 135static void init_backlight(struct atmel_lcdfb_info *sinfo) 136{ 137 struct backlight_properties props; 138 struct backlight_device *bl; 139 140 if (sinfo->backlight) 141 return; 142 143 memset(&props, 0, sizeof(struct backlight_properties)); 144 props.type = BACKLIGHT_RAW; 145 props.max_brightness = 0xff; 146 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo, 147 &atmel_lcdc_bl_ops, &props); 148 if (IS_ERR(bl)) { 149 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n", 150 PTR_ERR(bl)); 151 return; 152 } 153 sinfo->backlight = bl; 154 155 bl->props.power = FB_BLANK_UNBLANK; 156 bl->props.fb_blank = FB_BLANK_UNBLANK; 157 bl->props.brightness = atmel_bl_get_brightness(bl); 158} 159 160static void exit_backlight(struct atmel_lcdfb_info *sinfo) 161{ 162 if (!sinfo->backlight) 163 return; 164 165 if (sinfo->backlight->ops) { 166 sinfo->backlight->props.power = FB_BLANK_POWERDOWN; 167 sinfo->backlight->ops->update_status(sinfo->backlight); 168 } 169 backlight_device_unregister(sinfo->backlight); 170} 171 172#else 173 174static void init_backlight(struct atmel_lcdfb_info *sinfo) 175{ 176 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n"); 177} 178 179static void exit_backlight(struct atmel_lcdfb_info *sinfo) 180{ 181} 182 183#endif 184 185static void init_contrast(struct atmel_lcdfb_info *sinfo) 186{ 187 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 188 189 /* contrast pwm can be 'inverted' */ 190 if (pdata->lcdcon_pol_negative) 191 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE); 192 193 /* have some default contrast/backlight settings */ 194 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 195 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); 196 197 if (pdata->lcdcon_is_backlight) 198 init_backlight(sinfo); 199} 200 201static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on) 202{ 203 int ret; 204 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 205 206 if (pdata->atmel_lcdfb_power_control) 207 pdata->atmel_lcdfb_power_control(pdata, on); 208 else if (sinfo->reg_lcd) { 209 if (on) { 210 ret = regulator_enable(sinfo->reg_lcd); 211 if (ret) 212 dev_err(&sinfo->pdev->dev, 213 "lcd regulator enable failed: %d\n", ret); 214 } else { 215 ret = regulator_disable(sinfo->reg_lcd); 216 if (ret) 217 dev_err(&sinfo->pdev->dev, 218 "lcd regulator disable failed: %d\n", ret); 219 } 220 } 221} 222 223static const struct fb_fix_screeninfo atmel_lcdfb_fix __initconst = { 224 .type = FB_TYPE_PACKED_PIXELS, 225 .visual = FB_VISUAL_TRUECOLOR, 226 .xpanstep = 0, 227 .ypanstep = 1, 228 .ywrapstep = 0, 229 .accel = FB_ACCEL_NONE, 230}; 231 232static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo, 233 unsigned long xres) 234{ 235 unsigned long lcdcon2; 236 unsigned long value; 237 238 if (!sinfo->config->have_hozval) 239 return xres; 240 241 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2); 242 value = xres; 243 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { 244 /* STN display */ 245 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { 246 value *= 3; 247 } 248 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 249 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 250 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) 251 value = DIV_ROUND_UP(value, 4); 252 else 253 value = DIV_ROUND_UP(value, 8); 254 } 255 256 return value; 257} 258 259static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) 260{ 261 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 262 263 /* Turn off the LCD controller and the DMA controller */ 264 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 265 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET); 266 267 /* Wait for the LCDC core to become idle */ 268 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) 269 msleep(10); 270 271 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); 272} 273 274static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) 275{ 276 atmel_lcdfb_stop_nowait(sinfo); 277 278 /* Wait for DMA engine to become idle... */ 279 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 280 msleep(10); 281} 282 283static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) 284{ 285 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 286 287 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon); 288 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 289 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET) 290 | ATMEL_LCDC_PWR); 291} 292 293static void atmel_lcdfb_update_dma(struct fb_info *info, 294 struct fb_var_screeninfo *var) 295{ 296 struct atmel_lcdfb_info *sinfo = info->par; 297 struct fb_fix_screeninfo *fix = &info->fix; 298 unsigned long dma_addr; 299 300 dma_addr = (fix->smem_start + var->yoffset * fix->line_length 301 + var->xoffset * info->var.bits_per_pixel / 8); 302 303 dma_addr &= ~3UL; 304 305 /* Set framebuffer DMA base address and pixel offset */ 306 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); 307} 308 309static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) 310{ 311 struct fb_info *info = sinfo->info; 312 313 dma_free_wc(info->device, info->fix.smem_len, info->screen_base, 314 info->fix.smem_start); 315} 316 317/** 318 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory 319 * @sinfo: the frame buffer to allocate memory for 320 * 321 * This function is called only from the atmel_lcdfb_probe() 322 * so no locking by fb_info->mm_lock around smem_len setting is needed. 323 */ 324static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) 325{ 326 struct fb_info *info = sinfo->info; 327 struct fb_var_screeninfo *var = &info->var; 328 unsigned int smem_len; 329 330 smem_len = (var->xres_virtual * var->yres_virtual 331 * ((var->bits_per_pixel + 7) / 8)); 332 info->fix.smem_len = max(smem_len, sinfo->smem_len); 333 334 info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len, 335 (dma_addr_t *)&info->fix.smem_start, 336 GFP_KERNEL); 337 338 if (!info->screen_base) { 339 return -ENOMEM; 340 } 341 342 memset(info->screen_base, 0, info->fix.smem_len); 343 344 return 0; 345} 346 347static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var, 348 struct fb_info *info) 349{ 350 struct fb_videomode varfbmode; 351 const struct fb_videomode *fbmode = NULL; 352 353 fb_var_to_videomode(&varfbmode, var); 354 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist); 355 if (fbmode) 356 fb_videomode_to_var(var, fbmode); 357 return fbmode; 358} 359 360 361/** 362 * atmel_lcdfb_check_var - Validates a var passed in. 363 * @var: frame buffer variable screen structure 364 * @info: frame buffer structure that represents a single frame buffer 365 * 366 * Checks to see if the hardware supports the state requested by 367 * var passed in. This function does not alter the hardware 368 * state!!! This means the data stored in struct fb_info and 369 * struct atmel_lcdfb_info do not change. This includes the var 370 * inside of struct fb_info. Do NOT change these. This function 371 * can be called on its own if we intent to only test a mode and 372 * not actually set it. The stuff in modedb.c is a example of 373 * this. If the var passed in is slightly off by what the 374 * hardware can support then we alter the var PASSED in to what 375 * we can do. If the hardware doesn't support mode change a 376 * -EINVAL will be returned by the upper layers. You don't need 377 * to implement this function then. If you hardware doesn't 378 * support changing the resolution then this function is not 379 * needed. In this case the driver would just provide a var that 380 * represents the static state the screen is in. 381 * 382 * Returns negative errno on error, or zero on success. 383 */ 384static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, 385 struct fb_info *info) 386{ 387 struct device *dev = info->device; 388 struct atmel_lcdfb_info *sinfo = info->par; 389 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 390 unsigned long clk_value_khz; 391 392 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 393 394 dev_dbg(dev, "%s:\n", __func__); 395 396 if (!(var->pixclock && var->bits_per_pixel)) { 397 /* choose a suitable mode if possible */ 398 if (!atmel_lcdfb_choose_mode(var, info)) { 399 dev_err(dev, "needed value not specified\n"); 400 return -EINVAL; 401 } 402 } 403 404 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); 405 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); 406 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); 407 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); 408 409 if (PICOS2KHZ(var->pixclock) > clk_value_khz) { 410 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); 411 return -EINVAL; 412 } 413 414 /* Do not allow to have real resoulution larger than virtual */ 415 if (var->xres > var->xres_virtual) 416 var->xres_virtual = var->xres; 417 418 if (var->yres > var->yres_virtual) 419 var->yres_virtual = var->yres; 420 421 /* Force same alignment for each line */ 422 var->xres = (var->xres + 3) & ~3UL; 423 var->xres_virtual = (var->xres_virtual + 3) & ~3UL; 424 425 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; 426 var->transp.msb_right = 0; 427 var->transp.offset = var->transp.length = 0; 428 var->xoffset = var->yoffset = 0; 429 430 if (info->fix.smem_len) { 431 unsigned int smem_len = (var->xres_virtual * var->yres_virtual 432 * ((var->bits_per_pixel + 7) / 8)); 433 if (smem_len > info->fix.smem_len) { 434 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n", 435 info->fix.smem_len, smem_len); 436 return -EINVAL; 437 } 438 } 439 440 /* Saturate vertical and horizontal timings at maximum values */ 441 var->vsync_len = min_t(u32, var->vsync_len, 442 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); 443 var->upper_margin = min_t(u32, var->upper_margin, 444 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); 445 var->lower_margin = min_t(u32, var->lower_margin, 446 ATMEL_LCDC_VFP); 447 var->right_margin = min_t(u32, var->right_margin, 448 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); 449 var->hsync_len = min_t(u32, var->hsync_len, 450 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); 451 var->left_margin = min_t(u32, var->left_margin, 452 ATMEL_LCDC_HBP + 1); 453 454 /* Some parameters can't be zero */ 455 var->vsync_len = max_t(u32, var->vsync_len, 1); 456 var->right_margin = max_t(u32, var->right_margin, 1); 457 var->hsync_len = max_t(u32, var->hsync_len, 1); 458 var->left_margin = max_t(u32, var->left_margin, 1); 459 460 switch (var->bits_per_pixel) { 461 case 1: 462 case 2: 463 case 4: 464 case 8: 465 var->red.offset = var->green.offset = var->blue.offset = 0; 466 var->red.length = var->green.length = var->blue.length 467 = var->bits_per_pixel; 468 break; 469 case 16: 470 /* Older SOCs use IBGR:555 rather than BGR:565. */ 471 if (sinfo->config->have_intensity_bit) 472 var->green.length = 5; 473 else 474 var->green.length = 6; 475 476 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 477 /* RGB:5X5 mode */ 478 var->red.offset = var->green.length + 5; 479 var->blue.offset = 0; 480 } else { 481 /* BGR:5X5 mode */ 482 var->red.offset = 0; 483 var->blue.offset = var->green.length + 5; 484 } 485 var->green.offset = 5; 486 var->red.length = var->blue.length = 5; 487 break; 488 case 32: 489 var->transp.offset = 24; 490 var->transp.length = 8; 491 fallthrough; 492 case 24: 493 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 494 /* RGB:888 mode */ 495 var->red.offset = 16; 496 var->blue.offset = 0; 497 } else { 498 /* BGR:888 mode */ 499 var->red.offset = 0; 500 var->blue.offset = 16; 501 } 502 var->green.offset = 8; 503 var->red.length = var->green.length = var->blue.length = 8; 504 break; 505 default: 506 dev_err(dev, "color depth %d not supported\n", 507 var->bits_per_pixel); 508 return -EINVAL; 509 } 510 511 return 0; 512} 513 514/* 515 * LCD reset sequence 516 */ 517static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) 518{ 519 might_sleep(); 520 521 atmel_lcdfb_stop(sinfo); 522 atmel_lcdfb_start(sinfo); 523} 524 525/** 526 * atmel_lcdfb_set_par - Alters the hardware state. 527 * @info: frame buffer structure that represents a single frame buffer 528 * 529 * Using the fb_var_screeninfo in fb_info we set the resolution 530 * of the this particular framebuffer. This function alters the 531 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't 532 * not alter var in fb_info since we are using that data. This 533 * means we depend on the data in var inside fb_info to be 534 * supported by the hardware. atmel_lcdfb_check_var is always called 535 * before atmel_lcdfb_set_par to ensure this. Again if you can't 536 * change the resolution you don't need this function. 537 * 538 */ 539static int atmel_lcdfb_set_par(struct fb_info *info) 540{ 541 struct atmel_lcdfb_info *sinfo = info->par; 542 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 543 unsigned long hozval_linesz; 544 unsigned long value; 545 unsigned long clk_value_khz; 546 unsigned long bits_per_line; 547 unsigned long pix_factor = 2; 548 549 might_sleep(); 550 551 dev_dbg(info->device, "%s:\n", __func__); 552 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", 553 info->var.xres, info->var.yres, 554 info->var.xres_virtual, info->var.yres_virtual); 555 556 atmel_lcdfb_stop_nowait(sinfo); 557 558 if (info->var.bits_per_pixel == 1) 559 info->fix.visual = FB_VISUAL_MONO01; 560 else if (info->var.bits_per_pixel <= 8) 561 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 562 else 563 info->fix.visual = FB_VISUAL_TRUECOLOR; 564 565 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; 566 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); 567 568 /* Re-initialize the DMA engine... */ 569 dev_dbg(info->device, " * update DMA engine\n"); 570 atmel_lcdfb_update_dma(info, &info->var); 571 572 /* ...set frame size and burst length = 8 words (?) */ 573 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; 574 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); 575 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); 576 577 /* Now, the LCDC core... */ 578 579 /* Set pixel clock */ 580 if (sinfo->config->have_alt_pixclock) 581 pix_factor = 1; 582 583 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 584 585 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 586 587 if (value < pix_factor) { 588 dev_notice(info->device, "Bypassing pixel clock divider\n"); 589 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 590 } else { 591 value = (value / pix_factor) - 1; 592 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 593 value); 594 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 595 value << ATMEL_LCDC_CLKVAL_OFFSET); 596 info->var.pixclock = 597 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); 598 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 599 PICOS2KHZ(info->var.pixclock)); 600 } 601 602 603 /* Initialize control register 2 */ 604 value = pdata->default_lcdcon2; 605 606 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) 607 value |= ATMEL_LCDC_INVLINE_INVERTED; 608 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) 609 value |= ATMEL_LCDC_INVFRAME_INVERTED; 610 611 switch (info->var.bits_per_pixel) { 612 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; 613 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; 614 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; 615 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; 616 case 15: fallthrough; 617 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; 618 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; 619 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; 620 default: BUG(); break; 621 } 622 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); 623 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); 624 625 /* Vertical timing */ 626 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; 627 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; 628 value |= info->var.lower_margin; 629 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); 630 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); 631 632 /* Horizontal timing */ 633 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; 634 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; 635 value |= (info->var.left_margin - 1); 636 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); 637 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); 638 639 /* Horizontal value (aka line size) */ 640 hozval_linesz = compute_hozval(sinfo, info->var.xres); 641 642 /* Display size */ 643 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; 644 value |= info->var.yres - 1; 645 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); 646 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); 647 648 /* FIFO Threshold: Use formula from data sheet */ 649 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); 650 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); 651 652 /* Toggle LCD_MODE every frame */ 653 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); 654 655 /* Disable all interrupts */ 656 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); 657 /* Enable FIFO & DMA errors */ 658 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 659 660 /* ...wait for DMA engine to become idle... */ 661 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 662 msleep(10); 663 664 atmel_lcdfb_start(sinfo); 665 666 dev_dbg(info->device, " * DONE\n"); 667 668 return 0; 669} 670 671static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) 672{ 673 chan &= 0xffff; 674 chan >>= 16 - bf->length; 675 return chan << bf->offset; 676} 677 678/** 679 * atmel_lcdfb_setcolreg - Optional function. Sets a color register. 680 * @regno: Which register in the CLUT we are programming 681 * @red: The red value which can be up to 16 bits wide 682 * @green: The green value which can be up to 16 bits wide 683 * @blue: The blue value which can be up to 16 bits wide. 684 * @transp: If supported the alpha value which can be up to 16 bits wide. 685 * @info: frame buffer info structure 686 * 687 * Set a single color register. The values supplied have a 16 bit 688 * magnitude which needs to be scaled in this function for the hardware. 689 * Things to take into consideration are how many color registers, if 690 * any, are supported with the current color visual. With truecolor mode 691 * no color palettes are supported. Here a pseudo palette is created 692 * which we store the value in pseudo_palette in struct fb_info. For 693 * pseudocolor mode we have a limited color palette. To deal with this 694 * we can program what color is displayed for a particular pixel value. 695 * DirectColor is similar in that we can program each color field. If 696 * we have a static colormap we don't need to implement this function. 697 * 698 * Returns negative errno on error, or zero on success. In an 699 * ideal world, this would have been the case, but as it turns 700 * out, the other drivers return 1 on failure, so that's what 701 * we're going to do. 702 */ 703static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, 704 unsigned int green, unsigned int blue, 705 unsigned int transp, struct fb_info *info) 706{ 707 struct atmel_lcdfb_info *sinfo = info->par; 708 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 709 unsigned int val; 710 u32 *pal; 711 int ret = 1; 712 713 if (info->var.grayscale) 714 red = green = blue = (19595 * red + 38470 * green 715 + 7471 * blue) >> 16; 716 717 switch (info->fix.visual) { 718 case FB_VISUAL_TRUECOLOR: 719 if (regno < 16) { 720 pal = info->pseudo_palette; 721 722 val = chan_to_field(red, &info->var.red); 723 val |= chan_to_field(green, &info->var.green); 724 val |= chan_to_field(blue, &info->var.blue); 725 726 pal[regno] = val; 727 ret = 0; 728 } 729 break; 730 731 case FB_VISUAL_PSEUDOCOLOR: 732 if (regno < 256) { 733 if (sinfo->config->have_intensity_bit) { 734 /* old style I+BGR:555 */ 735 val = ((red >> 11) & 0x001f); 736 val |= ((green >> 6) & 0x03e0); 737 val |= ((blue >> 1) & 0x7c00); 738 739 /* 740 * TODO: intensity bit. Maybe something like 741 * ~(red[10] ^ green[10] ^ blue[10]) & 1 742 */ 743 } else { 744 /* new style BGR:565 / RGB:565 */ 745 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 746 val = ((blue >> 11) & 0x001f); 747 val |= ((red >> 0) & 0xf800); 748 } else { 749 val = ((red >> 11) & 0x001f); 750 val |= ((blue >> 0) & 0xf800); 751 } 752 753 val |= ((green >> 5) & 0x07e0); 754 } 755 756 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 757 ret = 0; 758 } 759 break; 760 761 case FB_VISUAL_MONO01: 762 if (regno < 2) { 763 val = (regno == 0) ? 0x00 : 0x1F; 764 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 765 ret = 0; 766 } 767 break; 768 769 } 770 771 return ret; 772} 773 774static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, 775 struct fb_info *info) 776{ 777 dev_dbg(info->device, "%s\n", __func__); 778 779 atmel_lcdfb_update_dma(info, var); 780 781 return 0; 782} 783 784static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info) 785{ 786 struct atmel_lcdfb_info *sinfo = info->par; 787 788 switch (blank_mode) { 789 case FB_BLANK_UNBLANK: 790 case FB_BLANK_NORMAL: 791 atmel_lcdfb_start(sinfo); 792 break; 793 case FB_BLANK_VSYNC_SUSPEND: 794 case FB_BLANK_HSYNC_SUSPEND: 795 break; 796 case FB_BLANK_POWERDOWN: 797 atmel_lcdfb_stop(sinfo); 798 break; 799 default: 800 return -EINVAL; 801 } 802 803 /* let fbcon do a soft blank for us */ 804 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0); 805} 806 807static const struct fb_ops atmel_lcdfb_ops = { 808 .owner = THIS_MODULE, 809 FB_DEFAULT_IOMEM_OPS, 810 .fb_check_var = atmel_lcdfb_check_var, 811 .fb_set_par = atmel_lcdfb_set_par, 812 .fb_setcolreg = atmel_lcdfb_setcolreg, 813 .fb_blank = atmel_lcdfb_blank, 814 .fb_pan_display = atmel_lcdfb_pan_display, 815}; 816 817static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) 818{ 819 struct fb_info *info = dev_id; 820 struct atmel_lcdfb_info *sinfo = info->par; 821 u32 status; 822 823 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); 824 if (status & ATMEL_LCDC_UFLWI) { 825 dev_warn(info->device, "FIFO underflow %#x\n", status); 826 /* reset DMA and FIFO to avoid screen shifting */ 827 schedule_work(&sinfo->task); 828 } 829 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status); 830 return IRQ_HANDLED; 831} 832 833/* 834 * LCD controller task (to reset the LCD) 835 */ 836static void atmel_lcdfb_task(struct work_struct *work) 837{ 838 struct atmel_lcdfb_info *sinfo = 839 container_of(work, struct atmel_lcdfb_info, task); 840 841 atmel_lcdfb_reset(sinfo); 842} 843 844static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) 845{ 846 struct fb_info *info = sinfo->info; 847 int ret = 0; 848 849 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; 850 851 dev_info(info->device, 852 "%luKiB frame buffer at %08lx (mapped at %p)\n", 853 (unsigned long)info->fix.smem_len / 1024, 854 (unsigned long)info->fix.smem_start, 855 info->screen_base); 856 857 /* Allocate colormap */ 858 ret = fb_alloc_cmap(&info->cmap, 256, 0); 859 if (ret < 0) 860 dev_err(info->device, "Alloc color map failed\n"); 861 862 return ret; 863} 864 865static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) 866{ 867 clk_prepare_enable(sinfo->bus_clk); 868 clk_prepare_enable(sinfo->lcdc_clk); 869} 870 871static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) 872{ 873 clk_disable_unprepare(sinfo->bus_clk); 874 clk_disable_unprepare(sinfo->lcdc_clk); 875} 876 877static const struct of_device_id atmel_lcdfb_dt_ids[] = { 878 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, 879 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, 880 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, }, 881 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, 882 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, 883 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, 884 { /* sentinel */ } 885}; 886 887MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids); 888 889static const char *atmel_lcdfb_wiring_modes[] = { 890 [ATMEL_LCDC_WIRING_BGR] = "BRG", 891 [ATMEL_LCDC_WIRING_RGB] = "RGB", 892}; 893 894static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np) 895{ 896 const char *mode; 897 int err, i; 898 899 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode); 900 if (err < 0) 901 return ATMEL_LCDC_WIRING_BGR; 902 903 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++) 904 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i])) 905 return i; 906 907 return -ENODEV; 908} 909 910static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on) 911{ 912 struct atmel_lcdfb_power_ctrl_gpio *og; 913 914 list_for_each_entry(og, &pdata->pwr_gpios, list) 915 gpiod_set_value(og->gpiod, on); 916} 917 918static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 919{ 920 struct fb_info *info = sinfo->info; 921 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 922 struct fb_var_screeninfo *var = &info->var; 923 struct device *dev = &sinfo->pdev->dev; 924 struct device_node *np =dev->of_node; 925 struct device_node *display_np; 926 struct atmel_lcdfb_power_ctrl_gpio *og; 927 bool is_gpio_power = false; 928 struct fb_videomode fb_vm; 929 struct gpio_desc *gpiod; 930 struct videomode vm; 931 int ret; 932 int i; 933 934 sinfo->config = (struct atmel_lcdfb_config*) 935 of_match_device(atmel_lcdfb_dt_ids, dev)->data; 936 937 display_np = of_parse_phandle(np, "display", 0); 938 if (!display_np) { 939 dev_err(dev, "failed to find display phandle\n"); 940 return -ENOENT; 941 } 942 943 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel); 944 if (ret < 0) { 945 dev_err(dev, "failed to get property bits-per-pixel\n"); 946 goto put_display_node; 947 } 948 949 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time); 950 if (ret < 0) { 951 dev_err(dev, "failed to get property atmel,guard-time\n"); 952 goto put_display_node; 953 } 954 955 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2); 956 if (ret < 0) { 957 dev_err(dev, "failed to get property atmel,lcdcon2\n"); 958 goto put_display_node; 959 } 960 961 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon); 962 if (ret < 0) { 963 dev_err(dev, "failed to get property bits-per-pixel\n"); 964 goto put_display_node; 965 } 966 967 INIT_LIST_HEAD(&pdata->pwr_gpios); 968 for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) { 969 ret = -ENOMEM; 970 gpiod = devm_gpiod_get_index(dev, "atmel,power-control", 971 i, GPIOD_ASIS); 972 if (IS_ERR(gpiod)) 973 continue; 974 975 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL); 976 if (!og) 977 goto put_display_node; 978 979 og->gpiod = gpiod; 980 is_gpio_power = true; 981 982 ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod)); 983 if (ret) { 984 dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i); 985 goto put_display_node; 986 } 987 list_add(&og->list, &pdata->pwr_gpios); 988 } 989 990 if (is_gpio_power) 991 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio; 992 993 ret = atmel_lcdfb_get_of_wiring_modes(display_np); 994 if (ret < 0) { 995 dev_err(dev, "invalid atmel,lcd-wiring-mode\n"); 996 goto put_display_node; 997 } 998 pdata->lcd_wiring_mode = ret; 999 1000 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight"); 1001 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted"); 1002 1003 ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE); 1004 if (ret) { 1005 dev_err(dev, "failed to get videomode from DT\n"); 1006 goto put_display_node; 1007 } 1008 1009 ret = fb_videomode_from_videomode(&vm, &fb_vm); 1010 if (ret < 0) 1011 goto put_display_node; 1012 1013 fb_add_videomode(&fb_vm, &info->modelist); 1014 1015put_display_node: 1016 of_node_put(display_np); 1017 return ret; 1018} 1019 1020static int __init atmel_lcdfb_probe(struct platform_device *pdev) 1021{ 1022 struct device *dev = &pdev->dev; 1023 struct fb_info *info; 1024 struct atmel_lcdfb_info *sinfo; 1025 struct resource *regs = NULL; 1026 struct resource *map = NULL; 1027 struct fb_modelist *modelist; 1028 int ret; 1029 1030 dev_dbg(dev, "%s BEGIN\n", __func__); 1031 1032 ret = -ENOMEM; 1033 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); 1034 if (!info) 1035 goto out; 1036 1037 sinfo = info->par; 1038 sinfo->pdev = pdev; 1039 sinfo->info = info; 1040 1041 INIT_LIST_HEAD(&info->modelist); 1042 1043 if (!pdev->dev.of_node) { 1044 dev_err(dev, "cannot get default configuration\n"); 1045 goto free_info; 1046 } 1047 1048 ret = atmel_lcdfb_of_init(sinfo); 1049 if (ret) 1050 goto free_info; 1051 1052 ret = -ENODEV; 1053 if (!sinfo->config) 1054 goto free_info; 1055 1056 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd"); 1057 if (IS_ERR(sinfo->reg_lcd)) 1058 sinfo->reg_lcd = NULL; 1059 1060 info->flags = FBINFO_PARTIAL_PAN_OK | 1061 FBINFO_HWACCEL_YPAN; 1062 info->pseudo_palette = sinfo->pseudo_palette; 1063 info->fbops = &atmel_lcdfb_ops; 1064 1065 info->fix = atmel_lcdfb_fix; 1066 strcpy(info->fix.id, sinfo->pdev->name); 1067 1068 /* Enable LCDC Clocks */ 1069 sinfo->bus_clk = clk_get(dev, "hclk"); 1070 if (IS_ERR(sinfo->bus_clk)) { 1071 ret = PTR_ERR(sinfo->bus_clk); 1072 goto free_info; 1073 } 1074 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); 1075 if (IS_ERR(sinfo->lcdc_clk)) { 1076 ret = PTR_ERR(sinfo->lcdc_clk); 1077 goto put_bus_clk; 1078 } 1079 atmel_lcdfb_start_clock(sinfo); 1080 1081 modelist = list_first_entry(&info->modelist, 1082 struct fb_modelist, list); 1083 fb_videomode_to_var(&info->var, &modelist->mode); 1084 1085 atmel_lcdfb_check_var(&info->var, info); 1086 1087 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1088 if (!regs) { 1089 dev_err(dev, "resources unusable\n"); 1090 ret = -ENXIO; 1091 goto stop_clk; 1092 } 1093 1094 sinfo->irq_base = platform_get_irq(pdev, 0); 1095 if (sinfo->irq_base < 0) { 1096 ret = sinfo->irq_base; 1097 goto stop_clk; 1098 } 1099 1100 /* Initialize video memory */ 1101 map = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1102 if (map) { 1103 /* use a pre-allocated memory buffer */ 1104 info->fix.smem_start = map->start; 1105 info->fix.smem_len = resource_size(map); 1106 if (!request_mem_region(info->fix.smem_start, 1107 info->fix.smem_len, pdev->name)) { 1108 ret = -EBUSY; 1109 goto stop_clk; 1110 } 1111 1112 info->screen_base = ioremap_wc(info->fix.smem_start, 1113 info->fix.smem_len); 1114 if (!info->screen_base) { 1115 ret = -ENOMEM; 1116 goto release_intmem; 1117 } 1118 1119 /* 1120 * Don't clear the framebuffer -- someone may have set 1121 * up a splash image. 1122 */ 1123 } else { 1124 /* allocate memory buffer */ 1125 ret = atmel_lcdfb_alloc_video_memory(sinfo); 1126 if (ret < 0) { 1127 dev_err(dev, "cannot allocate framebuffer: %d\n", ret); 1128 goto stop_clk; 1129 } 1130 } 1131 1132 /* LCDC registers */ 1133 info->fix.mmio_start = regs->start; 1134 info->fix.mmio_len = resource_size(regs); 1135 1136 if (!request_mem_region(info->fix.mmio_start, 1137 info->fix.mmio_len, pdev->name)) { 1138 ret = -EBUSY; 1139 goto free_fb; 1140 } 1141 1142 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); 1143 if (!sinfo->mmio) { 1144 dev_err(dev, "cannot map LCDC registers\n"); 1145 ret = -ENOMEM; 1146 goto release_mem; 1147 } 1148 1149 /* Initialize PWM for contrast or backlight ("off") */ 1150 init_contrast(sinfo); 1151 1152 /* interrupt */ 1153 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); 1154 if (ret) { 1155 dev_err(dev, "request_irq failed: %d\n", ret); 1156 goto unmap_mmio; 1157 } 1158 1159 /* Some operations on the LCDC might sleep and 1160 * require a preemptible task context */ 1161 INIT_WORK(&sinfo->task, atmel_lcdfb_task); 1162 1163 ret = atmel_lcdfb_init_fbinfo(sinfo); 1164 if (ret < 0) { 1165 dev_err(dev, "init fbinfo failed: %d\n", ret); 1166 goto unregister_irqs; 1167 } 1168 1169 ret = atmel_lcdfb_set_par(info); 1170 if (ret < 0) { 1171 dev_err(dev, "set par failed: %d\n", ret); 1172 goto unregister_irqs; 1173 } 1174 1175 dev_set_drvdata(dev, info); 1176 1177 /* 1178 * Tell the world that we're ready to go 1179 */ 1180 ret = register_framebuffer(info); 1181 if (ret < 0) { 1182 dev_err(dev, "failed to register framebuffer device: %d\n", ret); 1183 goto reset_drvdata; 1184 } 1185 1186 /* Power up the LCDC screen */ 1187 atmel_lcdfb_power_control(sinfo, 1); 1188 1189 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n", 1190 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); 1191 1192 return 0; 1193 1194reset_drvdata: 1195 dev_set_drvdata(dev, NULL); 1196 fb_dealloc_cmap(&info->cmap); 1197unregister_irqs: 1198 cancel_work_sync(&sinfo->task); 1199 free_irq(sinfo->irq_base, info); 1200unmap_mmio: 1201 exit_backlight(sinfo); 1202 iounmap(sinfo->mmio); 1203release_mem: 1204 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1205free_fb: 1206 if (map) 1207 iounmap(info->screen_base); 1208 else 1209 atmel_lcdfb_free_video_memory(sinfo); 1210 1211release_intmem: 1212 if (map) 1213 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1214stop_clk: 1215 atmel_lcdfb_stop_clock(sinfo); 1216 clk_put(sinfo->lcdc_clk); 1217put_bus_clk: 1218 clk_put(sinfo->bus_clk); 1219free_info: 1220 framebuffer_release(info); 1221out: 1222 dev_dbg(dev, "%s FAILED\n", __func__); 1223 return ret; 1224} 1225 1226static int __exit atmel_lcdfb_remove(struct platform_device *pdev) 1227{ 1228 struct device *dev = &pdev->dev; 1229 struct fb_info *info = dev_get_drvdata(dev); 1230 struct atmel_lcdfb_info *sinfo; 1231 1232 if (!info || !info->par) 1233 return 0; 1234 sinfo = info->par; 1235 1236 cancel_work_sync(&sinfo->task); 1237 exit_backlight(sinfo); 1238 atmel_lcdfb_power_control(sinfo, 0); 1239 unregister_framebuffer(info); 1240 atmel_lcdfb_stop_clock(sinfo); 1241 clk_put(sinfo->lcdc_clk); 1242 clk_put(sinfo->bus_clk); 1243 fb_dealloc_cmap(&info->cmap); 1244 free_irq(sinfo->irq_base, info); 1245 iounmap(sinfo->mmio); 1246 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1247 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { 1248 iounmap(info->screen_base); 1249 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1250 } else { 1251 atmel_lcdfb_free_video_memory(sinfo); 1252 } 1253 1254 framebuffer_release(info); 1255 1256 return 0; 1257} 1258 1259#ifdef CONFIG_PM 1260 1261static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) 1262{ 1263 struct fb_info *info = platform_get_drvdata(pdev); 1264 struct atmel_lcdfb_info *sinfo = info->par; 1265 1266 /* 1267 * We don't want to handle interrupts while the clock is 1268 * stopped. It may take forever. 1269 */ 1270 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); 1271 1272 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); 1273 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); 1274 atmel_lcdfb_power_control(sinfo, 0); 1275 atmel_lcdfb_stop(sinfo); 1276 atmel_lcdfb_stop_clock(sinfo); 1277 1278 return 0; 1279} 1280 1281static int atmel_lcdfb_resume(struct platform_device *pdev) 1282{ 1283 struct fb_info *info = platform_get_drvdata(pdev); 1284 struct atmel_lcdfb_info *sinfo = info->par; 1285 1286 atmel_lcdfb_start_clock(sinfo); 1287 atmel_lcdfb_start(sinfo); 1288 atmel_lcdfb_power_control(sinfo, 1); 1289 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); 1290 1291 /* Enable FIFO & DMA errors */ 1292 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI 1293 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 1294 1295 return 0; 1296} 1297 1298#else 1299#define atmel_lcdfb_suspend NULL 1300#define atmel_lcdfb_resume NULL 1301#endif 1302 1303static struct platform_driver atmel_lcdfb_driver = { 1304 .remove = __exit_p(atmel_lcdfb_remove), 1305 .suspend = atmel_lcdfb_suspend, 1306 .resume = atmel_lcdfb_resume, 1307 .driver = { 1308 .name = "atmel_lcdfb", 1309 .of_match_table = atmel_lcdfb_dt_ids, 1310 }, 1311}; 1312 1313module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe); 1314 1315MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver"); 1316MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); 1317MODULE_LICENSE("GPL"); 1318