162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* Copyright(c) 2023 Advanced Micro Devices, Inc */ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci#ifndef _VDPA_CMDS_H_ 562306a36Sopenharmony_ci#define _VDPA_CMDS_H_ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciint pds_vdpa_init_hw(struct pds_vdpa_device *pdsv); 862306a36Sopenharmony_ci 962306a36Sopenharmony_ciint pds_vdpa_cmd_reset(struct pds_vdpa_device *pdsv); 1062306a36Sopenharmony_ciint pds_vdpa_cmd_set_status(struct pds_vdpa_device *pdsv, u8 status); 1162306a36Sopenharmony_ciint pds_vdpa_cmd_set_mac(struct pds_vdpa_device *pdsv, u8 *mac); 1262306a36Sopenharmony_ciint pds_vdpa_cmd_set_max_vq_pairs(struct pds_vdpa_device *pdsv, u16 max_vqp); 1362306a36Sopenharmony_ciint pds_vdpa_cmd_init_vq(struct pds_vdpa_device *pdsv, u16 qid, u16 invert_idx, 1462306a36Sopenharmony_ci struct pds_vdpa_vq_info *vq_info); 1562306a36Sopenharmony_ciint pds_vdpa_cmd_reset_vq(struct pds_vdpa_device *pdsv, u16 qid, u16 invert_idx, 1662306a36Sopenharmony_ci struct pds_vdpa_vq_info *vq_info); 1762306a36Sopenharmony_ciint pds_vdpa_cmd_set_features(struct pds_vdpa_device *pdsv, u64 features); 1862306a36Sopenharmony_ci#endif /* _VDPA_CMDS_H_ */ 19