162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci *   Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
862306a36Sopenharmony_ci * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
962306a36Sopenharmony_ci * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html
1062306a36Sopenharmony_ci * for further information. The properties of this device are listed at the end
1162306a36Sopenharmony_ci * of this file. This device was used in the Dlink DSB-S25.
1262306a36Sopenharmony_ci *
1362306a36Sopenharmony_ci * All of the information about the device was acquired by using SniffUSB
1462306a36Sopenharmony_ci * on Windows98. The technical details of the reverse engineering are
1562306a36Sopenharmony_ci * summarized at the end of this file.
1662306a36Sopenharmony_ci */
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci#ifndef __LINUX_USB_SERIAL_MCT_U232_H
1962306a36Sopenharmony_ci#define __LINUX_USB_SERIAL_MCT_U232_H
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci#define MCT_U232_VID	                0x0711	/* Vendor Id */
2262306a36Sopenharmony_ci#define MCT_U232_PID	                0x0210	/* Original MCT Product Id */
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci/* U232-P25, Sitecom */
2562306a36Sopenharmony_ci#define MCT_U232_SITECOM_PID		0x0230	/* Sitecom Product Id */
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci/* DU-H3SP USB BAY hub */
2862306a36Sopenharmony_ci#define MCT_U232_DU_H3SP_PID		0x0200	/* D-Link DU-H3SP USB BAY */
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci/* Belkin badge the MCT U232-P9 as the F5U109 */
3162306a36Sopenharmony_ci#define MCT_U232_BELKIN_F5U109_VID	0x050d	/* Vendor Id */
3262306a36Sopenharmony_ci#define MCT_U232_BELKIN_F5U109_PID	0x0109	/* Product Id */
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci/*
3562306a36Sopenharmony_ci * Vendor Request Interface
3662306a36Sopenharmony_ci */
3762306a36Sopenharmony_ci#define MCT_U232_SET_REQUEST_TYPE	0x40
3862306a36Sopenharmony_ci#define MCT_U232_GET_REQUEST_TYPE	0xc0
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci/* Get Modem Status Register (MSR) */
4162306a36Sopenharmony_ci#define MCT_U232_GET_MODEM_STAT_REQUEST	2
4262306a36Sopenharmony_ci#define MCT_U232_GET_MODEM_STAT_SIZE	1
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci/* Get Line Control Register (LCR) */
4562306a36Sopenharmony_ci/* ... not used by this driver */
4662306a36Sopenharmony_ci#define MCT_U232_GET_LINE_CTRL_REQUEST	6
4762306a36Sopenharmony_ci#define MCT_U232_GET_LINE_CTRL_SIZE	1
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci/* Set Baud Rate Divisor */
5062306a36Sopenharmony_ci#define MCT_U232_SET_BAUD_RATE_REQUEST	5
5162306a36Sopenharmony_ci#define MCT_U232_SET_BAUD_RATE_SIZE	4
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci/* Set Line Control Register (LCR) */
5462306a36Sopenharmony_ci#define MCT_U232_SET_LINE_CTRL_REQUEST	7
5562306a36Sopenharmony_ci#define MCT_U232_SET_LINE_CTRL_SIZE	1
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci/* Set Modem Control Register (MCR) */
5862306a36Sopenharmony_ci#define MCT_U232_SET_MODEM_CTRL_REQUEST	10
5962306a36Sopenharmony_ci#define MCT_U232_SET_MODEM_CTRL_SIZE	1
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci/*
6262306a36Sopenharmony_ci * This USB device request code is not well understood.  It is transmitted by
6362306a36Sopenharmony_ci * the MCT-supplied Windows driver whenever the baud rate changes.
6462306a36Sopenharmony_ci */
6562306a36Sopenharmony_ci#define MCT_U232_SET_UNKNOWN1_REQUEST	11  /* Unknown functionality */
6662306a36Sopenharmony_ci#define MCT_U232_SET_UNKNOWN1_SIZE	1
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci/*
6962306a36Sopenharmony_ci * This USB device request code appears to control whether CTS is required
7062306a36Sopenharmony_ci * during transmission.
7162306a36Sopenharmony_ci *
7262306a36Sopenharmony_ci * Sending a zero byte allows data transmission to a device which is not
7362306a36Sopenharmony_ci * asserting CTS.  Sending a '1' byte will cause transmission to be deferred
7462306a36Sopenharmony_ci * until the device asserts CTS.
7562306a36Sopenharmony_ci */
7662306a36Sopenharmony_ci#define MCT_U232_SET_CTS_REQUEST	12
7762306a36Sopenharmony_ci#define MCT_U232_SET_CTS_SIZE		1
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci#define MCT_U232_MAX_SIZE		4	/* of MCT_XXX_SIZE */
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci/*
8262306a36Sopenharmony_ci * Baud rate (divisor)
8362306a36Sopenharmony_ci * Actually, there are two of them, MCT website calls them "Philips solution"
8462306a36Sopenharmony_ci * and "Intel solution". They are the regular MCT and "Sitecom" for us.
8562306a36Sopenharmony_ci * This is pointless to document in the header, see the code for the bits.
8662306a36Sopenharmony_ci */
8762306a36Sopenharmony_cistatic int mct_u232_calculate_baud_rate(struct usb_serial *serial,
8862306a36Sopenharmony_ci					speed_t value, speed_t *result);
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci/*
9162306a36Sopenharmony_ci * Line Control Register (LCR)
9262306a36Sopenharmony_ci */
9362306a36Sopenharmony_ci#define MCT_U232_SET_BREAK              0x40
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci#define MCT_U232_PARITY_SPACE		0x38
9662306a36Sopenharmony_ci#define MCT_U232_PARITY_MARK		0x28
9762306a36Sopenharmony_ci#define MCT_U232_PARITY_EVEN		0x18
9862306a36Sopenharmony_ci#define MCT_U232_PARITY_ODD		0x08
9962306a36Sopenharmony_ci#define MCT_U232_PARITY_NONE		0x00
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci#define MCT_U232_DATA_BITS_5            0x00
10262306a36Sopenharmony_ci#define MCT_U232_DATA_BITS_6            0x01
10362306a36Sopenharmony_ci#define MCT_U232_DATA_BITS_7            0x02
10462306a36Sopenharmony_ci#define MCT_U232_DATA_BITS_8            0x03
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci#define MCT_U232_STOP_BITS_2            0x04
10762306a36Sopenharmony_ci#define MCT_U232_STOP_BITS_1            0x00
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci/*
11062306a36Sopenharmony_ci * Modem Control Register (MCR)
11162306a36Sopenharmony_ci */
11262306a36Sopenharmony_ci#define MCT_U232_MCR_NONE               0x8     /* Deactivate DTR and RTS */
11362306a36Sopenharmony_ci#define MCT_U232_MCR_RTS                0xa     /* Activate RTS */
11462306a36Sopenharmony_ci#define MCT_U232_MCR_DTR                0x9     /* Activate DTR */
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci/*
11762306a36Sopenharmony_ci * Modem Status Register (MSR)
11862306a36Sopenharmony_ci */
11962306a36Sopenharmony_ci#define MCT_U232_MSR_INDEX              0x0     /* data[index] */
12062306a36Sopenharmony_ci#define MCT_U232_MSR_CD                 0x80    /* Current CD */
12162306a36Sopenharmony_ci#define MCT_U232_MSR_RI                 0x40    /* Current RI */
12262306a36Sopenharmony_ci#define MCT_U232_MSR_DSR                0x20    /* Current DSR */
12362306a36Sopenharmony_ci#define MCT_U232_MSR_CTS                0x10    /* Current CTS */
12462306a36Sopenharmony_ci#define MCT_U232_MSR_DCD                0x08    /* Delta CD */
12562306a36Sopenharmony_ci#define MCT_U232_MSR_DRI                0x04    /* Delta RI */
12662306a36Sopenharmony_ci#define MCT_U232_MSR_DDSR               0x02    /* Delta DSR */
12762306a36Sopenharmony_ci#define MCT_U232_MSR_DCTS               0x01    /* Delta CTS */
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci/*
13062306a36Sopenharmony_ci * Line Status Register (LSR)
13162306a36Sopenharmony_ci */
13262306a36Sopenharmony_ci#define MCT_U232_LSR_INDEX	1	/* data[index] */
13362306a36Sopenharmony_ci#define MCT_U232_LSR_ERR	0x80	/* OE | PE | FE | BI */
13462306a36Sopenharmony_ci#define MCT_U232_LSR_TEMT	0x40	/* transmit register empty */
13562306a36Sopenharmony_ci#define MCT_U232_LSR_THRE	0x20	/* transmit holding register empty */
13662306a36Sopenharmony_ci#define MCT_U232_LSR_BI		0x10	/* break indicator */
13762306a36Sopenharmony_ci#define MCT_U232_LSR_FE		0x08	/* framing error */
13862306a36Sopenharmony_ci#define MCT_U232_LSR_OE		0x02	/* overrun error */
13962306a36Sopenharmony_ci#define MCT_U232_LSR_PE		0x04	/* parity error */
14062306a36Sopenharmony_ci#define MCT_U232_LSR_OE		0x02	/* overrun error */
14162306a36Sopenharmony_ci#define MCT_U232_LSR_DR		0x01	/* receive data ready */
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci/* -----------------------------------------------------------------------------
14562306a36Sopenharmony_ci * Technical Specification reverse engineered with SniffUSB on Windows98
14662306a36Sopenharmony_ci * =====================================================================
14762306a36Sopenharmony_ci *
14862306a36Sopenharmony_ci *  The technical details of the device have been acquired be using "SniffUSB"
14962306a36Sopenharmony_ci *  and the vendor-supplied device driver (version 2.3A) under Windows98. To
15062306a36Sopenharmony_ci *  identify the USB vendor-specific requests and to assign them to terminal
15162306a36Sopenharmony_ci *  settings (flow control, baud rate, etc.) the program "SerialSettings" from
15262306a36Sopenharmony_ci *  William G. Greathouse has been proven to be very useful. I also used the
15362306a36Sopenharmony_ci *  Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
15462306a36Sopenharmony_ci *  observations are summarized below:
15562306a36Sopenharmony_ci *
15662306a36Sopenharmony_ci *  The USB requests seem to be directly mapped to the registers of a 8250,
15762306a36Sopenharmony_ci *  16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
15862306a36Sopenharmony_ci *  devices") contains a comprehensive description of UARTs and its registers.
15962306a36Sopenharmony_ci *  The bit descriptions are actually taken from there.
16062306a36Sopenharmony_ci *
16162306a36Sopenharmony_ci *
16262306a36Sopenharmony_ci * Baud rate (divisor)
16362306a36Sopenharmony_ci * -------------------
16462306a36Sopenharmony_ci *
16562306a36Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
16662306a36Sopenharmony_ci *   bRequest:       0x05
16762306a36Sopenharmony_ci *   wValue:         0x0000
16862306a36Sopenharmony_ci *   wIndex:         0x0000
16962306a36Sopenharmony_ci *   wLength:        0x0004
17062306a36Sopenharmony_ci *   Data:           divisor = 115200 / baud_rate
17162306a36Sopenharmony_ci *
17262306a36Sopenharmony_ci *   SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
17362306a36Sopenharmony_ci *   shown above, observations with a Belkin F5U109 adapter, using the
17462306a36Sopenharmony_ci *   MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
17562306a36Sopenharmony_ci *   Win98/Me"), show this request has a length of 1 byte, presumably because
17662306a36Sopenharmony_ci *   of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
17762306a36Sopenharmony_ci *   use a baud-rate code instead of a conventional RS-232 baud rate divisor.
17862306a36Sopenharmony_ci *   The current source code for this driver does not reflect this fact, but
17962306a36Sopenharmony_ci *   the driver works fine with this adapter/driver combination nonetheless.
18062306a36Sopenharmony_ci *
18162306a36Sopenharmony_ci *
18262306a36Sopenharmony_ci * Line Control Register (LCR)
18362306a36Sopenharmony_ci * ---------------------------
18462306a36Sopenharmony_ci *
18562306a36Sopenharmony_ci *  BmRequestType:  0x40 (0100 0000B)    0xc0 (1100 0000B)
18662306a36Sopenharmony_ci *  bRequest:       0x07                 0x06
18762306a36Sopenharmony_ci *  wValue:         0x0000
18862306a36Sopenharmony_ci *  wIndex:         0x0000
18962306a36Sopenharmony_ci *  wLength:        0x0001
19062306a36Sopenharmony_ci *  Data:           LCR (see below)
19162306a36Sopenharmony_ci *
19262306a36Sopenharmony_ci *  Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
19362306a36Sopenharmony_ci *	   transmit/receive register (THR/RBR) and the Interrupt Enable Register
19462306a36Sopenharmony_ci *	   (IER) is disabled. Any access to these ports is now redirected to the
19562306a36Sopenharmony_ci *	   Divisor Latch Registers. Setting this bit, loading the Divisor
19662306a36Sopenharmony_ci *	   Registers, and clearing DLAB should be done with interrupts disabled.
19762306a36Sopenharmony_ci *  Bit 6: Set Break. When set to "1", the transmitter begins to transmit
19862306a36Sopenharmony_ci *	   continuous Spacing until this bit is set to "0". This overrides any
19962306a36Sopenharmony_ci *	   bits of characters that are being transmitted.
20062306a36Sopenharmony_ci *  Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
20162306a36Sopenharmony_ci *	   to always be "1" or "0", based on the value of Bit 4.
20262306a36Sopenharmony_ci *  Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
20362306a36Sopenharmony_ci *	   setting this bit causes even parity to be transmitted and expected.
20462306a36Sopenharmony_ci *	   Otherwise, odd parity is used.
20562306a36Sopenharmony_ci *  Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
20662306a36Sopenharmony_ci *	   between the last bit of the data and the Stop Bit. The UART will also
20762306a36Sopenharmony_ci *	   expect parity to be present in the received data.
20862306a36Sopenharmony_ci *  Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
20962306a36Sopenharmony_ci *	   1.5 Stop Bits are transmitted and expected in each data word. For
21062306a36Sopenharmony_ci *	   6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
21162306a36Sopenharmony_ci *	   When this bit is set to "0", one Stop Bit is used on each data word.
21262306a36Sopenharmony_ci *  Bit 1: Word Length Select Bit #1 (WLSB1)
21362306a36Sopenharmony_ci *  Bit 0: Word Length Select Bit #0 (WLSB0)
21462306a36Sopenharmony_ci *	   Together these bits specify the number of bits in each data word.
21562306a36Sopenharmony_ci *	     1 0  Word Length
21662306a36Sopenharmony_ci *	     0 0  5 Data Bits
21762306a36Sopenharmony_ci *	     0 1  6 Data Bits
21862306a36Sopenharmony_ci *	     1 0  7 Data Bits
21962306a36Sopenharmony_ci *	     1 1  8 Data Bits
22062306a36Sopenharmony_ci *
22162306a36Sopenharmony_ci *  SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
22262306a36Sopenharmony_ci *  in the Win98 driver: the break does not work (bit 6 is not asserted) and the
22362306a36Sopenharmony_ci *  stick parity bit is not cleared when set once. The LCR can also be read
22462306a36Sopenharmony_ci *  back with USB request 6 but this has never been observed with SniffUSB.
22562306a36Sopenharmony_ci *
22662306a36Sopenharmony_ci *
22762306a36Sopenharmony_ci * Modem Control Register (MCR)
22862306a36Sopenharmony_ci * ----------------------------
22962306a36Sopenharmony_ci *
23062306a36Sopenharmony_ci *  BmRequestType:  0x40  (0100 0000B)
23162306a36Sopenharmony_ci *  bRequest:       0x0a
23262306a36Sopenharmony_ci *  wValue:         0x0000
23362306a36Sopenharmony_ci *  wIndex:         0x0000
23462306a36Sopenharmony_ci *  wLength:        0x0001
23562306a36Sopenharmony_ci *  Data:           MCR (Bit 4..7, see below)
23662306a36Sopenharmony_ci *
23762306a36Sopenharmony_ci *  Bit 7: Reserved, always 0.
23862306a36Sopenharmony_ci *  Bit 6: Reserved, always 0.
23962306a36Sopenharmony_ci *  Bit 5: Reserved, always 0.
24062306a36Sopenharmony_ci *  Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
24162306a36Sopenharmony_ci *	   are internally connected together to allow diagnostic operations. In
24262306a36Sopenharmony_ci *	   addition, the UART modem control outputs are connected to the UART
24362306a36Sopenharmony_ci *	   modem control inputs. CTS is connected to RTS, DTR is connected to
24462306a36Sopenharmony_ci *	   DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
24562306a36Sopenharmony_ci *  Bit 3: OUT 2. An auxiliary output that the host processor may set high or
24662306a36Sopenharmony_ci *	   low. In the IBM PC serial adapter (and most clones), OUT 2 is used
24762306a36Sopenharmony_ci *	   to tri-state (disable) the interrupt signal from the
24862306a36Sopenharmony_ci *	   8250/16450/16550 UART.
24962306a36Sopenharmony_ci *  Bit 2: OUT 1. An auxiliary output that the host processor may set high or
25062306a36Sopenharmony_ci *	   low. This output is not used on the IBM PC serial adapter.
25162306a36Sopenharmony_ci *  Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
25262306a36Sopenharmony_ci *	   line is Low (Active).
25362306a36Sopenharmony_ci *  Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
25462306a36Sopenharmony_ci *	   -DTR line is Low (Active).
25562306a36Sopenharmony_ci *
25662306a36Sopenharmony_ci *  SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
25762306a36Sopenharmony_ci *  seen _always_ set.
25862306a36Sopenharmony_ci *
25962306a36Sopenharmony_ci *
26062306a36Sopenharmony_ci * Modem Status Register (MSR)
26162306a36Sopenharmony_ci * ---------------------------
26262306a36Sopenharmony_ci *
26362306a36Sopenharmony_ci *  BmRequestType:  0xc0  (1100 0000B)
26462306a36Sopenharmony_ci *  bRequest:       0x02
26562306a36Sopenharmony_ci *  wValue:         0x0000
26662306a36Sopenharmony_ci *  wIndex:         0x0000
26762306a36Sopenharmony_ci *  wLength:        0x0001
26862306a36Sopenharmony_ci *  Data:           MSR (see below)
26962306a36Sopenharmony_ci *
27062306a36Sopenharmony_ci *  Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
27162306a36Sopenharmony_ci *	   UART.
27262306a36Sopenharmony_ci *  Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
27362306a36Sopenharmony_ci *  Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
27462306a36Sopenharmony_ci *  Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
27562306a36Sopenharmony_ci *  Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
27662306a36Sopenharmony_ci *	   changed state one more more times since the last time the MSR was
27762306a36Sopenharmony_ci *	   read by the host.
27862306a36Sopenharmony_ci *  Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
27962306a36Sopenharmony_ci *	   had a low to high transition since the last time the MSR was read by
28062306a36Sopenharmony_ci *	   the host.
28162306a36Sopenharmony_ci *  Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
28262306a36Sopenharmony_ci *	   state one more more times since the last time the MSR was read by the
28362306a36Sopenharmony_ci *	   host.
28462306a36Sopenharmony_ci *  Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
28562306a36Sopenharmony_ci *	   state one more times since the last time the MSR was read by the
28662306a36Sopenharmony_ci *	   host.
28762306a36Sopenharmony_ci *
28862306a36Sopenharmony_ci *  SniffUSB observations: the MSR is also returned as first byte on the
28962306a36Sopenharmony_ci *  interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
29062306a36Sopenharmony_ci *  request to read MSR cannot be applied during normal device operation.
29162306a36Sopenharmony_ci *
29262306a36Sopenharmony_ci *
29362306a36Sopenharmony_ci * Line Status Register (LSR)
29462306a36Sopenharmony_ci * --------------------------
29562306a36Sopenharmony_ci *
29662306a36Sopenharmony_ci *  Bit 7   Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
29762306a36Sopenharmony_ci *	    This bit is set to "1" when any of the bytes in the FIFO have one
29862306a36Sopenharmony_ci *	    or more of the following error conditions: PE, FE, or BI.
29962306a36Sopenharmony_ci *  Bit 6   Transmitter Empty (TEMT). When set to "1", there are no words
30062306a36Sopenharmony_ci *	    remaining in the transmit FIFO or the transmit shift register. The
30162306a36Sopenharmony_ci *	    transmitter is completely idle.
30262306a36Sopenharmony_ci *  Bit 5   Transmitter Holding Register Empty (THRE). When set to "1", the
30362306a36Sopenharmony_ci *	    FIFO (or holding register) now has room for at least one additional
30462306a36Sopenharmony_ci *	    word to transmit. The transmitter may still be transmitting when
30562306a36Sopenharmony_ci *	    this bit is set to "1".
30662306a36Sopenharmony_ci *  Bit 4   Break Interrupt (BI). The receiver has detected a Break signal.
30762306a36Sopenharmony_ci *  Bit 3   Framing Error (FE). A Start Bit was detected but the Stop Bit did
30862306a36Sopenharmony_ci *	    not appear at the expected time. The received word is probably
30962306a36Sopenharmony_ci *	    garbled.
31062306a36Sopenharmony_ci *  Bit 2   Parity Error (PE). The parity bit was incorrect for the word
31162306a36Sopenharmony_ci *	    received.
31262306a36Sopenharmony_ci *  Bit 1   Overrun Error (OE). A new word was received and there was no room
31362306a36Sopenharmony_ci *	    in the receive buffer. The newly-arrived word in the shift register
31462306a36Sopenharmony_ci *	    is discarded. On 8250/16450 UARTs, the word in the holding register
31562306a36Sopenharmony_ci *	    is discarded and the newly- arrived word is put in the holding
31662306a36Sopenharmony_ci *	    register.
31762306a36Sopenharmony_ci *  Bit 0   Data Ready (DR). One or more words are in the receive FIFO that the
31862306a36Sopenharmony_ci *	    host may read. A word must be completely received and moved from
31962306a36Sopenharmony_ci *	    the shift register into the FIFO (or holding register for
32062306a36Sopenharmony_ci *	    8250/16450 designs) before this bit is set.
32162306a36Sopenharmony_ci *
32262306a36Sopenharmony_ci *  SniffUSB observations: the LSR is returned as second byte on the
32362306a36Sopenharmony_ci *  interrupt-in endpoint 0x83 to signal error conditions. Such errors have
32462306a36Sopenharmony_ci *  been seen with minicom/zmodem transfers (CRC errors).
32562306a36Sopenharmony_ci *
32662306a36Sopenharmony_ci *
32762306a36Sopenharmony_ci * Unknown #1
32862306a36Sopenharmony_ci * -------------------
32962306a36Sopenharmony_ci *
33062306a36Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
33162306a36Sopenharmony_ci *   bRequest:       0x0b
33262306a36Sopenharmony_ci *   wValue:         0x0000
33362306a36Sopenharmony_ci *   wIndex:         0x0000
33462306a36Sopenharmony_ci *   wLength:        0x0001
33562306a36Sopenharmony_ci *   Data:           0x00
33662306a36Sopenharmony_ci *
33762306a36Sopenharmony_ci *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
33862306a36Sopenharmony_ci *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
33962306a36Sopenharmony_ci *   occurs immediately after a "Baud rate (divisor)" message.  It was not
34062306a36Sopenharmony_ci *   observed at any other time.  It is unclear what purpose this message
34162306a36Sopenharmony_ci *   serves.
34262306a36Sopenharmony_ci *
34362306a36Sopenharmony_ci *
34462306a36Sopenharmony_ci * Unknown #2
34562306a36Sopenharmony_ci * -------------------
34662306a36Sopenharmony_ci *
34762306a36Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
34862306a36Sopenharmony_ci *   bRequest:       0x0c
34962306a36Sopenharmony_ci *   wValue:         0x0000
35062306a36Sopenharmony_ci *   wIndex:         0x0000
35162306a36Sopenharmony_ci *   wLength:        0x0001
35262306a36Sopenharmony_ci *   Data:           0x00
35362306a36Sopenharmony_ci *
35462306a36Sopenharmony_ci *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
35562306a36Sopenharmony_ci *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
35662306a36Sopenharmony_ci *   occurs immediately after the 'Unknown #1' message (see above).  It was
35762306a36Sopenharmony_ci *   not observed at any other time.  It is unclear what other purpose (if
35862306a36Sopenharmony_ci *   any) this message might serve, but without it, the USB/RS-232 adapter
35962306a36Sopenharmony_ci *   will not write to RS-232 devices which do not assert the 'CTS' signal.
36062306a36Sopenharmony_ci *
36162306a36Sopenharmony_ci *
36262306a36Sopenharmony_ci * Flow control
36362306a36Sopenharmony_ci * ------------
36462306a36Sopenharmony_ci *
36562306a36Sopenharmony_ci *  SniffUSB observations: no flow control specific requests have been realized
36662306a36Sopenharmony_ci *  apart from DTR/RTS settings. Both signals are dropped for no flow control
36762306a36Sopenharmony_ci *  but asserted for hardware or software flow control.
36862306a36Sopenharmony_ci *
36962306a36Sopenharmony_ci *
37062306a36Sopenharmony_ci * Endpoint usage
37162306a36Sopenharmony_ci * --------------
37262306a36Sopenharmony_ci *
37362306a36Sopenharmony_ci *  SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
37462306a36Sopenharmony_ci *  0x81 is used to transmit and receive characters. The second interrupt-in
37562306a36Sopenharmony_ci *  endpoint 0x83 signals exceptional conditions like modem line changes and
37662306a36Sopenharmony_ci *  errors. The first byte returned is the MSR and the second byte the LSR.
37762306a36Sopenharmony_ci *
37862306a36Sopenharmony_ci *
37962306a36Sopenharmony_ci * Other observations
38062306a36Sopenharmony_ci * ------------------
38162306a36Sopenharmony_ci *
38262306a36Sopenharmony_ci *  Queued bulk transfers like used in visor.c did not work.
38362306a36Sopenharmony_ci *
38462306a36Sopenharmony_ci *
38562306a36Sopenharmony_ci * Properties of the USB device used (as found in /var/log/messages)
38662306a36Sopenharmony_ci * -----------------------------------------------------------------
38762306a36Sopenharmony_ci *
38862306a36Sopenharmony_ci *  Manufacturer: MCT Corporation.
38962306a36Sopenharmony_ci *  Product: USB-232 Interfact Controller
39062306a36Sopenharmony_ci *  SerialNumber: U2S22050
39162306a36Sopenharmony_ci *
39262306a36Sopenharmony_ci *    Length              = 18
39362306a36Sopenharmony_ci *    DescriptorType      = 01
39462306a36Sopenharmony_ci *    USB version         = 1.00
39562306a36Sopenharmony_ci *    Vendor:Product      = 0711:0210
39662306a36Sopenharmony_ci *    MaxPacketSize0      = 8
39762306a36Sopenharmony_ci *    NumConfigurations   = 1
39862306a36Sopenharmony_ci *    Device version      = 1.02
39962306a36Sopenharmony_ci *    Device Class:SubClass:Protocol = 00:00:00
40062306a36Sopenharmony_ci *      Per-interface classes
40162306a36Sopenharmony_ci *  Configuration:
40262306a36Sopenharmony_ci *    bLength             =    9
40362306a36Sopenharmony_ci *    bDescriptorType     =   02
40462306a36Sopenharmony_ci *    wTotalLength        = 0027
40562306a36Sopenharmony_ci *    bNumInterfaces      =   01
40662306a36Sopenharmony_ci *    bConfigurationValue =   01
40762306a36Sopenharmony_ci *    iConfiguration      =   00
40862306a36Sopenharmony_ci *    bmAttributes        =   c0
40962306a36Sopenharmony_ci *    MaxPower            =  100mA
41062306a36Sopenharmony_ci *
41162306a36Sopenharmony_ci *    Interface: 0
41262306a36Sopenharmony_ci *    Alternate Setting:  0
41362306a36Sopenharmony_ci *      bLength             =    9
41462306a36Sopenharmony_ci *      bDescriptorType     =   04
41562306a36Sopenharmony_ci *      bInterfaceNumber    =   00
41662306a36Sopenharmony_ci *      bAlternateSetting   =   00
41762306a36Sopenharmony_ci *      bNumEndpoints       =   03
41862306a36Sopenharmony_ci *      bInterface Class:SubClass:Protocol =   00:00:00
41962306a36Sopenharmony_ci *      iInterface          =   00
42062306a36Sopenharmony_ci *      Endpoint:
42162306a36Sopenharmony_ci *	  bLength             =    7
42262306a36Sopenharmony_ci *	  bDescriptorType     =   05
42362306a36Sopenharmony_ci *	  bEndpointAddress    =   81 (in)
42462306a36Sopenharmony_ci *	  bmAttributes        =   03 (Interrupt)
42562306a36Sopenharmony_ci *	  wMaxPacketSize      = 0040
42662306a36Sopenharmony_ci *	  bInterval           =   02
42762306a36Sopenharmony_ci *      Endpoint:
42862306a36Sopenharmony_ci *	  bLength             =    7
42962306a36Sopenharmony_ci *	  bDescriptorType     =   05
43062306a36Sopenharmony_ci *	  bEndpointAddress    =   01 (out)
43162306a36Sopenharmony_ci *	  bmAttributes        =   02 (Bulk)
43262306a36Sopenharmony_ci *	  wMaxPacketSize      = 0040
43362306a36Sopenharmony_ci *	  bInterval           =   00
43462306a36Sopenharmony_ci *      Endpoint:
43562306a36Sopenharmony_ci *	  bLength             =    7
43662306a36Sopenharmony_ci *	  bDescriptorType     =   05
43762306a36Sopenharmony_ci *	  bEndpointAddress    =   83 (in)
43862306a36Sopenharmony_ci *	  bmAttributes        =   03 (Interrupt)
43962306a36Sopenharmony_ci *	  wMaxPacketSize      = 0002
44062306a36Sopenharmony_ci *	  bInterval           =   02
44162306a36Sopenharmony_ci *
44262306a36Sopenharmony_ci *
44362306a36Sopenharmony_ci * Hardware details (added by Martin Hamilton, 2001/12/06)
44462306a36Sopenharmony_ci * -----------------------------------------------------------------
44562306a36Sopenharmony_ci *
44662306a36Sopenharmony_ci * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
44762306a36Sopenharmony_ci * adaptor, which turns out to simply be a re-badged U232-P9.  We
44862306a36Sopenharmony_ci * know this because there is a sticky label on the circuit board
44962306a36Sopenharmony_ci * which says "U232-P9" ;-)
45062306a36Sopenharmony_ci *
45162306a36Sopenharmony_ci * The circuit board inside the adaptor contains a Philips PDIUSBD12
45262306a36Sopenharmony_ci * USB endpoint chip and a Philips P87C52UBAA microcontroller with
45362306a36Sopenharmony_ci * embedded UART.  Exhaustive documentation for these is available at:
45462306a36Sopenharmony_ci *
45562306a36Sopenharmony_ci *   http://www.semiconductors.philips.com/pip/p87c52ubaa
45662306a36Sopenharmony_ci *   http://www.nxp.com/acrobat_download/various/PDIUSBD12_PROGRAMMING_GUIDE.pdf
45762306a36Sopenharmony_ci *
45862306a36Sopenharmony_ci * Thanks to Julian Highfield for the pointer to the Philips database.
45962306a36Sopenharmony_ci *
46062306a36Sopenharmony_ci */
46162306a36Sopenharmony_ci
46262306a36Sopenharmony_ci#endif /* __LINUX_USB_SERIAL_MCT_U232_H */
46362306a36Sopenharmony_ci
464