162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
262306a36Sopenharmony_ci/************************************************************************
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci *	USBVEND.H		Vendor-specific USB definitions
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci *	NOTE: This must be kept in sync with the Edgeport firmware and
762306a36Sopenharmony_ci *	must be kept backward-compatible with older firmware.
862306a36Sopenharmony_ci *
962306a36Sopenharmony_ci ************************************************************************
1062306a36Sopenharmony_ci *
1162306a36Sopenharmony_ci *	Copyright (C) 1998 Inside Out Networks, Inc.
1262306a36Sopenharmony_ci *
1362306a36Sopenharmony_ci ************************************************************************/
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#if !defined(_USBVEND_H)
1662306a36Sopenharmony_ci#define	_USBVEND_H
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci/************************************************************************
1962306a36Sopenharmony_ci *
2062306a36Sopenharmony_ci *		D e f i n e s   /   T y p e d e f s
2162306a36Sopenharmony_ci *
2262306a36Sopenharmony_ci ************************************************************************/
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci//
2562306a36Sopenharmony_ci// Definitions of USB product IDs
2662306a36Sopenharmony_ci//
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define	USB_VENDOR_ID_ION	0x1608		// Our VID
2962306a36Sopenharmony_ci#define	USB_VENDOR_ID_TI	0x0451		// TI VID
3062306a36Sopenharmony_ci#define USB_VENDOR_ID_AXIOHM	0x05D9		/* Axiohm VID */
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci//
3362306a36Sopenharmony_ci// Definitions of USB product IDs (PID)
3462306a36Sopenharmony_ci// We break the USB-defined PID into an OEM Id field (upper 6 bits)
3562306a36Sopenharmony_ci// and a Device Id (bottom 10 bits). The Device Id defines what
3662306a36Sopenharmony_ci// device this actually is regardless of what the OEM wants to
3762306a36Sopenharmony_ci// call it.
3862306a36Sopenharmony_ci//
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci// ION-device OEM IDs
4162306a36Sopenharmony_ci#define	ION_OEM_ID_ION		0		// 00h Inside Out Networks
4262306a36Sopenharmony_ci#define	ION_OEM_ID_NLYNX	1		// 01h NLynx Systems
4362306a36Sopenharmony_ci#define	ION_OEM_ID_GENERIC	2		// 02h Generic OEM
4462306a36Sopenharmony_ci#define	ION_OEM_ID_MAC		3		// 03h Mac Version
4562306a36Sopenharmony_ci#define	ION_OEM_ID_MEGAWOLF	4		// 04h Lupusb OEM Mac version (MegaWolf)
4662306a36Sopenharmony_ci#define	ION_OEM_ID_MULTITECH	5		// 05h Multitech Rapidports
4762306a36Sopenharmony_ci#define	ION_OEM_ID_AGILENT	6		// 06h AGILENT board
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci// ION-device Device IDs
5162306a36Sopenharmony_ci// Product IDs - assigned to match middle digit of serial number (No longer true)
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci#define ION_DEVICE_ID_80251_NETCHIP	0x020	// This bit is set in the PID if this edgeport hardware$
5462306a36Sopenharmony_ci						// is based on the 80251+Netchip.
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci#define ION_DEVICE_ID_GENERATION_1	0x00	// Value for 930 based edgeports
5762306a36Sopenharmony_ci#define ION_DEVICE_ID_GENERATION_2	0x01	// Value for 80251+Netchip.
5862306a36Sopenharmony_ci#define ION_DEVICE_ID_GENERATION_3	0x02	// Value for Texas Instruments TUSB5052 chip
5962306a36Sopenharmony_ci#define ION_DEVICE_ID_GENERATION_4	0x03	// Watchport Family of products
6062306a36Sopenharmony_ci#define ION_GENERATION_MASK		0x03
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci#define ION_DEVICE_ID_HUB_MASK		0x0080	// This bit in the PID designates a HUB device
6362306a36Sopenharmony_ci						// for example 8C would be a 421 4 port hub
6462306a36Sopenharmony_ci						// and 8D would be a 2 port embedded hub
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci#define EDGEPORT_DEVICE_ID_MASK			0x0ff	// Not including OEM or GENERATION fields
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci#define	ION_DEVICE_ID_UNCONFIGURED_EDGE_DEVICE	0x000	// In manufacturing only
6962306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_4		0x001	// Edgeport/4 RS232
7062306a36Sopenharmony_ci#define	ION_DEVICE_ID_EDGEPORT_8R		0x002	// Edgeport with RJ45 no Ring
7162306a36Sopenharmony_ci#define ION_DEVICE_ID_RAPIDPORT_4		0x003	// Rapidport/4
7262306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_4T		0x004	// Edgeport/4 RS232 for Telxon (aka "Fleetport")
7362306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_2		0x005	// Edgeport/2 RS232
7462306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_4I		0x006	// Edgeport/4 RS422
7562306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_2I		0x007	// Edgeport/2 RS422/RS485
7662306a36Sopenharmony_ci#define	ION_DEVICE_ID_EDGEPORT_8RR		0x008	// Edgeport with RJ45 with Data and RTS/CTS only
7762306a36Sopenharmony_ci//	ION_DEVICE_ID_EDGEPORT_8_HANDBUILT	0x009	// Hand-built Edgeport/8 (Placeholder, used in middle digit of serial number only!)
7862306a36Sopenharmony_ci//	ION_DEVICE_ID_MULTIMODEM_4X56		0x00A	// MultiTech version of RP/4 (Placeholder, used in middle digit of serial number only!)
7962306a36Sopenharmony_ci#define	ION_DEVICE_ID_EDGEPORT_PARALLEL_PORT	0x00B	// Edgeport/(4)21 Parallel port (USS720)
8062306a36Sopenharmony_ci#define	ION_DEVICE_ID_EDGEPORT_421		0x00C	// Edgeport/421 Hub+RS232+Parallel
8162306a36Sopenharmony_ci#define	ION_DEVICE_ID_EDGEPORT_21		0x00D	// Edgeport/21  RS232+Parallel
8262306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU	0x00E	// Half of an Edgeport/8 (the kind with 2 EP/4s on 1 PCB)
8362306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_8		0x00F	// Edgeport/8 (single-CPU)
8462306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_2_DIN		0x010	// Edgeport/2 RS232 with Apple DIN connector
8562306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_4_DIN		0x011	// Edgeport/4 RS232 with Apple DIN connector
8662306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU	0x012	// Half of an Edgeport/16 (the kind with 2 EP/8s)
8762306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_COMPATIBLE	0x013	// Edgeport Compatible, for NCR, Axiohm etc. testing
8862306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_8I		0x014	// Edgeport/8 RS422 (single-CPU)
8962306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_1		0x015	// Edgeport/1 RS232
9062306a36Sopenharmony_ci#define ION_DEVICE_ID_EPOS44			0x016	// Half of an EPOS/44 (TIUMP BASED)
9162306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_42		0x017	// Edgeport/42
9262306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_412_8		0x018	// Edgeport/412 8 port part
9362306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_412_4		0x019	// Edgeport/412	4 port part
9462306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_22I		0x01A	// Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci// Compact Form factor TI based devices  2c, 21c, 22c, 221c
9762306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_2C		0x01B	// Edgeport/2c is a TI based Edgeport/2 - Small I2c
9862306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_221C		0x01C	// Edgeport/221c is a TI based Edgeport/2 with lucent chip and
9962306a36Sopenharmony_ci							// 2 external hub ports - Large I2C
10062306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_22C		0x01D	// Edgeport/22c is a TI based Edgeport/2 with
10162306a36Sopenharmony_ci							// 2 external hub ports - Large I2C
10262306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_21C		0x01E	// Edgeport/21c is a TI based Edgeport/2 with lucent chip
10362306a36Sopenharmony_ci							// Small I2C
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci/*
10762306a36Sopenharmony_ci *  DANGER DANGER The 0x20 bit was used to indicate a 8251/netchip GEN 2 device.
10862306a36Sopenharmony_ci *  Since the MAC, Linux, and Optimal drivers still used the old code
10962306a36Sopenharmony_ci *  I suggest that you skip the 0x20 bit when creating new PIDs
11062306a36Sopenharmony_ci */
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
11462306a36Sopenharmony_ci#define ION_DEVICE_ID_TI3410_EDGEPORT_1		0x040	// Edgeport/1 RS232
11562306a36Sopenharmony_ci#define ION_DEVICE_ID_TI3410_EDGEPORT_1I	0x041	// Edgeport/1i- RS422 model
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci// Ti based software switchable RS232/RS422/RS485 devices
11862306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_4S		0x042	// Edgeport/4s - software switchable model
11962306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_8S		0x043	// Edgeport/8s - software switchable model
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci// Usb to Ethernet dongle
12262306a36Sopenharmony_ci#define ION_DEVICE_ID_EDGEPORT_E		0x0E0	// Edgeport/E Usb to Ethernet
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci// Edgeport TI based devices
12562306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_4		0x0201	// Edgeport/4 RS232
12662306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_2		0x0205	// Edgeport/2 RS232
12762306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_4I		0x0206	// Edgeport/4i RS422
12862306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_2I		0x0207	// Edgeport/2i RS422/RS485
12962306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_421		0x020C	// Edgeport/421 4 hub 2 RS232 + Parallel (lucent on a different hub port)
13062306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_21		0x020D	// Edgeport/21 2 RS232 + Parallel (lucent on a different hub port)
13162306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_416		0x0212  // Edgeport/416
13262306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_1		0x0215	// Edgeport/1 RS232
13362306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_42		0x0217	// Edgeport/42 4 hub 2 RS232
13462306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_22I		0x021A	// Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232
13562306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_2C		0x021B	// Edgeport/2c RS232
13662306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_221C		0x021C	// Edgeport/221c is a TI based Edgeport/2 with lucent chip and
13762306a36Sopenharmony_ci							// 2 external hub ports - Large I2C
13862306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_22C		0x021D	// Edgeport/22c is a TI based Edgeport/2 with
13962306a36Sopenharmony_ci							// 2 external hub ports - Large I2C
14062306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_21C		0x021E	// Edgeport/21c is a TI based Edgeport/2 with lucent chip
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
14362306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1	0x0240	// Edgeport/1 RS232
14462306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I	0x0241	// Edgeport/1i- RS422 model
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci// Ti based software switchable RS232/RS422/RS485 devices
14762306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_4S		0x0242	// Edgeport/4s - software switchable model
14862306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_8S		0x0243	// Edgeport/8s - software switchable model
14962306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_8		0x0244	// Edgeport/8 (single-CPU)
15062306a36Sopenharmony_ci#define ION_DEVICE_ID_TI_EDGEPORT_416B		0x0247	// Edgeport/416
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_ci/************************************************************************
15462306a36Sopenharmony_ci *
15562306a36Sopenharmony_ci *                        Generation 4 devices
15662306a36Sopenharmony_ci *
15762306a36Sopenharmony_ci ************************************************************************/
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_ci// Watchport based on 3410 both 1-wire and binary products (16K I2C)
16062306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_UNSERIALIZED		0x300	// Watchport based on 3410 both 1-wire and binary products
16162306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_PROXIMITY		0x301	// Watchport/P Discontinued
16262306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_MOTION			0x302	// Watchport/M
16362306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_MOISTURE		0x303	// Watchport/W
16462306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_TEMPERATURE		0x304	// Watchport/T
16562306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_HUMIDITY		0x305	// Watchport/H
16662306a36Sopenharmony_ci
16762306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_POWER			0x306	// Watchport
16862306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_LIGHT			0x307	// Watchport
16962306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_RADIATION		0x308	// Watchport
17062306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_ACCELERATION		0x309	// Watchport/A
17162306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_DISTANCE		0x30A	// Watchport/D Discontinued
17262306a36Sopenharmony_ci#define ION_DEVICE_ID_WP_PROX_DIST		0x30B	// Watchport/D uses distance sensor
17362306a36Sopenharmony_ci							// Default to /P function
17462306a36Sopenharmony_ci
17562306a36Sopenharmony_ci#define ION_DEVICE_ID_PLUS_PWR_HP4CD		0x30C	// 5052 Plus Power HubPort/4CD+ (for Dell)
17662306a36Sopenharmony_ci#define ION_DEVICE_ID_PLUS_PWR_HP4C		0x30D	// 5052 Plus Power HubPort/4C+
17762306a36Sopenharmony_ci#define ION_DEVICE_ID_PLUS_PWR_PCI		0x30E	// 3410 Plus Power PCI Host Controller 4 port
17862306a36Sopenharmony_ci
17962306a36Sopenharmony_ci
18062306a36Sopenharmony_ci//
18162306a36Sopenharmony_ci// Definitions for AXIOHM USB product IDs
18262306a36Sopenharmony_ci//
18362306a36Sopenharmony_ci#define	USB_VENDOR_ID_AXIOHM			0x05D9	// Axiohm VID
18462306a36Sopenharmony_ci
18562306a36Sopenharmony_ci#define AXIOHM_DEVICE_ID_MASK			0xffff
18662306a36Sopenharmony_ci#define AXIOHM_DEVICE_ID_EPIC_A758		0xA758
18762306a36Sopenharmony_ci#define AXIOHM_DEVICE_ID_EPIC_A794		0xA794
18862306a36Sopenharmony_ci#define AXIOHM_DEVICE_ID_EPIC_A225		0xA225
18962306a36Sopenharmony_ci
19062306a36Sopenharmony_ci
19162306a36Sopenharmony_ci//
19262306a36Sopenharmony_ci// Definitions for NCR USB product IDs
19362306a36Sopenharmony_ci//
19462306a36Sopenharmony_ci#define	USB_VENDOR_ID_NCR			0x0404	// NCR VID
19562306a36Sopenharmony_ci
19662306a36Sopenharmony_ci#define NCR_DEVICE_ID_MASK			0xffff
19762306a36Sopenharmony_ci#define NCR_DEVICE_ID_EPIC_0202			0x0202
19862306a36Sopenharmony_ci#define NCR_DEVICE_ID_EPIC_0203			0x0203
19962306a36Sopenharmony_ci#define NCR_DEVICE_ID_EPIC_0310			0x0310
20062306a36Sopenharmony_ci#define NCR_DEVICE_ID_EPIC_0311			0x0311
20162306a36Sopenharmony_ci#define NCR_DEVICE_ID_EPIC_0312			0x0312
20262306a36Sopenharmony_ci
20362306a36Sopenharmony_ci
20462306a36Sopenharmony_ci//
20562306a36Sopenharmony_ci// Definitions for SYMBOL USB product IDs
20662306a36Sopenharmony_ci//
20762306a36Sopenharmony_ci#define USB_VENDOR_ID_SYMBOL			0x05E0	// Symbol VID
20862306a36Sopenharmony_ci#define SYMBOL_DEVICE_ID_MASK			0xffff
20962306a36Sopenharmony_ci#define SYMBOL_DEVICE_ID_KEYFOB			0x0700
21062306a36Sopenharmony_ci
21162306a36Sopenharmony_ci
21262306a36Sopenharmony_ci//
21362306a36Sopenharmony_ci// Definitions for other product IDs
21462306a36Sopenharmony_ci#define ION_DEVICE_ID_MT4X56USB			0x1403	// OEM device
21562306a36Sopenharmony_ci#define ION_DEVICE_ID_E5805A			0x1A01  // OEM device (rebranded Edgeport/4)
21662306a36Sopenharmony_ci
21762306a36Sopenharmony_ci
21862306a36Sopenharmony_ci#define	GENERATION_ID_FROM_USB_PRODUCT_ID(ProductId)				\
21962306a36Sopenharmony_ci			((__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)))
22062306a36Sopenharmony_ci
22162306a36Sopenharmony_ci#define	MAKE_USB_PRODUCT_ID(OemId, DeviceId)					\
22262306a36Sopenharmony_ci			((__u16) (((OemId) << 10) || (DeviceId)))
22362306a36Sopenharmony_ci
22462306a36Sopenharmony_ci#define	DEVICE_ID_FROM_USB_PRODUCT_ID(ProductId)				\
22562306a36Sopenharmony_ci			((__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)))
22662306a36Sopenharmony_ci
22762306a36Sopenharmony_ci#define	OEM_ID_FROM_USB_PRODUCT_ID(ProductId)					\
22862306a36Sopenharmony_ci			((__u16) (((ProductId) >> 10) & 0x3F))
22962306a36Sopenharmony_ci
23062306a36Sopenharmony_ci//
23162306a36Sopenharmony_ci// Definitions of parameters for download code. Note that these are
23262306a36Sopenharmony_ci// specific to a given version of download code and must change if the
23362306a36Sopenharmony_ci// corresponding download code changes.
23462306a36Sopenharmony_ci//
23562306a36Sopenharmony_ci
23662306a36Sopenharmony_ci// TxCredits value below which driver won't bother sending (to prevent too many small writes).
23762306a36Sopenharmony_ci// Send only if above 25%
23862306a36Sopenharmony_ci#define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max(((InitialCredit) / 4), (MaxPacketSize)))
23962306a36Sopenharmony_ci
24062306a36Sopenharmony_ci#define	EDGE_FW_BULK_MAX_PACKET_SIZE		64	// Max Packet Size for Bulk In Endpoint (EP1)
24162306a36Sopenharmony_ci#define EDGE_FW_BULK_READ_BUFFER_SIZE		1024	// Size to use for Bulk reads
24262306a36Sopenharmony_ci
24362306a36Sopenharmony_ci#define	EDGE_FW_INT_MAX_PACKET_SIZE		32	// Max Packet Size for Interrupt In Endpoint
24462306a36Sopenharmony_ci							// Note that many units were shipped with MPS=16, we
24562306a36Sopenharmony_ci							// force an upgrade to this value).
24662306a36Sopenharmony_ci#define EDGE_FW_INT_INTERVAL			2	// 2ms polling on IntPipe
24762306a36Sopenharmony_ci
24862306a36Sopenharmony_ci
24962306a36Sopenharmony_ci//
25062306a36Sopenharmony_ci// Definitions of I/O Networks vendor-specific requests
25162306a36Sopenharmony_ci// for default endpoint
25262306a36Sopenharmony_ci//
25362306a36Sopenharmony_ci//	bmRequestType = 01000000	Set vendor-specific, to device
25462306a36Sopenharmony_ci//	bmRequestType = 11000000	Get vendor-specific, to device
25562306a36Sopenharmony_ci//
25662306a36Sopenharmony_ci// These are the definitions for the bRequest field for the
25762306a36Sopenharmony_ci// above bmRequestTypes.
25862306a36Sopenharmony_ci//
25962306a36Sopenharmony_ci// For the read/write Edgeport memory commands, the parameters
26062306a36Sopenharmony_ci// are as follows:
26162306a36Sopenharmony_ci//		wValue = 16-bit address
26262306a36Sopenharmony_ci//		wIndex = unused (though we could put segment 00: or FF: here)
26362306a36Sopenharmony_ci//		wLength = # bytes to read/write (max 64)
26462306a36Sopenharmony_ci//
26562306a36Sopenharmony_ci
26662306a36Sopenharmony_ci#define USB_REQUEST_ION_RESET_DEVICE	0	// Warm reboot Edgeport, retaining USB address
26762306a36Sopenharmony_ci#define USB_REQUEST_ION_GET_EPIC_DESC	1	// Get Edgeport Compatibility Descriptor
26862306a36Sopenharmony_ci// unused				2	// Unused, available
26962306a36Sopenharmony_ci#define USB_REQUEST_ION_READ_RAM	3	// Read  EdgePort RAM at specified addr
27062306a36Sopenharmony_ci#define USB_REQUEST_ION_WRITE_RAM	4	// Write EdgePort RAM at specified addr
27162306a36Sopenharmony_ci#define USB_REQUEST_ION_READ_ROM	5	// Read  EdgePort ROM at specified addr
27262306a36Sopenharmony_ci#define USB_REQUEST_ION_WRITE_ROM	6	// Write EdgePort ROM at specified addr
27362306a36Sopenharmony_ci#define USB_REQUEST_ION_EXEC_DL_CODE	7	// Begin execution of RAM-based download
27462306a36Sopenharmony_ci						// code by jumping to address in wIndex:wValue
27562306a36Sopenharmony_ci//					8	// Unused, available
27662306a36Sopenharmony_ci#define USB_REQUEST_ION_ENABLE_SUSPEND	9	// Enable/Disable suspend feature
27762306a36Sopenharmony_ci						// (wValue != 0: Enable; wValue = 0: Disable)
27862306a36Sopenharmony_ci
27962306a36Sopenharmony_ci#define USB_REQUEST_ION_SEND_IOSP	10	// Send an IOSP command to the edgeport over the control pipe
28062306a36Sopenharmony_ci#define USB_REQUEST_ION_RECV_IOSP	11	// Receive an IOSP command from the edgeport over the control pipe
28162306a36Sopenharmony_ci
28262306a36Sopenharmony_ci
28362306a36Sopenharmony_ci#define USB_REQUEST_ION_DIS_INT_TIMER	0x80	// Sent to Axiohm to enable/ disable
28462306a36Sopenharmony_ci						// interrupt token timer
28562306a36Sopenharmony_ci						// wValue = 1, enable (default)
28662306a36Sopenharmony_ci						// wValue = 0, disable
28762306a36Sopenharmony_ci
28862306a36Sopenharmony_ci//
28962306a36Sopenharmony_ci// Define parameter values for our vendor-specific commands
29062306a36Sopenharmony_ci//
29162306a36Sopenharmony_ci
29262306a36Sopenharmony_ci//
29362306a36Sopenharmony_ci// Edgeport Compatibility Descriptor
29462306a36Sopenharmony_ci//
29562306a36Sopenharmony_ci// This descriptor is only returned by Edgeport-compatible devices
29662306a36Sopenharmony_ci// supporting the EPiC spec. True ION devices do not return this
29762306a36Sopenharmony_ci// descriptor, but instead return STALL on receipt of the
29862306a36Sopenharmony_ci// GET_EPIC_DESC command. The driver interprets a STALL to mean that
29962306a36Sopenharmony_ci// this is a "real" Edgeport.
30062306a36Sopenharmony_ci//
30162306a36Sopenharmony_ci
30262306a36Sopenharmony_cistruct edge_compatibility_bits {
30362306a36Sopenharmony_ci	// This __u32 defines which Vendor-specific commands/functionality
30462306a36Sopenharmony_ci	// the device supports on the default EP0 pipe.
30562306a36Sopenharmony_ci
30662306a36Sopenharmony_ci	__u32	VendEnableSuspend	:  1;	// 0001 Set if device supports ION_ENABLE_SUSPEND
30762306a36Sopenharmony_ci	__u32	VendUnused		: 31;	// Available for future expansion, must be 0
30862306a36Sopenharmony_ci
30962306a36Sopenharmony_ci	// This __u32 defines which IOSP commands are supported over the
31062306a36Sopenharmony_ci	// bulk pipe EP1.
31162306a36Sopenharmony_ci
31262306a36Sopenharmony_ci											// xxxx Set if device supports:
31362306a36Sopenharmony_ci	__u32	IOSPOpen		:  1;	// 0001	OPEN / OPEN_RSP (Currently must be 1)
31462306a36Sopenharmony_ci	__u32	IOSPClose		:  1;	// 0002	CLOSE
31562306a36Sopenharmony_ci	__u32	IOSPChase		:  1;	// 0004	CHASE / CHASE_RSP
31662306a36Sopenharmony_ci	__u32	IOSPSetRxFlow		:  1;	// 0008	SET_RX_FLOW
31762306a36Sopenharmony_ci	__u32	IOSPSetTxFlow		:  1;	// 0010	SET_TX_FLOW
31862306a36Sopenharmony_ci	__u32	IOSPSetXChar		:  1;	// 0020	SET_XON_CHAR/SET_XOFF_CHAR
31962306a36Sopenharmony_ci	__u32	IOSPRxCheck		:  1;	// 0040	RX_CHECK_REQ/RX_CHECK_RSP
32062306a36Sopenharmony_ci	__u32	IOSPSetClrBreak		:  1;	// 0080	SET_BREAK/CLEAR_BREAK
32162306a36Sopenharmony_ci	__u32	IOSPWriteMCR		:  1;	// 0100	MCR register writes (set/clr DTR/RTS)
32262306a36Sopenharmony_ci	__u32	IOSPWriteLCR		:  1;	// 0200	LCR register writes (wordlen/stop/parity)
32362306a36Sopenharmony_ci	__u32	IOSPSetBaudRate		:  1;	// 0400	setting Baud rate (writes to LCR.80h and DLL/DLM register)
32462306a36Sopenharmony_ci	__u32	IOSPDisableIntPipe	:  1;	// 0800 Do not use the interrupt pipe for TxCredits or RxButesAvailable
32562306a36Sopenharmony_ci	__u32	IOSPRxDataAvail		:  1;   // 1000 Return status of RX Fifo (Data available in Fifo)
32662306a36Sopenharmony_ci	__u32	IOSPTxPurge		:  1;	// 2000 Purge TXBuffer and/or Fifo in Edgeport hardware
32762306a36Sopenharmony_ci	__u32	IOSPUnused		: 18;	// Available for future expansion, must be 0
32862306a36Sopenharmony_ci
32962306a36Sopenharmony_ci	// This __u32 defines which 'general' features are supported
33062306a36Sopenharmony_ci
33162306a36Sopenharmony_ci	__u32	TrueEdgeport		:  1;	// 0001	Set if device is a 'real' Edgeport
33262306a36Sopenharmony_ci											// (Used only by driver, NEVER set by an EPiC device)
33362306a36Sopenharmony_ci	__u32	GenUnused		: 31;	// Available for future expansion, must be 0
33462306a36Sopenharmony_ci};
33562306a36Sopenharmony_ci
33662306a36Sopenharmony_ci#define EDGE_COMPATIBILITY_MASK0	0x0001
33762306a36Sopenharmony_ci#define EDGE_COMPATIBILITY_MASK1	0x3FFF
33862306a36Sopenharmony_ci#define EDGE_COMPATIBILITY_MASK2	0x0001
33962306a36Sopenharmony_ci
34062306a36Sopenharmony_cistruct edge_compatibility_descriptor {
34162306a36Sopenharmony_ci	__u8	Length;				// Descriptor Length (per USB spec)
34262306a36Sopenharmony_ci	__u8	DescType;			// Descriptor Type (per USB spec, =DEVICE type)
34362306a36Sopenharmony_ci	__u8	EpicVer;			// Version of EPiC spec supported
34462306a36Sopenharmony_ci						// (Currently must be 1)
34562306a36Sopenharmony_ci	__u8	NumPorts;			// Number of serial ports supported
34662306a36Sopenharmony_ci	__u8	iDownloadFile;			// Index of string containing download code filename
34762306a36Sopenharmony_ci						// 0=no download, FF=download compiled into driver.
34862306a36Sopenharmony_ci	__u8	Unused[3];			// Available for future expansion, must be 0
34962306a36Sopenharmony_ci						// (Currently must be 0).
35062306a36Sopenharmony_ci	__u8	MajorVersion;			// Firmware version: xx.
35162306a36Sopenharmony_ci	__u8	MinorVersion;			//  yy.
35262306a36Sopenharmony_ci	__le16	BuildNumber;			//  zzzz (LE format)
35362306a36Sopenharmony_ci
35462306a36Sopenharmony_ci	// The following structure contains __u32s, with each bit
35562306a36Sopenharmony_ci	// specifying whether the EPiC device supports the given
35662306a36Sopenharmony_ci	// command or functionality.
35762306a36Sopenharmony_ci	struct edge_compatibility_bits	Supports;
35862306a36Sopenharmony_ci};
35962306a36Sopenharmony_ci
36062306a36Sopenharmony_ci// Values for iDownloadFile
36162306a36Sopenharmony_ci#define	EDGE_DOWNLOAD_FILE_NONE		0	// No download requested
36262306a36Sopenharmony_ci#define	EDGE_DOWNLOAD_FILE_INTERNAL	0xFF	// Download the file compiled into driver (930 version)
36362306a36Sopenharmony_ci#define	EDGE_DOWNLOAD_FILE_I930		0xFF	// Download the file compiled into driver (930 version)
36462306a36Sopenharmony_ci#define	EDGE_DOWNLOAD_FILE_80251	0xFE	// Download the file compiled into driver (80251 version)
36562306a36Sopenharmony_ci
36662306a36Sopenharmony_ci
36762306a36Sopenharmony_ci
36862306a36Sopenharmony_ci/*
36962306a36Sopenharmony_ci *	Special addresses for READ/WRITE_RAM/ROM
37062306a36Sopenharmony_ci */
37162306a36Sopenharmony_ci
37262306a36Sopenharmony_ci// Version 1 (original) format of DeviceParams
37362306a36Sopenharmony_ci#define	EDGE_MANUF_DESC_ADDR_V1		0x00FF7F00
37462306a36Sopenharmony_ci#define	EDGE_MANUF_DESC_LEN_V1		sizeof(EDGE_MANUF_DESCRIPTOR_V1)
37562306a36Sopenharmony_ci
37662306a36Sopenharmony_ci// Version 2 format of DeviceParams. This format is longer (3C0h)
37762306a36Sopenharmony_ci// and starts lower in memory, at the uppermost 1K in ROM.
37862306a36Sopenharmony_ci#define	EDGE_MANUF_DESC_ADDR		0x00FF7C00
37962306a36Sopenharmony_ci#define	EDGE_MANUF_DESC_LEN		sizeof(struct edge_manuf_descriptor)
38062306a36Sopenharmony_ci
38162306a36Sopenharmony_ci// Boot params descriptor
38262306a36Sopenharmony_ci#define	EDGE_BOOT_DESC_ADDR		0x00FF7FC0
38362306a36Sopenharmony_ci#define	EDGE_BOOT_DESC_LEN		sizeof(struct edge_boot_descriptor)
38462306a36Sopenharmony_ci
38562306a36Sopenharmony_ci// Define the max block size that may be read or written
38662306a36Sopenharmony_ci// in a read/write RAM/ROM command.
38762306a36Sopenharmony_ci#define	MAX_SIZE_REQ_ION_READ_MEM	((__u16)64)
38862306a36Sopenharmony_ci#define	MAX_SIZE_REQ_ION_WRITE_MEM	((__u16)64)
38962306a36Sopenharmony_ci
39062306a36Sopenharmony_ci
39162306a36Sopenharmony_ci//
39262306a36Sopenharmony_ci// Notes for the following two ION vendor-specific param descriptors:
39362306a36Sopenharmony_ci//
39462306a36Sopenharmony_ci//	1.	These have a standard USB descriptor header so they look like a
39562306a36Sopenharmony_ci//		normal descriptor.
39662306a36Sopenharmony_ci//	2.	Any strings in the structures are in USB-defined string
39762306a36Sopenharmony_ci//		descriptor format, so that they may be separately retrieved,
39862306a36Sopenharmony_ci//		if necessary, with a minimum of work on the 930. This also
39962306a36Sopenharmony_ci//		requires them to be in UNICODE format, which, for English at
40062306a36Sopenharmony_ci//		least, simply means extending each __u8 into a __u16.
40162306a36Sopenharmony_ci//	3.	For all fields, 00 means 'uninitialized'.
40262306a36Sopenharmony_ci//	4.	All unused areas should be set to 00 for future expansion.
40362306a36Sopenharmony_ci//
40462306a36Sopenharmony_ci
40562306a36Sopenharmony_ci// This structure is ver 2 format. It contains ALL USB descriptors as
40662306a36Sopenharmony_ci// well as the configuration parameters that were in the original V1
40762306a36Sopenharmony_ci// structure. It is NOT modified when new boot code is downloaded; rather,
40862306a36Sopenharmony_ci// these values are set or modified by manufacturing. It is located at
40962306a36Sopenharmony_ci// xC00-xFBF (length 3C0h) in the ROM.
41062306a36Sopenharmony_ci// This structure is a superset of the v1 structure and is arranged so
41162306a36Sopenharmony_ci// that all of the v1 fields remain at the same address. We are just
41262306a36Sopenharmony_ci// adding more room to the front of the structure to hold the descriptors.
41362306a36Sopenharmony_ci//
41462306a36Sopenharmony_ci// The actual contents of this structure are defined in a 930 assembly
41562306a36Sopenharmony_ci// file, converted to a binary image, and then written by the serialization
41662306a36Sopenharmony_ci// program. The C definition of this structure just defines a dummy
41762306a36Sopenharmony_ci// area for general USB descriptors and the descriptor tables (the root
41862306a36Sopenharmony_ci// descriptor starts at xC00). At the bottom of the structure are the
41962306a36Sopenharmony_ci// fields inherited from the v1 structure.
42062306a36Sopenharmony_ci
42162306a36Sopenharmony_ci#define MAX_SERIALNUMBER_LEN	12
42262306a36Sopenharmony_ci#define MAX_ASSEMBLYNUMBER_LEN	14
42362306a36Sopenharmony_ci
42462306a36Sopenharmony_cistruct edge_manuf_descriptor {
42562306a36Sopenharmony_ci
42662306a36Sopenharmony_ci	__u16	RootDescTable[0x10];			// C00 Root of descriptor tables (just a placeholder)
42762306a36Sopenharmony_ci	__u8	DescriptorArea[0x2E0];			// C20 Descriptors go here, up to 2E0h (just a placeholder)
42862306a36Sopenharmony_ci
42962306a36Sopenharmony_ci							//     Start of v1-compatible section
43062306a36Sopenharmony_ci	__u8	Length;					// F00 Desc length for what follows, per USB (= C0h )
43162306a36Sopenharmony_ci	__u8	DescType;				// F01 Desc type, per USB (=DEVICE type)
43262306a36Sopenharmony_ci	__u8	DescVer;				// F02 Desc version/format (currently 2)
43362306a36Sopenharmony_ci	__u8	NumRootDescEntries;			// F03 # entries in RootDescTable
43462306a36Sopenharmony_ci
43562306a36Sopenharmony_ci	__u8	RomSize;				// F04 Size of ROM/E2PROM in K
43662306a36Sopenharmony_ci	__u8	RamSize;				// F05 Size of external RAM in K
43762306a36Sopenharmony_ci	__u8	CpuRev;					// F06 CPU revision level (chg only if s/w visible)
43862306a36Sopenharmony_ci	__u8	BoardRev;				// F07 PCB revision level (chg only if s/w visible)
43962306a36Sopenharmony_ci
44062306a36Sopenharmony_ci	__u8	NumPorts;				// F08 Number of ports
44162306a36Sopenharmony_ci	__u8	DescDate[3];				// F09 MM/DD/YY when descriptor template was compiler,
44262306a36Sopenharmony_ci							//     so host can track changes to USB-only descriptors.
44362306a36Sopenharmony_ci
44462306a36Sopenharmony_ci	__u8	SerNumLength;				// F0C USB string descriptor len
44562306a36Sopenharmony_ci	__u8	SerNumDescType;				// F0D USB descriptor type (=STRING type)
44662306a36Sopenharmony_ci	__le16	SerialNumber[MAX_SERIALNUMBER_LEN];	// F0E "01-01-000100" Unicode Serial Number
44762306a36Sopenharmony_ci
44862306a36Sopenharmony_ci	__u8	AssemblyNumLength;			// F26 USB string descriptor len
44962306a36Sopenharmony_ci	__u8	AssemblyNumDescType;			// F27 USB descriptor type (=STRING type)
45062306a36Sopenharmony_ci	__le16	AssemblyNumber[MAX_ASSEMBLYNUMBER_LEN];	// F28 "350-1000-01-A " assembly number
45162306a36Sopenharmony_ci
45262306a36Sopenharmony_ci	__u8	OemAssyNumLength;			// F44 USB string descriptor len
45362306a36Sopenharmony_ci	__u8	OemAssyNumDescType;			// F45 USB descriptor type (=STRING type)
45462306a36Sopenharmony_ci	__le16	OemAssyNumber[MAX_ASSEMBLYNUMBER_LEN];	// F46 "xxxxxxxxxxxxxx" OEM assembly number
45562306a36Sopenharmony_ci
45662306a36Sopenharmony_ci	__u8	ManufDateLength;			// F62 USB string descriptor len
45762306a36Sopenharmony_ci	__u8	ManufDateDescType;			// F63 USB descriptor type (=STRING type)
45862306a36Sopenharmony_ci	__le16	ManufDate[6];				// F64 "MMDDYY" manufacturing date
45962306a36Sopenharmony_ci
46062306a36Sopenharmony_ci	__u8	Reserved3[0x4D];			// F70 -- unused, set to 0 --
46162306a36Sopenharmony_ci
46262306a36Sopenharmony_ci	__u8	UartType;				// FBD Uart Type
46362306a36Sopenharmony_ci	__u8	IonPid;					// FBE Product ID, == LSB of USB DevDesc.PID
46462306a36Sopenharmony_ci							//      (Note: Edgeport/4s before 11/98 will have
46562306a36Sopenharmony_ci							//       00 here instead of 01)
46662306a36Sopenharmony_ci	__u8	IonConfig;				// FBF Config byte for ION manufacturing use
46762306a36Sopenharmony_ci							// FBF end of structure, total len = 3C0h
46862306a36Sopenharmony_ci
46962306a36Sopenharmony_ci};
47062306a36Sopenharmony_ci
47162306a36Sopenharmony_ci
47262306a36Sopenharmony_ci#define MANUF_DESC_VER_1	1	// Original definition of MANUF_DESC
47362306a36Sopenharmony_ci#define MANUF_DESC_VER_2	2	// Ver 2, starts at xC00h len 3C0h
47462306a36Sopenharmony_ci
47562306a36Sopenharmony_ci
47662306a36Sopenharmony_ci// Uart Types
47762306a36Sopenharmony_ci// Note: Since this field was added only recently, all Edgeport/4 units
47862306a36Sopenharmony_ci// shipped before 11/98 will have 00 in this field. Therefore,
47962306a36Sopenharmony_ci// both 00 and 01 values mean '654.
48062306a36Sopenharmony_ci#define MANUF_UART_EXAR_654_EARLY	0	// Exar 16C654 in Edgeport/4s before 11/98
48162306a36Sopenharmony_ci#define MANUF_UART_EXAR_654		1	// Exar 16C654
48262306a36Sopenharmony_ci#define MANUF_UART_EXAR_2852		2	// Exar 16C2852
48362306a36Sopenharmony_ci
48462306a36Sopenharmony_ci//
48562306a36Sopenharmony_ci// Note: The CpuRev and BoardRev values do not conform to manufacturing
48662306a36Sopenharmony_ci// revisions; they are to be incremented only when the CPU or hardware
48762306a36Sopenharmony_ci// changes in a software-visible way, such that the 930 software or
48862306a36Sopenharmony_ci// the host driver needs to handle the hardware differently.
48962306a36Sopenharmony_ci//
49062306a36Sopenharmony_ci
49162306a36Sopenharmony_ci// Values of bottom 5 bits of CpuRev & BoardRev for
49262306a36Sopenharmony_ci// Implementation 0 (ie, 930-based)
49362306a36Sopenharmony_ci#define	MANUF_CPU_REV_AD4		1	// 930 AD4, with EP1 Rx bug (needs RXSPM)
49462306a36Sopenharmony_ci#define	MANUF_CPU_REV_AD5		2	// 930 AD5, with above bug (supposedly) fixed
49562306a36Sopenharmony_ci#define	MANUF_CPU_80251			0x20	// Intel 80251
49662306a36Sopenharmony_ci
49762306a36Sopenharmony_ci
49862306a36Sopenharmony_ci#define MANUF_BOARD_REV_A		1	// Original version, == Manuf Rev A
49962306a36Sopenharmony_ci#define MANUF_BOARD_REV_B		2	// Manuf Rev B, wakeup interrupt works
50062306a36Sopenharmony_ci#define MANUF_BOARD_REV_C		3	// Manuf Rev C, 2/4 ports, rs232/rs422
50162306a36Sopenharmony_ci#define MANUF_BOARD_REV_GENERATION_2	0x20	// Second generaiton edgeport
50262306a36Sopenharmony_ci
50362306a36Sopenharmony_ci
50462306a36Sopenharmony_ci// Values of bottom 5 bits of CpuRev & BoardRev for
50562306a36Sopenharmony_ci// Implementation 1 (ie, 251+Netchip-based)
50662306a36Sopenharmony_ci#define	MANUF_CPU_REV_1			1	// C251TB Rev 1 (Need actual Intel rev here)
50762306a36Sopenharmony_ci
50862306a36Sopenharmony_ci#define MANUF_BOARD_REV_A		1	// First rev of 251+Netchip design
50962306a36Sopenharmony_ci
51062306a36Sopenharmony_ci#define	MANUF_SERNUM_LENGTH		sizeof(((struct edge_manuf_descriptor *)0)->SerialNumber)
51162306a36Sopenharmony_ci#define	MANUF_ASSYNUM_LENGTH		sizeof(((struct edge_manuf_descriptor *)0)->AssemblyNumber)
51262306a36Sopenharmony_ci#define	MANUF_OEMASSYNUM_LENGTH		sizeof(((struct edge_manuf_descriptor *)0)->OemAssyNumber)
51362306a36Sopenharmony_ci#define	MANUF_MANUFDATE_LENGTH		sizeof(((struct edge_manuf_descriptor *)0)->ManufDate)
51462306a36Sopenharmony_ci
51562306a36Sopenharmony_ci#define	MANUF_ION_CONFIG_DIAG_NO_LOOP	0x20	// As below but no ext loopback test
51662306a36Sopenharmony_ci#define	MANUF_ION_CONFIG_DIAG		0x40	// 930 based device: 1=Run h/w diags, 0=norm
51762306a36Sopenharmony_ci						// TIUMP Device    : 1=IONSERIAL needs to run Final Test
51862306a36Sopenharmony_ci#define	MANUF_ION_CONFIG_MASTER		0x80	// 930 based device:  1=Master mode, 0=Normal
51962306a36Sopenharmony_ci						// TIUMP Device    :  1=First device on a multi TIUMP Device
52062306a36Sopenharmony_ci
52162306a36Sopenharmony_ci//
52262306a36Sopenharmony_ci// This structure describes parameters for the boot code, and
52362306a36Sopenharmony_ci// is programmed along with new boot code. These are values
52462306a36Sopenharmony_ci// which are specific to a given build of the boot code. It
52562306a36Sopenharmony_ci// is exactly 64 bytes long and is fixed at address FF:xFC0
52662306a36Sopenharmony_ci// - FF:xFFF. Note that the 930-mandated UCONFIG bytes are
52762306a36Sopenharmony_ci// included in this structure.
52862306a36Sopenharmony_ci//
52962306a36Sopenharmony_cistruct edge_boot_descriptor {
53062306a36Sopenharmony_ci	__u8		Length;			// C0 Desc length, per USB (= 40h)
53162306a36Sopenharmony_ci	__u8		DescType;		// C1 Desc type, per USB (= DEVICE type)
53262306a36Sopenharmony_ci	__u8		DescVer;		// C2 Desc version/format
53362306a36Sopenharmony_ci	__u8		Reserved1;		// C3 -- unused, set to 0 --
53462306a36Sopenharmony_ci
53562306a36Sopenharmony_ci	__le16		BootCodeLength;		// C4 Boot code goes from FF:0000 to FF:(len-1)
53662306a36Sopenharmony_ci						//	  (LE format)
53762306a36Sopenharmony_ci
53862306a36Sopenharmony_ci	__u8		MajorVersion;		// C6 Firmware version: xx.
53962306a36Sopenharmony_ci	__u8		MinorVersion;		// C7			yy.
54062306a36Sopenharmony_ci	__le16		BuildNumber;		// C8			zzzz (LE format)
54162306a36Sopenharmony_ci
54262306a36Sopenharmony_ci	__u16		EnumRootDescTable;	// CA Root of ROM-based descriptor table
54362306a36Sopenharmony_ci	__u8		NumDescTypes;		// CC Number of supported descriptor types
54462306a36Sopenharmony_ci
54562306a36Sopenharmony_ci	__u8		Reserved4;		// CD Fix Compiler Packing
54662306a36Sopenharmony_ci
54762306a36Sopenharmony_ci	__le16		Capabilities;		// CE-CF Capabilities flags (LE format)
54862306a36Sopenharmony_ci	__u8		Reserved2[0x28];	// D0 -- unused, set to 0 --
54962306a36Sopenharmony_ci	__u8		UConfig0;		// F8 930-defined CPU configuration byte 0
55062306a36Sopenharmony_ci	__u8		UConfig1;		// F9 930-defined CPU configuration byte 1
55162306a36Sopenharmony_ci	__u8		Reserved3[6];		// FA -- unused, set to 0 --
55262306a36Sopenharmony_ci						// FF end of structure, total len = 80
55362306a36Sopenharmony_ci};
55462306a36Sopenharmony_ci
55562306a36Sopenharmony_ci
55662306a36Sopenharmony_ci#define BOOT_DESC_VER_1		1	// Original definition of BOOT_PARAMS
55762306a36Sopenharmony_ci#define BOOT_DESC_VER_2		2	// 2nd definition, descriptors not included in boot
55862306a36Sopenharmony_ci
55962306a36Sopenharmony_ci
56062306a36Sopenharmony_ci	// Capabilities flags
56162306a36Sopenharmony_ci
56262306a36Sopenharmony_ci#define	BOOT_CAP_RESET_CMD	0x0001	// If set, boot correctly supports ION_RESET_DEVICE
56362306a36Sopenharmony_ci
56462306a36Sopenharmony_ci
56562306a36Sopenharmony_ci/************************************************************************
56662306a36Sopenharmony_ci                 T I   U M P   D E F I N I T I O N S
56762306a36Sopenharmony_ci ***********************************************************************/
56862306a36Sopenharmony_ci
56962306a36Sopenharmony_ci// Chip definitions in I2C
57062306a36Sopenharmony_ci#define UMP5152			0x52
57162306a36Sopenharmony_ci#define UMP3410			0x10
57262306a36Sopenharmony_ci
57362306a36Sopenharmony_ci
57462306a36Sopenharmony_ci//************************************************************************
57562306a36Sopenharmony_ci//	TI I2C Format Definitions
57662306a36Sopenharmony_ci//************************************************************************
57762306a36Sopenharmony_ci#define I2C_DESC_TYPE_INFO_BASIC	0x01
57862306a36Sopenharmony_ci#define I2C_DESC_TYPE_FIRMWARE_BASIC	0x02
57962306a36Sopenharmony_ci#define I2C_DESC_TYPE_DEVICE		0x03
58062306a36Sopenharmony_ci#define I2C_DESC_TYPE_CONFIG		0x04
58162306a36Sopenharmony_ci#define I2C_DESC_TYPE_STRING		0x05
58262306a36Sopenharmony_ci#define I2C_DESC_TYPE_FIRMWARE_AUTO	0x07	// for 3410 download
58362306a36Sopenharmony_ci#define I2C_DESC_TYPE_CONFIG_KLUDGE	0x14	// for 3410
58462306a36Sopenharmony_ci#define I2C_DESC_TYPE_WATCHPORT_VERSION	0x15	// firmware version number for watchport
58562306a36Sopenharmony_ci#define I2C_DESC_TYPE_WATCHPORT_CALIBRATION_DATA 0x16	// Watchport Calibration Data
58662306a36Sopenharmony_ci
58762306a36Sopenharmony_ci#define I2C_DESC_TYPE_FIRMWARE_BLANK	0xf2
58862306a36Sopenharmony_ci
58962306a36Sopenharmony_ci// Special section defined by ION
59062306a36Sopenharmony_ci#define I2C_DESC_TYPE_ION		0	// Not defined by TI
59162306a36Sopenharmony_ci
59262306a36Sopenharmony_ci
59362306a36Sopenharmony_cistruct ti_i2c_desc {
59462306a36Sopenharmony_ci	__u8	Type;			// Type of descriptor
59562306a36Sopenharmony_ci	__le16	Size;			// Size of data only not including header
59662306a36Sopenharmony_ci	__u8	CheckSum;		// Checksum (8 bit sum of data only)
59762306a36Sopenharmony_ci	__u8	Data[];		// Data starts here
59862306a36Sopenharmony_ci} __attribute__((packed));
59962306a36Sopenharmony_ci
60062306a36Sopenharmony_ci// for 5152 devices only (type 2 record)
60162306a36Sopenharmony_ci// for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor
60262306a36Sopenharmony_cistruct ti_i2c_firmware_rec {
60362306a36Sopenharmony_ci	__u8	Ver_Major;		// Firmware Major version number
60462306a36Sopenharmony_ci	__u8	Ver_Minor;		// Firmware Minor version number
60562306a36Sopenharmony_ci	__u8	Data[];		// Download starts here
60662306a36Sopenharmony_ci} __attribute__((packed));
60762306a36Sopenharmony_ci
60862306a36Sopenharmony_ci
60962306a36Sopenharmony_cistruct watchport_firmware_version {
61062306a36Sopenharmony_ci// Added 2 bytes for version number
61162306a36Sopenharmony_ci	__u8	Version_Major;		//  Download Version (for Watchport)
61262306a36Sopenharmony_ci	__u8	Version_Minor;
61362306a36Sopenharmony_ci} __attribute__((packed));
61462306a36Sopenharmony_ci
61562306a36Sopenharmony_ci
61662306a36Sopenharmony_ci// Structure of header of download image in fw_down.h
61762306a36Sopenharmony_cistruct ti_i2c_image_header {
61862306a36Sopenharmony_ci	__le16	Length;
61962306a36Sopenharmony_ci	__u8	CheckSum;
62062306a36Sopenharmony_ci} __attribute__((packed));
62162306a36Sopenharmony_ci
62262306a36Sopenharmony_cistruct ti_basic_descriptor {
62362306a36Sopenharmony_ci	__u8	Power;		// Self powered
62462306a36Sopenharmony_ci				// bit 7: 1 - power switching supported
62562306a36Sopenharmony_ci				//        0 - power switching not supported
62662306a36Sopenharmony_ci				//
62762306a36Sopenharmony_ci				// bit 0: 1 - self powered
62862306a36Sopenharmony_ci				//        0 - bus powered
62962306a36Sopenharmony_ci				//
63062306a36Sopenharmony_ci				//
63162306a36Sopenharmony_ci	__u16	HubVid;		// VID HUB
63262306a36Sopenharmony_ci	__u16	HubPid;		// PID HUB
63362306a36Sopenharmony_ci	__u16	DevPid;		// PID Edgeport
63462306a36Sopenharmony_ci	__u8	HubTime;	// Time for power on to power good
63562306a36Sopenharmony_ci	__u8	HubCurrent;	// HUB Current = 100ma
63662306a36Sopenharmony_ci} __attribute__((packed));
63762306a36Sopenharmony_ci
63862306a36Sopenharmony_ci
63962306a36Sopenharmony_ci// CPU / Board Rev Definitions
64062306a36Sopenharmony_ci#define TI_CPU_REV_5052			2	// 5052 based edgeports
64162306a36Sopenharmony_ci#define TI_CPU_REV_3410			3	// 3410 based edgeports
64262306a36Sopenharmony_ci
64362306a36Sopenharmony_ci#define TI_BOARD_REV_TI_EP		0	// Basic ti based edgeport
64462306a36Sopenharmony_ci#define TI_BOARD_REV_COMPACT		1	// Compact board
64562306a36Sopenharmony_ci#define TI_BOARD_REV_WATCHPORT		2	// Watchport
64662306a36Sopenharmony_ci
64762306a36Sopenharmony_ci
64862306a36Sopenharmony_ci#define TI_GET_CPU_REVISION(x)		(__u8)((((x)>>4)&0x0f))
64962306a36Sopenharmony_ci#define TI_GET_BOARD_REVISION(x)	(__u8)(((x)&0x0f))
65062306a36Sopenharmony_ci
65162306a36Sopenharmony_ci#define TI_I2C_SIZE_MASK		0x1f  // 5 bits
65262306a36Sopenharmony_ci#define TI_GET_I2C_SIZE(x)		((((x) & TI_I2C_SIZE_MASK)+1)*256)
65362306a36Sopenharmony_ci
65462306a36Sopenharmony_ci#define TI_MAX_I2C_SIZE			(16 * 1024)
65562306a36Sopenharmony_ci
65662306a36Sopenharmony_ci#define TI_MANUF_VERSION_0		0
65762306a36Sopenharmony_ci
65862306a36Sopenharmony_ci// IonConig2 flags
65962306a36Sopenharmony_ci#define TI_CONFIG2_RS232		0x01
66062306a36Sopenharmony_ci#define TI_CONFIG2_RS422		0x02
66162306a36Sopenharmony_ci#define TI_CONFIG2_RS485		0x04
66262306a36Sopenharmony_ci#define TI_CONFIG2_SWITCHABLE		0x08
66362306a36Sopenharmony_ci
66462306a36Sopenharmony_ci#define TI_CONFIG2_WATCHPORT		0x10
66562306a36Sopenharmony_ci
66662306a36Sopenharmony_ci
66762306a36Sopenharmony_cistruct edge_ti_manuf_descriptor {
66862306a36Sopenharmony_ci	__u8 IonConfig;		//  Config byte for ION manufacturing use
66962306a36Sopenharmony_ci	__u8 IonConfig2;	//  Expansion
67062306a36Sopenharmony_ci	__u8 Version;		//  Version
67162306a36Sopenharmony_ci	__u8 CpuRev_BoardRev;	//  CPU revision level (0xF0) and Board Rev Level (0x0F)
67262306a36Sopenharmony_ci	__u8 NumPorts;		//  Number of ports	for this UMP
67362306a36Sopenharmony_ci	__u8 NumVirtualPorts;	//  Number of Virtual ports
67462306a36Sopenharmony_ci	__u8 HubConfig1;	//  Used to configure the Hub
67562306a36Sopenharmony_ci	__u8 HubConfig2;	//  Used to configure the Hub
67662306a36Sopenharmony_ci	__u8 TotalPorts;	//  Total Number of Com Ports for the entire device (All UMPs)
67762306a36Sopenharmony_ci	__u8 Reserved;		//  Reserved
67862306a36Sopenharmony_ci} __attribute__((packed));
67962306a36Sopenharmony_ci
68062306a36Sopenharmony_ci
68162306a36Sopenharmony_ci#endif		// if !defined(_USBVEND_H)
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