162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * c67x00.h: Cypress C67X00 USB register and field definitions 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2006-2008 Barco N.V. 662306a36Sopenharmony_ci * Derived from the Cypress cy7c67200/300 ezusb linux driver and 762306a36Sopenharmony_ci * based on multiple host controller drivers inside the linux kernel. 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#ifndef _USB_C67X00_H 1162306a36Sopenharmony_ci#define _USB_C67X00_H 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/spinlock.h> 1462306a36Sopenharmony_ci#include <linux/platform_device.h> 1562306a36Sopenharmony_ci#include <linux/completion.h> 1662306a36Sopenharmony_ci#include <linux/mutex.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* --------------------------------------------------------------------- 1962306a36Sopenharmony_ci * Cypress C67x00 register definitions 2062306a36Sopenharmony_ci */ 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci/* Hardware Revision Register */ 2362306a36Sopenharmony_ci#define HW_REV_REG 0xC004 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci/* General USB registers */ 2662306a36Sopenharmony_ci/* ===================== */ 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci/* USB Control Register */ 2962306a36Sopenharmony_ci#define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) 3262306a36Sopenharmony_ci#define HOST_MODE 0x0200 3362306a36Sopenharmony_ci#define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) 3462306a36Sopenharmony_ci#define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci/* USB status register - Notice it has different content in hcd/udc mode */ 3762306a36Sopenharmony_ci#define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090) 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci#define EP0_IRQ_FLG 0x0001 4062306a36Sopenharmony_ci#define EP1_IRQ_FLG 0x0002 4162306a36Sopenharmony_ci#define EP2_IRQ_FLG 0x0004 4262306a36Sopenharmony_ci#define EP3_IRQ_FLG 0x0008 4362306a36Sopenharmony_ci#define EP4_IRQ_FLG 0x0010 4462306a36Sopenharmony_ci#define EP5_IRQ_FLG 0x0020 4562306a36Sopenharmony_ci#define EP6_IRQ_FLG 0x0040 4662306a36Sopenharmony_ci#define EP7_IRQ_FLG 0x0080 4762306a36Sopenharmony_ci#define RESET_IRQ_FLG 0x0100 4862306a36Sopenharmony_ci#define SOF_EOP_IRQ_FLG 0x0200 4962306a36Sopenharmony_ci#define ID_IRQ_FLG 0x4000 5062306a36Sopenharmony_ci#define VBUS_IRQ_FLG 0x8000 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci/* USB Host only registers */ 5362306a36Sopenharmony_ci/* ======================= */ 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* Host n Control Register */ 5662306a36Sopenharmony_ci#define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080) 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci#define PREAMBLE_EN 0x0080 /* Preamble enable */ 5962306a36Sopenharmony_ci#define SEQ_SEL 0x0040 /* Data Toggle Sequence Bit Select */ 6062306a36Sopenharmony_ci#define ISO_EN 0x0010 /* Isochronous enable */ 6162306a36Sopenharmony_ci#define ARM_EN 0x0001 /* Arm operation */ 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci/* Host n Interrupt Enable Register */ 6462306a36Sopenharmony_ci#define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci#define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */ 6762306a36Sopenharmony_ci#define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */ 6862306a36Sopenharmony_ci#define ID_IRQ_EN 0x4000 /* ID interrupt enable */ 6962306a36Sopenharmony_ci#define VBUS_IRQ_EN 0x8000 /* VBUS interrupt enable */ 7062306a36Sopenharmony_ci#define DONE_IRQ_EN 0x0001 /* Done Interrupt Enable */ 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci/* USB status register */ 7362306a36Sopenharmony_ci#define HOST_STAT_MASK 0x02FD 7462306a36Sopenharmony_ci#define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) 7562306a36Sopenharmony_ci#define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci/* Host Frame Register */ 7862306a36Sopenharmony_ci#define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci#define HOST_FRAME_MASK 0x07FF 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci/* USB Peripheral only registers */ 8362306a36Sopenharmony_ci/* ============================= */ 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci/* Device n Port Sel reg */ 8662306a36Sopenharmony_ci#define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084) 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci/* Device n Interrupt Enable Register */ 8962306a36Sopenharmony_ci#define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci#define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \ 9262306a36Sopenharmony_ci ? (0x0280 + (ep << 4)) \ 9362306a36Sopenharmony_ci : (0x0200 + (ep << 4))) 9462306a36Sopenharmony_ci#define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \ 9562306a36Sopenharmony_ci ? (0x0286 + (ep << 4)) \ 9662306a36Sopenharmony_ci : (0x0206 + (ep << 4))) 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_ci#define DEVICE_N_ADDRESS(dev) ((dev) ? (0xC0AE) : (0xC08E)) 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci/* HPI registers */ 10162306a36Sopenharmony_ci/* ============= */ 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci/* HPI Status register */ 10462306a36Sopenharmony_ci#define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10)) 10562306a36Sopenharmony_ci#define SIEMSG_FLG(x) (1 << (4 + (x))) 10662306a36Sopenharmony_ci#define RESET_FLG(x) ((x) ? 0x0200 : 0x0002) 10762306a36Sopenharmony_ci#define DONE_FLG(x) (1 << (2 + (x))) 10862306a36Sopenharmony_ci#define RESUME_FLG(x) (1 << (6 + (x))) 10962306a36Sopenharmony_ci#define MBX_OUT_FLG 0x0001 /* Message out available */ 11062306a36Sopenharmony_ci#define MBX_IN_FLG 0x0100 11162306a36Sopenharmony_ci#define ID_FLG 0x4000 11262306a36Sopenharmony_ci#define VBUS_FLG 0x8000 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ci/* Interrupt routing register */ 11562306a36Sopenharmony_ci#define HPI_IRQ_ROUTING_REG 0x0142 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci#define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001) 11862306a36Sopenharmony_ci#define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002) 11962306a36Sopenharmony_ci#define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004) 12062306a36Sopenharmony_ci#define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040) 12162306a36Sopenharmony_ci#define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800) 12262306a36Sopenharmony_ci#define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400) 12362306a36Sopenharmony_ci#define ID_TO_HPI_ENABLE 0x4000 12462306a36Sopenharmony_ci#define VBUS_TO_HPI_ENABLE 0x8000 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci/* SIE msg registers */ 12762306a36Sopenharmony_ci#define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144) 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_ci#define HUSB_TDListDone 0x1000 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci#define SUSB_EP0_MSG 0x0001 13262306a36Sopenharmony_ci#define SUSB_EP1_MSG 0x0002 13362306a36Sopenharmony_ci#define SUSB_EP2_MSG 0x0004 13462306a36Sopenharmony_ci#define SUSB_EP3_MSG 0x0008 13562306a36Sopenharmony_ci#define SUSB_EP4_MSG 0x0010 13662306a36Sopenharmony_ci#define SUSB_EP5_MSG 0x0020 13762306a36Sopenharmony_ci#define SUSB_EP6_MSG 0x0040 13862306a36Sopenharmony_ci#define SUSB_EP7_MSG 0x0080 13962306a36Sopenharmony_ci#define SUSB_RST_MSG 0x0100 14062306a36Sopenharmony_ci#define SUSB_SOF_MSG 0x0200 14162306a36Sopenharmony_ci#define SUSB_CFG_MSG 0x0400 14262306a36Sopenharmony_ci#define SUSB_SUS_MSG 0x0800 14362306a36Sopenharmony_ci#define SUSB_ID_MSG 0x4000 14462306a36Sopenharmony_ci#define SUSB_VBUS_MSG 0x8000 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci/* BIOS interrupt routines */ 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci#define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81) 14962306a36Sopenharmony_ci#define SUSBx_SEND_INT(x) ((x) ? 96 : 80) 15062306a36Sopenharmony_ci 15162306a36Sopenharmony_ci#define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4) 15262306a36Sopenharmony_ci#define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6) 15362306a36Sopenharmony_ci#define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8) 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci#define CY_HCD_BUF_ADDR 0x500 /* Base address for host */ 15662306a36Sopenharmony_ci#define SIE_TD_SIZE 0x200 /* size of the td list */ 15762306a36Sopenharmony_ci#define SIE_TD_BUF_SIZE 0x400 /* size of the data buffer */ 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci#define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0) 16062306a36Sopenharmony_ci#define SIE_BUF_OFFSET(host) (SIE_TD_OFFSET(host) + SIE_TD_SIZE) 16162306a36Sopenharmony_ci 16262306a36Sopenharmony_ci/* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */ 16362306a36Sopenharmony_ci#define CY_UDC_REQ_HEADER_BASE 0x1100 16462306a36Sopenharmony_ci/* 8- byte request headers for IN/OUT transfers */ 16562306a36Sopenharmony_ci#define CY_UDC_REQ_HEADER_SIZE 8 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci#define CY_UDC_REQ_HEADER_ADDR(ep_num) (CY_UDC_REQ_HEADER_BASE + \ 16862306a36Sopenharmony_ci ((ep_num) * CY_UDC_REQ_HEADER_SIZE)) 16962306a36Sopenharmony_ci#define CY_UDC_DESC_BASE_ADDRESS (CY_UDC_REQ_HEADER_ADDR(8)) 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci#define CY_UDC_BIOS_REPLACE_BASE 0x1800 17262306a36Sopenharmony_ci#define CY_UDC_REQ_BUFFER_BASE 0x2000 17362306a36Sopenharmony_ci#define CY_UDC_REQ_BUFFER_SIZE 0x0400 17462306a36Sopenharmony_ci#define CY_UDC_REQ_BUFFER_ADDR(ep_num) (CY_UDC_REQ_BUFFER_BASE + \ 17562306a36Sopenharmony_ci ((ep_num) * CY_UDC_REQ_BUFFER_SIZE)) 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ci/* --------------------------------------------------------------------- 17862306a36Sopenharmony_ci * Driver data structures 17962306a36Sopenharmony_ci */ 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_cistruct c67x00_device; 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ci/** 18462306a36Sopenharmony_ci * struct c67x00_sie - Common data associated with a SIE 18562306a36Sopenharmony_ci * @lock: lock to protect this struct and the associated chip registers 18662306a36Sopenharmony_ci * @private_data: subdriver dependent data 18762306a36Sopenharmony_ci * @irq: subdriver dependent irq handler, set NULL when not used 18862306a36Sopenharmony_ci * @dev: link to common driver structure 18962306a36Sopenharmony_ci * @sie_num: SIE number on chip, starting from 0 19062306a36Sopenharmony_ci * @mode: SIE mode (host/peripheral/otg/not used) 19162306a36Sopenharmony_ci */ 19262306a36Sopenharmony_cistruct c67x00_sie { 19362306a36Sopenharmony_ci /* Entries to be used by the subdrivers */ 19462306a36Sopenharmony_ci spinlock_t lock; /* protect this structure */ 19562306a36Sopenharmony_ci void *private_data; 19662306a36Sopenharmony_ci void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg); 19762306a36Sopenharmony_ci 19862306a36Sopenharmony_ci /* Read only: */ 19962306a36Sopenharmony_ci struct c67x00_device *dev; 20062306a36Sopenharmony_ci int sie_num; 20162306a36Sopenharmony_ci int mode; 20262306a36Sopenharmony_ci}; 20362306a36Sopenharmony_ci 20462306a36Sopenharmony_ci#define sie_dev(s) (&(s)->dev->pdev->dev) 20562306a36Sopenharmony_ci 20662306a36Sopenharmony_ci/** 20762306a36Sopenharmony_ci * struct c67x00_lcp 20862306a36Sopenharmony_ci */ 20962306a36Sopenharmony_cistruct c67x00_lcp { 21062306a36Sopenharmony_ci /* Internal use only */ 21162306a36Sopenharmony_ci struct mutex mutex; 21262306a36Sopenharmony_ci struct completion msg_received; 21362306a36Sopenharmony_ci u16 last_msg; 21462306a36Sopenharmony_ci}; 21562306a36Sopenharmony_ci 21662306a36Sopenharmony_ci/* 21762306a36Sopenharmony_ci * struct c67x00_hpi 21862306a36Sopenharmony_ci */ 21962306a36Sopenharmony_cistruct c67x00_hpi { 22062306a36Sopenharmony_ci void __iomem *base; 22162306a36Sopenharmony_ci int regstep; 22262306a36Sopenharmony_ci spinlock_t lock; 22362306a36Sopenharmony_ci struct c67x00_lcp lcp; 22462306a36Sopenharmony_ci}; 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci#define C67X00_SIES 2 22762306a36Sopenharmony_ci#define C67X00_PORTS 2 22862306a36Sopenharmony_ci 22962306a36Sopenharmony_ci/** 23062306a36Sopenharmony_ci * struct c67x00_device - Common data associated with a c67x00 instance 23162306a36Sopenharmony_ci * @hpi: hpi addresses 23262306a36Sopenharmony_ci * @sie: array of sie's on this chip 23362306a36Sopenharmony_ci * @pdev: platform device of instance 23462306a36Sopenharmony_ci * @pdata: configuration provided by the platform 23562306a36Sopenharmony_ci */ 23662306a36Sopenharmony_cistruct c67x00_device { 23762306a36Sopenharmony_ci struct c67x00_hpi hpi; 23862306a36Sopenharmony_ci struct c67x00_sie sie[C67X00_SIES]; 23962306a36Sopenharmony_ci struct platform_device *pdev; 24062306a36Sopenharmony_ci struct c67x00_platform_data *pdata; 24162306a36Sopenharmony_ci}; 24262306a36Sopenharmony_ci 24362306a36Sopenharmony_ci/* --------------------------------------------------------------------- 24462306a36Sopenharmony_ci * Low level interface functions 24562306a36Sopenharmony_ci */ 24662306a36Sopenharmony_ci 24762306a36Sopenharmony_ci/* Host Port Interface (HPI) functions */ 24862306a36Sopenharmony_ciu16 c67x00_ll_hpi_status(struct c67x00_device *dev); 24962306a36Sopenharmony_civoid c67x00_ll_hpi_reg_init(struct c67x00_device *dev); 25062306a36Sopenharmony_civoid c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie); 25162306a36Sopenharmony_civoid c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie); 25262306a36Sopenharmony_ci 25362306a36Sopenharmony_ci/* General functions */ 25462306a36Sopenharmony_ciu16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num); 25562306a36Sopenharmony_ciu16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie); 25662306a36Sopenharmony_civoid c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits); 25762306a36Sopenharmony_ciu16 c67x00_ll_usb_get_status(struct c67x00_sie *sie); 25862306a36Sopenharmony_civoid c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr, 25962306a36Sopenharmony_ci void *data, int len); 26062306a36Sopenharmony_civoid c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr, 26162306a36Sopenharmony_ci void *data, int len); 26262306a36Sopenharmony_ci 26362306a36Sopenharmony_ci/* Host specific functions */ 26462306a36Sopenharmony_civoid c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value); 26562306a36Sopenharmony_civoid c67x00_ll_husb_reset(struct c67x00_sie *sie, int port); 26662306a36Sopenharmony_civoid c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr); 26762306a36Sopenharmony_ciu16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie); 26862306a36Sopenharmony_ciu16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie); 26962306a36Sopenharmony_civoid c67x00_ll_husb_init_host_port(struct c67x00_sie *sie); 27062306a36Sopenharmony_civoid c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port); 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_ci/* Called by c67x00_irq to handle lcp interrupts */ 27362306a36Sopenharmony_civoid c67x00_ll_irq(struct c67x00_device *dev, u16 int_status); 27462306a36Sopenharmony_ci 27562306a36Sopenharmony_ci/* Setup and teardown */ 27662306a36Sopenharmony_civoid c67x00_ll_init(struct c67x00_device *dev); 27762306a36Sopenharmony_civoid c67x00_ll_release(struct c67x00_device *dev); 27862306a36Sopenharmony_ciint c67x00_ll_reset(struct c67x00_device *dev); 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_ci#endif /* _USB_C67X00_H */ 281