162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2015, The Linux Foundation. All rights reserved.
462306a36Sopenharmony_ci * Copyright (c) 2018, Linaro Limited
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#include <linux/bitops.h>
862306a36Sopenharmony_ci#include <linux/regmap.h>
962306a36Sopenharmony_ci#include "tsens.h"
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/* ----- SROT ------ */
1262306a36Sopenharmony_ci#define SROT_HW_VER_OFF	0x0000
1362306a36Sopenharmony_ci#define SROT_CTRL_OFF		0x0004
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/* ----- TM ------ */
1662306a36Sopenharmony_ci#define TM_INT_EN_OFF			0x0004
1762306a36Sopenharmony_ci#define TM_UPPER_LOWER_INT_STATUS_OFF	0x0008
1862306a36Sopenharmony_ci#define TM_UPPER_LOWER_INT_CLEAR_OFF	0x000c
1962306a36Sopenharmony_ci#define TM_UPPER_LOWER_INT_MASK_OFF	0x0010
2062306a36Sopenharmony_ci#define TM_CRITICAL_INT_STATUS_OFF	0x0014
2162306a36Sopenharmony_ci#define TM_CRITICAL_INT_CLEAR_OFF	0x0018
2262306a36Sopenharmony_ci#define TM_CRITICAL_INT_MASK_OFF	0x001c
2362306a36Sopenharmony_ci#define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020
2462306a36Sopenharmony_ci#define TM_Sn_CRITICAL_THRESHOLD_OFF	0x0060
2562306a36Sopenharmony_ci#define TM_Sn_STATUS_OFF		0x00a0
2662306a36Sopenharmony_ci#define TM_TRDY_OFF			0x00e4
2762306a36Sopenharmony_ci#define TM_WDOG_LOG_OFF		0x013c
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci/* v2.x: 8996, 8998, sdm845 */
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_cistatic struct tsens_features tsens_v2_feat = {
3262306a36Sopenharmony_ci	.ver_major	= VER_2_X,
3362306a36Sopenharmony_ci	.crit_int	= 1,
3462306a36Sopenharmony_ci	.combo_int	= 0,
3562306a36Sopenharmony_ci	.adc		= 0,
3662306a36Sopenharmony_ci	.srot_split	= 1,
3762306a36Sopenharmony_ci	.max_sensors	= 16,
3862306a36Sopenharmony_ci	.trip_min_temp	= -40000,
3962306a36Sopenharmony_ci	.trip_max_temp	= 120000,
4062306a36Sopenharmony_ci};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_cistatic struct tsens_features ipq8074_feat = {
4362306a36Sopenharmony_ci	.ver_major	= VER_2_X,
4462306a36Sopenharmony_ci	.crit_int	= 1,
4562306a36Sopenharmony_ci	.combo_int	= 1,
4662306a36Sopenharmony_ci	.adc		= 0,
4762306a36Sopenharmony_ci	.srot_split	= 1,
4862306a36Sopenharmony_ci	.max_sensors	= 16,
4962306a36Sopenharmony_ci	.trip_min_temp	= 0,
5062306a36Sopenharmony_ci	.trip_max_temp	= 204000,
5162306a36Sopenharmony_ci};
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_cistatic const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
5462306a36Sopenharmony_ci	/* ----- SROT ------ */
5562306a36Sopenharmony_ci	/* VERSION */
5662306a36Sopenharmony_ci	[VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
5762306a36Sopenharmony_ci	[VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
5862306a36Sopenharmony_ci	[VER_STEP]  = REG_FIELD(SROT_HW_VER_OFF,  0, 15),
5962306a36Sopenharmony_ci	/* CTRL_OFF */
6062306a36Sopenharmony_ci	[TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF,    0,  0),
6162306a36Sopenharmony_ci	[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF,    1,  1),
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	/* ----- TM ------ */
6462306a36Sopenharmony_ci	/* INTERRUPT ENABLE */
6562306a36Sopenharmony_ci	/* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */
6662306a36Sopenharmony_ci	[INT_EN]  = REG_FIELD(TM_INT_EN_OFF, 0, 2),
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	/* TEMPERATURE THRESHOLDS */
6962306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH,  TM_Sn_UPPER_LOWER_THRESHOLD_OFF,  0,  11),
7062306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH,   TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12,  23),
7162306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(CRIT_THRESH, TM_Sn_CRITICAL_THRESHOLD_OFF,     0,  11),
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci	/* INTERRUPTS [CLEAR/STATUS/MASK] */
7462306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
7562306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
7662306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
7762306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
7862306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
7962306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
8062306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_STATUS, TM_CRITICAL_INT_STATUS_OFF),
8162306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR,  TM_CRITICAL_INT_CLEAR_OFF),
8262306a36Sopenharmony_ci	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK,   TM_CRITICAL_INT_MASK_OFF),
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci	/* WATCHDOG on v2.3 or later */
8562306a36Sopenharmony_ci	[WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31),
8662306a36Sopenharmony_ci	[WDOG_BARK_CLEAR]  = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  31, 31),
8762306a36Sopenharmony_ci	[WDOG_BARK_MASK]   = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   31, 31),
8862306a36Sopenharmony_ci	[CC_MON_STATUS]    = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30),
8962306a36Sopenharmony_ci	[CC_MON_CLEAR]     = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  30, 30),
9062306a36Sopenharmony_ci	[CC_MON_MASK]      = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   30, 30),
9162306a36Sopenharmony_ci	[WDOG_BARK_COUNT]  = REG_FIELD(TM_WDOG_LOG_OFF,             0,  7),
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci	/* Sn_STATUS */
9462306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF,  0,  11),
9562306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, 21,  21),
9662306a36Sopenharmony_ci	/* xxx_STATUS bits: 1 == threshold violated */
9762306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, 16,  16),
9862306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, 17,  17),
9962306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS,    TM_Sn_STATUS_OFF, 18,  18),
10062306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19,  19),
10162306a36Sopenharmony_ci	REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS,      TM_Sn_STATUS_OFF, 20,  20),
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci	/* TRDY: 1=ready, 0=in progress */
10462306a36Sopenharmony_ci	[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
10562306a36Sopenharmony_ci};
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_cistatic const struct tsens_ops ops_generic_v2 = {
10862306a36Sopenharmony_ci	.init		= init_common,
10962306a36Sopenharmony_ci	.get_temp	= get_temp_tsens_valid,
11062306a36Sopenharmony_ci};
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_cistruct tsens_plat_data data_tsens_v2 = {
11362306a36Sopenharmony_ci	.ops		= &ops_generic_v2,
11462306a36Sopenharmony_ci	.feat		= &tsens_v2_feat,
11562306a36Sopenharmony_ci	.fields	= tsens_v2_regfields,
11662306a36Sopenharmony_ci};
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_cistruct tsens_plat_data data_ipq8074 = {
11962306a36Sopenharmony_ci	.ops		= &ops_generic_v2,
12062306a36Sopenharmony_ci	.feat		= &ipq8074_feat,
12162306a36Sopenharmony_ci	.fields	= tsens_v2_regfields,
12262306a36Sopenharmony_ci};
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci/* Kept around for backward compatibility with old msm8996.dtsi */
12562306a36Sopenharmony_cistruct tsens_plat_data data_8996 = {
12662306a36Sopenharmony_ci	.num_sensors	= 13,
12762306a36Sopenharmony_ci	.ops		= &ops_generic_v2,
12862306a36Sopenharmony_ci	.feat		= &tsens_v2_feat,
12962306a36Sopenharmony_ci	.fields	= tsens_v2_regfields,
13062306a36Sopenharmony_ci};
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