1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2010 Google, Inc.
4 * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5 *
6 * Author:
7 *	Colin Cross <ccross@android.com>
8 */
9
10#ifndef __DRIVERS_MISC_TEGRA_FUSE_H
11#define __DRIVERS_MISC_TEGRA_FUSE_H
12
13#include <linux/dmaengine.h>
14#include <linux/types.h>
15
16struct nvmem_cell_lookup;
17struct nvmem_device;
18struct tegra_fuse;
19
20struct tegra_fuse_info {
21	u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
22	unsigned int size;
23	unsigned int spare;
24};
25
26struct tegra_fuse_soc {
27	void (*init)(struct tegra_fuse *fuse);
28	void (*speedo_init)(struct tegra_sku_info *info);
29	int (*probe)(struct tegra_fuse *fuse);
30
31	const struct tegra_fuse_info *info;
32
33	const struct nvmem_cell_lookup *lookups;
34	unsigned int num_lookups;
35	const struct nvmem_cell_info *cells;
36	unsigned int num_cells;
37	const struct nvmem_keepout *keepouts;
38	unsigned int num_keepouts;
39
40	const struct attribute_group *soc_attr_group;
41
42	bool clk_suspend_on;
43};
44
45struct tegra_fuse {
46	struct device *dev;
47	void __iomem *base;
48	phys_addr_t phys;
49	struct clk *clk;
50	struct reset_control *rst;
51
52	u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
53	u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
54	const struct tegra_fuse_soc *soc;
55
56	/* APBDMA on Tegra20 */
57	struct {
58		struct mutex lock;
59		struct completion wait;
60		struct dma_chan *chan;
61		struct dma_slave_config config;
62		dma_addr_t phys;
63		u32 *virt;
64	} apbdma;
65
66	struct nvmem_device *nvmem;
67	struct nvmem_cell_lookup *lookups;
68};
69
70void tegra_init_revision(void);
71void tegra_init_apbmisc(void);
72
73u32 __init tegra_fuse_read_spare(unsigned int spare);
74u32 __init tegra_fuse_read_early(unsigned int offset);
75
76u8 tegra_get_major_rev(void);
77u8 tegra_get_minor_rev(void);
78
79extern const struct attribute_group tegra_soc_attr_group;
80
81#ifdef CONFIG_ARCH_TEGRA_2x_SOC
82void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
83#endif
84
85#ifdef CONFIG_ARCH_TEGRA_3x_SOC
86void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
87#endif
88
89#ifdef CONFIG_ARCH_TEGRA_114_SOC
90void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
91#endif
92
93#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
94void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
95#endif
96
97#ifdef CONFIG_ARCH_TEGRA_210_SOC
98void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
99#endif
100
101#ifdef CONFIG_ARCH_TEGRA_2x_SOC
102extern const struct tegra_fuse_soc tegra20_fuse_soc;
103#endif
104
105#ifdef CONFIG_ARCH_TEGRA_3x_SOC
106extern const struct tegra_fuse_soc tegra30_fuse_soc;
107#endif
108
109#ifdef CONFIG_ARCH_TEGRA_114_SOC
110extern const struct tegra_fuse_soc tegra114_fuse_soc;
111#endif
112
113#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
114extern const struct tegra_fuse_soc tegra124_fuse_soc;
115#endif
116
117#ifdef CONFIG_ARCH_TEGRA_210_SOC
118extern const struct tegra_fuse_soc tegra210_fuse_soc;
119#endif
120
121#ifdef CONFIG_ARCH_TEGRA_186_SOC
122extern const struct tegra_fuse_soc tegra186_fuse_soc;
123#endif
124
125#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
126    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
127extern const struct attribute_group tegra194_soc_attr_group;
128#endif
129
130#ifdef CONFIG_ARCH_TEGRA_194_SOC
131extern const struct tegra_fuse_soc tegra194_fuse_soc;
132#endif
133
134#ifdef CONFIG_ARCH_TEGRA_234_SOC
135extern const struct tegra_fuse_soc tegra234_fuse_soc;
136#endif
137
138#endif
139