162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Allwinner SoCs SRAM Controller Driver 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2015 Maxime Ripard 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Author: Maxime Ripard <maxime.ripard@free-electrons.com> 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 962306a36Sopenharmony_ci * License version 2. This program is licensed "as is" without any 1062306a36Sopenharmony_ci * warranty of any kind, whether express or implied. 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/debugfs.h> 1462306a36Sopenharmony_ci#include <linux/io.h> 1562306a36Sopenharmony_ci#include <linux/module.h> 1662306a36Sopenharmony_ci#include <linux/of.h> 1762306a36Sopenharmony_ci#include <linux/of_address.h> 1862306a36Sopenharmony_ci#include <linux/of_platform.h> 1962306a36Sopenharmony_ci#include <linux/platform_device.h> 2062306a36Sopenharmony_ci#include <linux/regmap.h> 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#include <linux/soc/sunxi/sunxi_sram.h> 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_cistruct sunxi_sram_func { 2562306a36Sopenharmony_ci char *func; 2662306a36Sopenharmony_ci u8 val; 2762306a36Sopenharmony_ci u32 reg_val; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_cistruct sunxi_sram_data { 3162306a36Sopenharmony_ci char *name; 3262306a36Sopenharmony_ci u8 reg; 3362306a36Sopenharmony_ci u8 offset; 3462306a36Sopenharmony_ci u8 width; 3562306a36Sopenharmony_ci struct sunxi_sram_func *func; 3662306a36Sopenharmony_ci struct list_head list; 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistruct sunxi_sram_desc { 4062306a36Sopenharmony_ci struct sunxi_sram_data data; 4162306a36Sopenharmony_ci bool claimed; 4262306a36Sopenharmony_ci}; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci#define SUNXI_SRAM_MAP(_reg_val, _val, _func) \ 4562306a36Sopenharmony_ci { \ 4662306a36Sopenharmony_ci .func = _func, \ 4762306a36Sopenharmony_ci .val = _val, \ 4862306a36Sopenharmony_ci .reg_val = _reg_val, \ 4962306a36Sopenharmony_ci } 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci#define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \ 5262306a36Sopenharmony_ci { \ 5362306a36Sopenharmony_ci .name = _name, \ 5462306a36Sopenharmony_ci .reg = _reg, \ 5562306a36Sopenharmony_ci .offset = _off, \ 5662306a36Sopenharmony_ci .width = _width, \ 5762306a36Sopenharmony_ci .func = (struct sunxi_sram_func[]){ \ 5862306a36Sopenharmony_ci __VA_ARGS__, { } }, \ 5962306a36Sopenharmony_ci } 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_cistatic struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = { 6262306a36Sopenharmony_ci .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2, 6362306a36Sopenharmony_ci SUNXI_SRAM_MAP(0, 0, "cpu"), 6462306a36Sopenharmony_ci SUNXI_SRAM_MAP(1, 1, "emac")), 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_cistatic struct sunxi_sram_desc sun4i_a10_sram_c1 = { 6862306a36Sopenharmony_ci .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31, 6962306a36Sopenharmony_ci SUNXI_SRAM_MAP(0, 0, "cpu"), 7062306a36Sopenharmony_ci SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")), 7162306a36Sopenharmony_ci}; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_cistatic struct sunxi_sram_desc sun4i_a10_sram_d = { 7462306a36Sopenharmony_ci .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1, 7562306a36Sopenharmony_ci SUNXI_SRAM_MAP(0, 0, "cpu"), 7662306a36Sopenharmony_ci SUNXI_SRAM_MAP(1, 1, "usb-otg")), 7762306a36Sopenharmony_ci}; 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_cistatic struct sunxi_sram_desc sun50i_a64_sram_c = { 8062306a36Sopenharmony_ci .data = SUNXI_SRAM_DATA("C", 0x4, 24, 1, 8162306a36Sopenharmony_ci SUNXI_SRAM_MAP(1, 0, "cpu"), 8262306a36Sopenharmony_ci SUNXI_SRAM_MAP(0, 1, "de2")), 8362306a36Sopenharmony_ci}; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_cistatic const struct of_device_id sunxi_sram_dt_ids[] = { 8662306a36Sopenharmony_ci { 8762306a36Sopenharmony_ci .compatible = "allwinner,sun4i-a10-sram-a3-a4", 8862306a36Sopenharmony_ci .data = &sun4i_a10_sram_a3_a4.data, 8962306a36Sopenharmony_ci }, 9062306a36Sopenharmony_ci { 9162306a36Sopenharmony_ci .compatible = "allwinner,sun4i-a10-sram-c1", 9262306a36Sopenharmony_ci .data = &sun4i_a10_sram_c1.data, 9362306a36Sopenharmony_ci }, 9462306a36Sopenharmony_ci { 9562306a36Sopenharmony_ci .compatible = "allwinner,sun4i-a10-sram-d", 9662306a36Sopenharmony_ci .data = &sun4i_a10_sram_d.data, 9762306a36Sopenharmony_ci }, 9862306a36Sopenharmony_ci { 9962306a36Sopenharmony_ci .compatible = "allwinner,sun50i-a64-sram-c", 10062306a36Sopenharmony_ci .data = &sun50i_a64_sram_c.data, 10162306a36Sopenharmony_ci }, 10262306a36Sopenharmony_ci {} 10362306a36Sopenharmony_ci}; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_cistatic struct device *sram_dev; 10662306a36Sopenharmony_cistatic LIST_HEAD(claimed_sram); 10762306a36Sopenharmony_cistatic DEFINE_SPINLOCK(sram_lock); 10862306a36Sopenharmony_cistatic void __iomem *base; 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_cistatic int sunxi_sram_show(struct seq_file *s, void *data) 11162306a36Sopenharmony_ci{ 11262306a36Sopenharmony_ci struct device_node *sram_node, *section_node; 11362306a36Sopenharmony_ci const struct sunxi_sram_data *sram_data; 11462306a36Sopenharmony_ci const struct of_device_id *match; 11562306a36Sopenharmony_ci struct sunxi_sram_func *func; 11662306a36Sopenharmony_ci const __be32 *sram_addr_p, *section_addr_p; 11762306a36Sopenharmony_ci u32 val; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci seq_puts(s, "Allwinner sunXi SRAM\n"); 12062306a36Sopenharmony_ci seq_puts(s, "--------------------\n\n"); 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci for_each_child_of_node(sram_dev->of_node, sram_node) { 12362306a36Sopenharmony_ci if (!of_device_is_compatible(sram_node, "mmio-sram")) 12462306a36Sopenharmony_ci continue; 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci sram_addr_p = of_get_address(sram_node, 0, NULL, NULL); 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci seq_printf(s, "sram@%08x\n", 12962306a36Sopenharmony_ci be32_to_cpu(*sram_addr_p)); 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci for_each_child_of_node(sram_node, section_node) { 13262306a36Sopenharmony_ci match = of_match_node(sunxi_sram_dt_ids, section_node); 13362306a36Sopenharmony_ci if (!match) 13462306a36Sopenharmony_ci continue; 13562306a36Sopenharmony_ci sram_data = match->data; 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci section_addr_p = of_get_address(section_node, 0, 13862306a36Sopenharmony_ci NULL, NULL); 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci seq_printf(s, "\tsection@%04x\t(%s)\n", 14162306a36Sopenharmony_ci be32_to_cpu(*section_addr_p), 14262306a36Sopenharmony_ci sram_data->name); 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_ci val = readl(base + sram_data->reg); 14562306a36Sopenharmony_ci val >>= sram_data->offset; 14662306a36Sopenharmony_ci val &= GENMASK(sram_data->width - 1, 0); 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci for (func = sram_data->func; func->func; func++) { 14962306a36Sopenharmony_ci seq_printf(s, "\t\t%s%c\n", func->func, 15062306a36Sopenharmony_ci func->reg_val == val ? 15162306a36Sopenharmony_ci '*' : ' '); 15262306a36Sopenharmony_ci } 15362306a36Sopenharmony_ci } 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci seq_puts(s, "\n"); 15662306a36Sopenharmony_ci } 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_ci return 0; 15962306a36Sopenharmony_ci} 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ciDEFINE_SHOW_ATTRIBUTE(sunxi_sram); 16262306a36Sopenharmony_ci 16362306a36Sopenharmony_cistatic inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data) 16462306a36Sopenharmony_ci{ 16562306a36Sopenharmony_ci return container_of(data, struct sunxi_sram_desc, data); 16662306a36Sopenharmony_ci} 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_cistatic const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node, 16962306a36Sopenharmony_ci unsigned int *reg_value) 17062306a36Sopenharmony_ci{ 17162306a36Sopenharmony_ci const struct of_device_id *match; 17262306a36Sopenharmony_ci const struct sunxi_sram_data *data; 17362306a36Sopenharmony_ci struct sunxi_sram_func *func; 17462306a36Sopenharmony_ci struct of_phandle_args args; 17562306a36Sopenharmony_ci u8 val; 17662306a36Sopenharmony_ci int ret; 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_ci ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0, 17962306a36Sopenharmony_ci &args); 18062306a36Sopenharmony_ci if (ret) 18162306a36Sopenharmony_ci return ERR_PTR(ret); 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ci if (!of_device_is_available(args.np)) { 18462306a36Sopenharmony_ci ret = -EBUSY; 18562306a36Sopenharmony_ci goto err; 18662306a36Sopenharmony_ci } 18762306a36Sopenharmony_ci 18862306a36Sopenharmony_ci val = args.args[0]; 18962306a36Sopenharmony_ci 19062306a36Sopenharmony_ci match = of_match_node(sunxi_sram_dt_ids, args.np); 19162306a36Sopenharmony_ci if (!match) { 19262306a36Sopenharmony_ci ret = -EINVAL; 19362306a36Sopenharmony_ci goto err; 19462306a36Sopenharmony_ci } 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci data = match->data; 19762306a36Sopenharmony_ci if (!data) { 19862306a36Sopenharmony_ci ret = -EINVAL; 19962306a36Sopenharmony_ci goto err; 20062306a36Sopenharmony_ci } 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ci for (func = data->func; func->func; func++) { 20362306a36Sopenharmony_ci if (val == func->val) { 20462306a36Sopenharmony_ci if (reg_value) 20562306a36Sopenharmony_ci *reg_value = func->reg_val; 20662306a36Sopenharmony_ci 20762306a36Sopenharmony_ci break; 20862306a36Sopenharmony_ci } 20962306a36Sopenharmony_ci } 21062306a36Sopenharmony_ci 21162306a36Sopenharmony_ci if (!func->func) { 21262306a36Sopenharmony_ci ret = -EINVAL; 21362306a36Sopenharmony_ci goto err; 21462306a36Sopenharmony_ci } 21562306a36Sopenharmony_ci 21662306a36Sopenharmony_ci of_node_put(args.np); 21762306a36Sopenharmony_ci return match->data; 21862306a36Sopenharmony_ci 21962306a36Sopenharmony_cierr: 22062306a36Sopenharmony_ci of_node_put(args.np); 22162306a36Sopenharmony_ci return ERR_PTR(ret); 22262306a36Sopenharmony_ci} 22362306a36Sopenharmony_ci 22462306a36Sopenharmony_ciint sunxi_sram_claim(struct device *dev) 22562306a36Sopenharmony_ci{ 22662306a36Sopenharmony_ci const struct sunxi_sram_data *sram_data; 22762306a36Sopenharmony_ci struct sunxi_sram_desc *sram_desc; 22862306a36Sopenharmony_ci unsigned int device; 22962306a36Sopenharmony_ci u32 val, mask; 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci if (IS_ERR(base)) 23262306a36Sopenharmony_ci return PTR_ERR(base); 23362306a36Sopenharmony_ci 23462306a36Sopenharmony_ci if (!base) 23562306a36Sopenharmony_ci return -EPROBE_DEFER; 23662306a36Sopenharmony_ci 23762306a36Sopenharmony_ci if (!dev || !dev->of_node) 23862306a36Sopenharmony_ci return -EINVAL; 23962306a36Sopenharmony_ci 24062306a36Sopenharmony_ci sram_data = sunxi_sram_of_parse(dev->of_node, &device); 24162306a36Sopenharmony_ci if (IS_ERR(sram_data)) 24262306a36Sopenharmony_ci return PTR_ERR(sram_data); 24362306a36Sopenharmony_ci 24462306a36Sopenharmony_ci sram_desc = to_sram_desc(sram_data); 24562306a36Sopenharmony_ci 24662306a36Sopenharmony_ci spin_lock(&sram_lock); 24762306a36Sopenharmony_ci 24862306a36Sopenharmony_ci if (sram_desc->claimed) { 24962306a36Sopenharmony_ci spin_unlock(&sram_lock); 25062306a36Sopenharmony_ci return -EBUSY; 25162306a36Sopenharmony_ci } 25262306a36Sopenharmony_ci 25362306a36Sopenharmony_ci mask = GENMASK(sram_data->offset + sram_data->width - 1, 25462306a36Sopenharmony_ci sram_data->offset); 25562306a36Sopenharmony_ci val = readl(base + sram_data->reg); 25662306a36Sopenharmony_ci val &= ~mask; 25762306a36Sopenharmony_ci writel(val | ((device << sram_data->offset) & mask), 25862306a36Sopenharmony_ci base + sram_data->reg); 25962306a36Sopenharmony_ci 26062306a36Sopenharmony_ci sram_desc->claimed = true; 26162306a36Sopenharmony_ci spin_unlock(&sram_lock); 26262306a36Sopenharmony_ci 26362306a36Sopenharmony_ci return 0; 26462306a36Sopenharmony_ci} 26562306a36Sopenharmony_ciEXPORT_SYMBOL(sunxi_sram_claim); 26662306a36Sopenharmony_ci 26762306a36Sopenharmony_civoid sunxi_sram_release(struct device *dev) 26862306a36Sopenharmony_ci{ 26962306a36Sopenharmony_ci const struct sunxi_sram_data *sram_data; 27062306a36Sopenharmony_ci struct sunxi_sram_desc *sram_desc; 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_ci if (!dev || !dev->of_node) 27362306a36Sopenharmony_ci return; 27462306a36Sopenharmony_ci 27562306a36Sopenharmony_ci sram_data = sunxi_sram_of_parse(dev->of_node, NULL); 27662306a36Sopenharmony_ci if (IS_ERR(sram_data)) 27762306a36Sopenharmony_ci return; 27862306a36Sopenharmony_ci 27962306a36Sopenharmony_ci sram_desc = to_sram_desc(sram_data); 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ci spin_lock(&sram_lock); 28262306a36Sopenharmony_ci sram_desc->claimed = false; 28362306a36Sopenharmony_ci spin_unlock(&sram_lock); 28462306a36Sopenharmony_ci} 28562306a36Sopenharmony_ciEXPORT_SYMBOL(sunxi_sram_release); 28662306a36Sopenharmony_ci 28762306a36Sopenharmony_cistruct sunxi_sramc_variant { 28862306a36Sopenharmony_ci int num_emac_clocks; 28962306a36Sopenharmony_ci bool has_ldo_ctrl; 29062306a36Sopenharmony_ci}; 29162306a36Sopenharmony_ci 29262306a36Sopenharmony_cistatic const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { 29362306a36Sopenharmony_ci /* Nothing special */ 29462306a36Sopenharmony_ci}; 29562306a36Sopenharmony_ci 29662306a36Sopenharmony_cistatic const struct sunxi_sramc_variant sun8i_h3_sramc_variant = { 29762306a36Sopenharmony_ci .num_emac_clocks = 1, 29862306a36Sopenharmony_ci}; 29962306a36Sopenharmony_ci 30062306a36Sopenharmony_cistatic const struct sunxi_sramc_variant sun20i_d1_sramc_variant = { 30162306a36Sopenharmony_ci .num_emac_clocks = 1, 30262306a36Sopenharmony_ci .has_ldo_ctrl = true, 30362306a36Sopenharmony_ci}; 30462306a36Sopenharmony_ci 30562306a36Sopenharmony_cistatic const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { 30662306a36Sopenharmony_ci .num_emac_clocks = 1, 30762306a36Sopenharmony_ci}; 30862306a36Sopenharmony_ci 30962306a36Sopenharmony_cistatic const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { 31062306a36Sopenharmony_ci .num_emac_clocks = 2, 31162306a36Sopenharmony_ci}; 31262306a36Sopenharmony_ci 31362306a36Sopenharmony_ci#define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 31462306a36Sopenharmony_ci#define SUNXI_SYS_LDO_CTRL_REG 0x150 31562306a36Sopenharmony_ci 31662306a36Sopenharmony_cistatic bool sunxi_sram_regmap_accessible_reg(struct device *dev, 31762306a36Sopenharmony_ci unsigned int reg) 31862306a36Sopenharmony_ci{ 31962306a36Sopenharmony_ci const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev); 32062306a36Sopenharmony_ci 32162306a36Sopenharmony_ci if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG && 32262306a36Sopenharmony_ci reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) 32362306a36Sopenharmony_ci return true; 32462306a36Sopenharmony_ci if (reg == SUNXI_SYS_LDO_CTRL_REG && variant->has_ldo_ctrl) 32562306a36Sopenharmony_ci return true; 32662306a36Sopenharmony_ci 32762306a36Sopenharmony_ci return false; 32862306a36Sopenharmony_ci} 32962306a36Sopenharmony_ci 33062306a36Sopenharmony_cistatic struct regmap_config sunxi_sram_regmap_config = { 33162306a36Sopenharmony_ci .reg_bits = 32, 33262306a36Sopenharmony_ci .val_bits = 32, 33362306a36Sopenharmony_ci .reg_stride = 4, 33462306a36Sopenharmony_ci /* last defined register */ 33562306a36Sopenharmony_ci .max_register = SUNXI_SYS_LDO_CTRL_REG, 33662306a36Sopenharmony_ci /* other devices have no business accessing other registers */ 33762306a36Sopenharmony_ci .readable_reg = sunxi_sram_regmap_accessible_reg, 33862306a36Sopenharmony_ci .writeable_reg = sunxi_sram_regmap_accessible_reg, 33962306a36Sopenharmony_ci}; 34062306a36Sopenharmony_ci 34162306a36Sopenharmony_cistatic int __init sunxi_sram_probe(struct platform_device *pdev) 34262306a36Sopenharmony_ci{ 34362306a36Sopenharmony_ci const struct sunxi_sramc_variant *variant; 34462306a36Sopenharmony_ci struct device *dev = &pdev->dev; 34562306a36Sopenharmony_ci struct regmap *regmap; 34662306a36Sopenharmony_ci 34762306a36Sopenharmony_ci sram_dev = &pdev->dev; 34862306a36Sopenharmony_ci 34962306a36Sopenharmony_ci variant = of_device_get_match_data(&pdev->dev); 35062306a36Sopenharmony_ci if (!variant) 35162306a36Sopenharmony_ci return -EINVAL; 35262306a36Sopenharmony_ci 35362306a36Sopenharmony_ci dev_set_drvdata(dev, (struct sunxi_sramc_variant *)variant); 35462306a36Sopenharmony_ci 35562306a36Sopenharmony_ci base = devm_platform_ioremap_resource(pdev, 0); 35662306a36Sopenharmony_ci if (IS_ERR(base)) 35762306a36Sopenharmony_ci return PTR_ERR(base); 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_ci if (variant->num_emac_clocks || variant->has_ldo_ctrl) { 36062306a36Sopenharmony_ci regmap = devm_regmap_init_mmio(dev, base, &sunxi_sram_regmap_config); 36162306a36Sopenharmony_ci if (IS_ERR(regmap)) 36262306a36Sopenharmony_ci return PTR_ERR(regmap); 36362306a36Sopenharmony_ci } 36462306a36Sopenharmony_ci 36562306a36Sopenharmony_ci of_platform_populate(dev->of_node, NULL, NULL, dev); 36662306a36Sopenharmony_ci 36762306a36Sopenharmony_ci debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops); 36862306a36Sopenharmony_ci 36962306a36Sopenharmony_ci return 0; 37062306a36Sopenharmony_ci} 37162306a36Sopenharmony_ci 37262306a36Sopenharmony_cistatic const struct of_device_id sunxi_sram_dt_match[] = { 37362306a36Sopenharmony_ci { 37462306a36Sopenharmony_ci .compatible = "allwinner,sun4i-a10-sram-controller", 37562306a36Sopenharmony_ci .data = &sun4i_a10_sramc_variant, 37662306a36Sopenharmony_ci }, 37762306a36Sopenharmony_ci { 37862306a36Sopenharmony_ci .compatible = "allwinner,sun4i-a10-system-control", 37962306a36Sopenharmony_ci .data = &sun4i_a10_sramc_variant, 38062306a36Sopenharmony_ci }, 38162306a36Sopenharmony_ci { 38262306a36Sopenharmony_ci .compatible = "allwinner,sun5i-a13-system-control", 38362306a36Sopenharmony_ci .data = &sun4i_a10_sramc_variant, 38462306a36Sopenharmony_ci }, 38562306a36Sopenharmony_ci { 38662306a36Sopenharmony_ci .compatible = "allwinner,sun8i-a23-system-control", 38762306a36Sopenharmony_ci .data = &sun4i_a10_sramc_variant, 38862306a36Sopenharmony_ci }, 38962306a36Sopenharmony_ci { 39062306a36Sopenharmony_ci .compatible = "allwinner,sun8i-h3-system-control", 39162306a36Sopenharmony_ci .data = &sun8i_h3_sramc_variant, 39262306a36Sopenharmony_ci }, 39362306a36Sopenharmony_ci { 39462306a36Sopenharmony_ci .compatible = "allwinner,sun20i-d1-system-control", 39562306a36Sopenharmony_ci .data = &sun20i_d1_sramc_variant, 39662306a36Sopenharmony_ci }, 39762306a36Sopenharmony_ci { 39862306a36Sopenharmony_ci .compatible = "allwinner,sun50i-a64-sram-controller", 39962306a36Sopenharmony_ci .data = &sun50i_a64_sramc_variant, 40062306a36Sopenharmony_ci }, 40162306a36Sopenharmony_ci { 40262306a36Sopenharmony_ci .compatible = "allwinner,sun50i-a64-system-control", 40362306a36Sopenharmony_ci .data = &sun50i_a64_sramc_variant, 40462306a36Sopenharmony_ci }, 40562306a36Sopenharmony_ci { 40662306a36Sopenharmony_ci .compatible = "allwinner,sun50i-h5-system-control", 40762306a36Sopenharmony_ci .data = &sun50i_a64_sramc_variant, 40862306a36Sopenharmony_ci }, 40962306a36Sopenharmony_ci { 41062306a36Sopenharmony_ci .compatible = "allwinner,sun50i-h616-system-control", 41162306a36Sopenharmony_ci .data = &sun50i_h616_sramc_variant, 41262306a36Sopenharmony_ci }, 41362306a36Sopenharmony_ci { }, 41462306a36Sopenharmony_ci}; 41562306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); 41662306a36Sopenharmony_ci 41762306a36Sopenharmony_cistatic struct platform_driver sunxi_sram_driver = { 41862306a36Sopenharmony_ci .driver = { 41962306a36Sopenharmony_ci .name = "sunxi-sram", 42062306a36Sopenharmony_ci .of_match_table = sunxi_sram_dt_match, 42162306a36Sopenharmony_ci }, 42262306a36Sopenharmony_ci}; 42362306a36Sopenharmony_cibuiltin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe); 42462306a36Sopenharmony_ci 42562306a36Sopenharmony_ciMODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 42662306a36Sopenharmony_ciMODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver"); 427