162306a36Sopenharmony_ci/* Copyright 2008 - 2016 Freescale Semiconductor, Inc. 262306a36Sopenharmony_ci * 362306a36Sopenharmony_ci * Redistribution and use in source and binary forms, with or without 462306a36Sopenharmony_ci * modification, are permitted provided that the following conditions are met: 562306a36Sopenharmony_ci * * Redistributions of source code must retain the above copyright 662306a36Sopenharmony_ci * notice, this list of conditions and the following disclaimer. 762306a36Sopenharmony_ci * * Redistributions in binary form must reproduce the above copyright 862306a36Sopenharmony_ci * notice, this list of conditions and the following disclaimer in the 962306a36Sopenharmony_ci * documentation and/or other materials provided with the distribution. 1062306a36Sopenharmony_ci * * Neither the name of Freescale Semiconductor nor the 1162306a36Sopenharmony_ci * names of its contributors may be used to endorse or promote products 1262306a36Sopenharmony_ci * derived from this software without specific prior written permission. 1362306a36Sopenharmony_ci * 1462306a36Sopenharmony_ci * ALTERNATIVELY, this software may be distributed under the terms of the 1562306a36Sopenharmony_ci * GNU General Public License ("GPL") as published by the Free Software 1662306a36Sopenharmony_ci * Foundation, either version 2 of that License or (at your option) any 1762306a36Sopenharmony_ci * later version. 1862306a36Sopenharmony_ci * 1962306a36Sopenharmony_ci * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 2062306a36Sopenharmony_ci * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 2162306a36Sopenharmony_ci * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 2262306a36Sopenharmony_ci * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 2362306a36Sopenharmony_ci * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 2462306a36Sopenharmony_ci * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 2562306a36Sopenharmony_ci * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 2662306a36Sopenharmony_ci * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2762306a36Sopenharmony_ci * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 2862306a36Sopenharmony_ci * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2962306a36Sopenharmony_ci */ 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#ifndef __DPAA_SYS_H 3262306a36Sopenharmony_ci#define __DPAA_SYS_H 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci#include <linux/cpu.h> 3562306a36Sopenharmony_ci#include <linux/slab.h> 3662306a36Sopenharmony_ci#include <linux/module.h> 3762306a36Sopenharmony_ci#include <linux/interrupt.h> 3862306a36Sopenharmony_ci#include <linux/kthread.h> 3962306a36Sopenharmony_ci#include <linux/sched/signal.h> 4062306a36Sopenharmony_ci#include <linux/vmalloc.h> 4162306a36Sopenharmony_ci#include <linux/platform_device.h> 4262306a36Sopenharmony_ci#include <linux/of.h> 4362306a36Sopenharmony_ci#include <linux/of_reserved_mem.h> 4462306a36Sopenharmony_ci#include <linux/prefetch.h> 4562306a36Sopenharmony_ci#include <linux/genalloc.h> 4662306a36Sopenharmony_ci#include <asm/cacheflush.h> 4762306a36Sopenharmony_ci#include <linux/io.h> 4862306a36Sopenharmony_ci#include <linux/delay.h> 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci/* For 2-element tables related to cache-inhibited and cache-enabled mappings */ 5162306a36Sopenharmony_ci#define DPAA_PORTAL_CE 0 5262306a36Sopenharmony_ci#define DPAA_PORTAL_CI 1 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_cistatic inline void dpaa_flush(void *p) 5562306a36Sopenharmony_ci{ 5662306a36Sopenharmony_ci /* 5762306a36Sopenharmony_ci * Only PPC needs to flush the cache currently - on ARM the mapping 5862306a36Sopenharmony_ci * is non cacheable 5962306a36Sopenharmony_ci */ 6062306a36Sopenharmony_ci#ifdef CONFIG_PPC 6162306a36Sopenharmony_ci flush_dcache_range((unsigned long)p, (unsigned long)p+64); 6262306a36Sopenharmony_ci#endif 6362306a36Sopenharmony_ci} 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci#define dpaa_invalidate(p) dpaa_flush(p) 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci#define dpaa_zero(p) memset(p, 0, 64) 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_cistatic inline void dpaa_touch_ro(void *p) 7062306a36Sopenharmony_ci{ 7162306a36Sopenharmony_ci#if (L1_CACHE_BYTES == 32) 7262306a36Sopenharmony_ci prefetch(p+32); 7362306a36Sopenharmony_ci#endif 7462306a36Sopenharmony_ci prefetch(p); 7562306a36Sopenharmony_ci} 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci/* Commonly used combo */ 7862306a36Sopenharmony_cistatic inline void dpaa_invalidate_touch_ro(void *p) 7962306a36Sopenharmony_ci{ 8062306a36Sopenharmony_ci dpaa_invalidate(p); 8162306a36Sopenharmony_ci dpaa_touch_ro(p); 8262306a36Sopenharmony_ci} 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci#ifdef CONFIG_FSL_DPAA_CHECKING 8662306a36Sopenharmony_ci#define DPAA_ASSERT(x) WARN_ON(!(x)) 8762306a36Sopenharmony_ci#else 8862306a36Sopenharmony_ci#define DPAA_ASSERT(x) 8962306a36Sopenharmony_ci#endif 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci/* cyclic helper for rings */ 9262306a36Sopenharmony_cistatic inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last) 9362306a36Sopenharmony_ci{ 9462306a36Sopenharmony_ci /* 'first' is included, 'last' is excluded */ 9562306a36Sopenharmony_ci if (first <= last) 9662306a36Sopenharmony_ci return last - first; 9762306a36Sopenharmony_ci return ringsize + last - first; 9862306a36Sopenharmony_ci} 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci/* Offset applied to genalloc pools due to zero being an error return */ 10162306a36Sopenharmony_ci#define DPAA_GENALLOC_OFF 0x80000000 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci/* Initialize the devices private memory region */ 10462306a36Sopenharmony_ciint qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr, 10562306a36Sopenharmony_ci size_t *size); 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci/* memremap() attributes for different platforms */ 10862306a36Sopenharmony_ci#ifdef CONFIG_PPC 10962306a36Sopenharmony_ci#define QBMAN_MEMREMAP_ATTR MEMREMAP_WB 11062306a36Sopenharmony_ci#else 11162306a36Sopenharmony_ci#define QBMAN_MEMREMAP_ATTR MEMREMAP_WC 11262306a36Sopenharmony_ci#endif 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_cistatic inline int dpaa_set_portal_irq_affinity(struct device *dev, 11562306a36Sopenharmony_ci int irq, int cpu) 11662306a36Sopenharmony_ci{ 11762306a36Sopenharmony_ci int ret = 0; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci if (!irq_can_set_affinity(irq)) { 12062306a36Sopenharmony_ci dev_err(dev, "unable to set IRQ affinity\n"); 12162306a36Sopenharmony_ci return -EINVAL; 12262306a36Sopenharmony_ci } 12362306a36Sopenharmony_ci 12462306a36Sopenharmony_ci if (cpu == -1 || !cpu_online(cpu)) 12562306a36Sopenharmony_ci cpu = cpumask_any(cpu_online_mask); 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci ret = irq_set_affinity(irq, cpumask_of(cpu)); 12862306a36Sopenharmony_ci if (ret) 12962306a36Sopenharmony_ci dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu); 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci return ret; 13262306a36Sopenharmony_ci} 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci#endif /* __DPAA_SYS_H */ 135