1/******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24#include <scsi/scsi_host.h> 25#include <linux/hashtable.h> 26#include <linux/ktime.h> 27#include <linux/workqueue.h> 28 29#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 30#define CONFIG_SCSI_LPFC_DEBUG_FS 31#endif 32 33struct lpfc_sli2_slim; 34 35#define ELX_MODEL_NAME_SIZE 80 36#define ELX_FW_NAME_SIZE 84 37 38#define LPFC_PCI_DEV_LP 0x1 39#define LPFC_PCI_DEV_OC 0x2 40 41#define LPFC_SLI_REV2 2 42#define LPFC_SLI_REV3 3 43#define LPFC_SLI_REV4 4 44 45#define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 46#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 47 requests */ 48#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 49 the NameServer before giving up. */ 50#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 51#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 52 53#define LPFC_DEFAULT_XPSGL_SIZE 256 54#define LPFC_MAX_SG_TABLESIZE 0xffff 55#define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 56#define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 57#define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 58#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 59#define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 60#define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 61#define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 62#define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 63 64#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 65#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 66#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 67#define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 68#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 69#define LPFC_MIN_TGT_QDEPTH 10 70#define LPFC_MAX_TGT_QDEPTH 0xFFFF 71 72/* 73 * Following time intervals are used of adjusting SCSI device 74 * queue depths when there are driver resource error or Firmware 75 * resource error. 76 */ 77/* 1 Second */ 78#define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 79 80/* Number of exchanges reserved for discovery to complete */ 81#define LPFC_DISC_IOCB_BUFF_COUNT 20 82 83#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 84#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 85 86/* Error Attention event polling interval */ 87#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 88 89/* Define macros for 64 bit support */ 90#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 91#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 92#define getPaddr(high, low) ((dma_addr_t)( \ 93 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 94/* Provide maximum configuration definitions. */ 95#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 96#define FC_MAX_ADPTMSG 64 97 98#define MAX_HBAEVT 32 99#define MAX_HBAS_NO_RESET 16 100 101/* Number of MSI-X vectors the driver uses */ 102#define LPFC_MSIX_VECTORS 2 103 104/* lpfc wait event data ready flag */ 105#define LPFC_DATA_READY 0 /* bit 0 */ 106 107/* queue dump line buffer size */ 108#define LPFC_LBUF_SZ 128 109 110/* mailbox system shutdown options */ 111#define LPFC_MBX_NO_WAIT 0 112#define LPFC_MBX_WAIT 1 113 114#define LPFC_CFG_PARAM_MAGIC_NUM 0xFEAA0005 115#define LPFC_PORT_CFG_NAME "/cfg/port.cfg" 116 117#define lpfc_rangecheck(val, min, max) \ 118 ((uint)(val) >= (uint)(min) && (val) <= (max)) 119 120enum lpfc_polling_flags { 121 ENABLE_FCP_RING_POLLING = 0x1, 122 DISABLE_FCP_RING_INT = 0x2 123}; 124 125struct perf_prof { 126 uint16_t cmd_cpu[40]; 127 uint16_t rsp_cpu[40]; 128 uint16_t qh_cpu[40]; 129 uint16_t wqidx[40]; 130}; 131 132/* 133 * Provide for FC4 TYPE x28 - NVME. The 134 * bit mask for FCP and NVME is 0x8 identically 135 * because they are 32 bit positions distance. 136 */ 137#define LPFC_FC4_TYPE_BITMASK 0x00000100 138 139/* Provide DMA memory definitions the driver uses per port instance. */ 140struct lpfc_dmabuf { 141 struct list_head list; 142 void *virt; /* virtual address ptr */ 143 dma_addr_t phys; /* mapped address */ 144 uint32_t buffer_tag; /* used for tagged queue ring */ 145}; 146 147struct lpfc_nvmet_ctxbuf { 148 struct list_head list; 149 struct lpfc_async_xchg_ctx *context; 150 struct lpfc_iocbq *iocbq; 151 struct lpfc_sglq *sglq; 152 struct work_struct defer_work; 153}; 154 155struct lpfc_dma_pool { 156 struct lpfc_dmabuf *elements; 157 uint32_t max_count; 158 uint32_t current_count; 159}; 160 161struct hbq_dmabuf { 162 struct lpfc_dmabuf hbuf; 163 struct lpfc_dmabuf dbuf; 164 uint16_t total_size; 165 uint16_t bytes_recv; 166 uint32_t tag; 167 struct lpfc_cq_event cq_event; 168 unsigned long time_stamp; 169 void *context; 170}; 171 172struct rqb_dmabuf { 173 struct lpfc_dmabuf hbuf; 174 struct lpfc_dmabuf dbuf; 175 uint16_t total_size; 176 uint16_t bytes_recv; 177 uint16_t idx; 178 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 179 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 180}; 181 182/* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 183#define MEM_PRI 0x100 184 185 186/****************************************************************************/ 187/* Device VPD save area */ 188/****************************************************************************/ 189typedef struct lpfc_vpd { 190 uint32_t status; /* vpd status value */ 191 uint32_t length; /* number of bytes actually returned */ 192 struct { 193 uint32_t rsvd1; /* Revision numbers */ 194 uint32_t biuRev; 195 uint32_t smRev; 196 uint32_t smFwRev; 197 uint32_t endecRev; 198 uint16_t rBit; 199 uint8_t fcphHigh; 200 uint8_t fcphLow; 201 uint8_t feaLevelHigh; 202 uint8_t feaLevelLow; 203 uint32_t postKernRev; 204 uint32_t opFwRev; 205 uint8_t opFwName[16]; 206 uint32_t sli1FwRev; 207 uint8_t sli1FwName[16]; 208 uint32_t sli2FwRev; 209 uint8_t sli2FwName[16]; 210 } rev; 211 struct { 212#ifdef __BIG_ENDIAN_BITFIELD 213 uint32_t rsvd3 :20; /* Reserved */ 214 uint32_t rsvd2 : 3; /* Reserved */ 215 uint32_t cbg : 1; /* Configure BlockGuard */ 216 uint32_t cmv : 1; /* Configure Max VPIs */ 217 uint32_t ccrp : 1; /* Config Command Ring Polling */ 218 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 219 uint32_t chbs : 1; /* Cofigure Host Backing store */ 220 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 221 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 222 uint32_t cmx : 1; /* Configure Max XRIs */ 223 uint32_t cmr : 1; /* Configure Max RPIs */ 224#else /* __LITTLE_ENDIAN */ 225 uint32_t cmr : 1; /* Configure Max RPIs */ 226 uint32_t cmx : 1; /* Configure Max XRIs */ 227 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 228 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 229 uint32_t chbs : 1; /* Cofigure Host Backing store */ 230 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 231 uint32_t ccrp : 1; /* Config Command Ring Polling */ 232 uint32_t cmv : 1; /* Configure Max VPIs */ 233 uint32_t cbg : 1; /* Configure BlockGuard */ 234 uint32_t rsvd2 : 3; /* Reserved */ 235 uint32_t rsvd3 :20; /* Reserved */ 236#endif 237 } sli3Feat; 238} lpfc_vpd_t; 239 240 241/* 242 * lpfc stat counters 243 */ 244struct lpfc_stats { 245 /* Statistics for ELS commands */ 246 uint32_t elsLogiCol; 247 uint32_t elsRetryExceeded; 248 uint32_t elsXmitRetry; 249 uint32_t elsDelayRetry; 250 uint32_t elsRcvDrop; 251 uint32_t elsRcvFrame; 252 uint32_t elsRcvRSCN; 253 uint32_t elsRcvRNID; 254 uint32_t elsRcvFARP; 255 uint32_t elsRcvFARPR; 256 uint32_t elsRcvFLOGI; 257 uint32_t elsRcvPLOGI; 258 uint32_t elsRcvADISC; 259 uint32_t elsRcvPDISC; 260 uint32_t elsRcvFAN; 261 uint32_t elsRcvLOGO; 262 uint32_t elsRcvPRLO; 263 uint32_t elsRcvPRLI; 264 uint32_t elsRcvLIRR; 265 uint32_t elsRcvRLS; 266 uint32_t elsRcvRPL; 267 uint32_t elsRcvRRQ; 268 uint32_t elsRcvRTV; 269 uint32_t elsRcvECHO; 270 uint32_t elsRcvLCB; 271 uint32_t elsRcvRDP; 272 uint32_t elsRcvRDF; 273 uint32_t elsXmitFLOGI; 274 uint32_t elsXmitFDISC; 275 uint32_t elsXmitPLOGI; 276 uint32_t elsXmitPRLI; 277 uint32_t elsXmitADISC; 278 uint32_t elsXmitLOGO; 279 uint32_t elsXmitSCR; 280 uint32_t elsXmitRSCN; 281 uint32_t elsXmitRNID; 282 uint32_t elsXmitFARP; 283 uint32_t elsXmitFARPR; 284 uint32_t elsXmitACC; 285 uint32_t elsXmitLSRJT; 286 287 uint32_t frameRcvBcast; 288 uint32_t frameRcvMulti; 289 uint32_t strayXmitCmpl; 290 uint32_t frameXmitDelay; 291 uint32_t xriCmdCmpl; 292 uint32_t xriStatErr; 293 uint32_t LinkUp; 294 uint32_t LinkDown; 295 uint32_t LinkMultiEvent; 296 uint32_t NoRcvBuf; 297 uint32_t fcpCmd; 298 uint32_t fcpCmpl; 299 uint32_t fcpRspErr; 300 uint32_t fcpRemoteStop; 301 uint32_t fcpPortRjt; 302 uint32_t fcpPortBusy; 303 uint32_t fcpError; 304 uint32_t fcpLocalErr; 305}; 306 307struct lpfc_hba; 308 309 310#define LPFC_VMID_TIMER 300 /* timer interval in seconds */ 311 312#define LPFC_MAX_VMID_SIZE 256 313 314union lpfc_vmid_io_tag { 315 u32 app_id; /* App Id vmid */ 316 u8 cs_ctl_vmid; /* Priority tag vmid */ 317}; 318 319#define JIFFIES_PER_HR (HZ * 60 * 60) 320 321struct lpfc_vmid { 322 u8 flag; 323#define LPFC_VMID_SLOT_FREE 0x0 324#define LPFC_VMID_SLOT_USED 0x1 325#define LPFC_VMID_REQ_REGISTER 0x2 326#define LPFC_VMID_REGISTERED 0x4 327#define LPFC_VMID_DE_REGISTER 0x8 328 char host_vmid[LPFC_MAX_VMID_SIZE]; 329 union lpfc_vmid_io_tag un; 330 struct hlist_node hnode; 331 u64 io_rd_cnt; 332 u64 io_wr_cnt; 333 u8 vmid_len; 334 u8 delete_inactive; /* Delete if inactive flag 0 = no, 1 = yes */ 335 u32 hash_index; 336 u64 __percpu *last_io_time; 337}; 338 339#define lpfc_vmid_is_type_priority_tag(vport)\ 340 (vport->vmid_priority_tagging ? 1 : 0) 341 342#define LPFC_VMID_HASH_SIZE 256 343#define LPFC_VMID_HASH_MASK 255 344#define LPFC_VMID_HASH_SHIFT 6 345 346struct lpfc_vmid_context { 347 struct lpfc_vmid *vmp; 348 struct lpfc_nodelist *nlp; 349 bool instantiated; 350}; 351 352struct lpfc_vmid_priority_range { 353 u8 low; 354 u8 high; 355 u8 qos; 356}; 357 358struct lpfc_vmid_priority_info { 359 u32 num_descriptors; 360 struct lpfc_vmid_priority_range *vmid_range; 361}; 362 363#define QFPA_EVEN_ONLY 0x01 364#define QFPA_ODD_ONLY 0x02 365#define QFPA_EVEN_ODD 0x03 366 367enum discovery_state { 368 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 369 LPFC_VPORT_FAILED = 1, /* vport has failed */ 370 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 371 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 372 LPFC_FDISC = 8, /* FDISC sent for vport */ 373 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 374 * configured */ 375 LPFC_NS_REG = 10, /* Register with NameServer */ 376 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 377 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 378 * device authentication / discovery */ 379 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 380 LPFC_VPORT_READY = 32, 381}; 382 383enum hba_state { 384 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 385 LPFC_WARM_START = 1, /* HBA state after selective reset */ 386 LPFC_INIT_START = 2, /* Initial state after board reset */ 387 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 388 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 389 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 390 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 391 * CLEAR_LA */ 392 LPFC_HBA_READY = 32, 393 LPFC_HBA_ERROR = -1 394}; 395 396struct lpfc_trunk_link_state { 397 enum hba_state state; 398 uint8_t fault; 399}; 400 401struct lpfc_trunk_link { 402 struct lpfc_trunk_link_state link0, 403 link1, 404 link2, 405 link3; 406 u32 phy_lnk_speed; 407}; 408 409/* Format of congestion module parameters */ 410struct lpfc_cgn_param { 411 uint32_t cgn_param_magic; 412 uint8_t cgn_param_version; /* version 1 */ 413 uint8_t cgn_param_mode; /* 0=off 1=managed 2=monitor only */ 414#define LPFC_CFG_OFF 0 415#define LPFC_CFG_MANAGED 1 416#define LPFC_CFG_MONITOR 2 417 uint8_t cgn_rsvd1; 418 uint8_t cgn_rsvd2; 419 uint8_t cgn_param_level0; 420 uint8_t cgn_param_level1; 421 uint8_t cgn_param_level2; 422 uint8_t byte11; 423 uint8_t byte12; 424 uint8_t byte13; 425 uint8_t byte14; 426 uint8_t byte15; 427}; 428 429/* Max number of days of congestion data */ 430#define LPFC_MAX_CGN_DAYS 10 431 432struct lpfc_cgn_ts { 433 uint8_t month; 434 uint8_t day; 435 uint8_t year; 436 uint8_t hour; 437 uint8_t minute; 438 uint8_t second; 439}; 440 441/* Format of congestion buffer info 442 * This structure defines memory thats allocated and registered with 443 * the HBA firmware. When adding or removing fields from this structure 444 * the alignment must match the HBA firmware. 445 */ 446 447struct lpfc_cgn_info { 448 /* Header */ 449 __le16 cgn_info_size; /* is sizeof(struct lpfc_cgn_info) */ 450 uint8_t cgn_info_version; /* represents format of structure */ 451#define LPFC_CGN_INFO_V1 1 452#define LPFC_CGN_INFO_V2 2 453#define LPFC_CGN_INFO_V3 3 454#define LPFC_CGN_INFO_V4 4 455 uint8_t cgn_info_mode; /* 0=off 1=managed 2=monitor only */ 456 uint8_t cgn_info_detect; 457 uint8_t cgn_info_action; 458 uint8_t cgn_info_level0; 459 uint8_t cgn_info_level1; 460 uint8_t cgn_info_level2; 461 462 /* Start Time */ 463 struct lpfc_cgn_ts base_time; 464 465 /* minute / hours / daily indices */ 466 uint8_t cgn_index_minute; 467 uint8_t cgn_index_hour; 468 uint8_t cgn_index_day; 469 470 __le16 cgn_warn_freq; 471 __le16 cgn_alarm_freq; 472 __le16 cgn_lunq; 473 uint8_t cgn_pad1[8]; 474 475 /* Driver Information */ 476 __le16 cgn_drvr_min[60]; 477 __le32 cgn_drvr_hr[24]; 478 __le32 cgn_drvr_day[LPFC_MAX_CGN_DAYS]; 479 480 /* Congestion Warnings */ 481 __le16 cgn_warn_min[60]; 482 __le32 cgn_warn_hr[24]; 483 __le32 cgn_warn_day[LPFC_MAX_CGN_DAYS]; 484 485 /* Latency Information */ 486 __le32 cgn_latency_min[60]; 487 __le32 cgn_latency_hr[24]; 488 __le32 cgn_latency_day[LPFC_MAX_CGN_DAYS]; 489 490 /* Bandwidth Information */ 491 __le16 cgn_bw_min[60]; 492 __le16 cgn_bw_hr[24]; 493 __le16 cgn_bw_day[LPFC_MAX_CGN_DAYS]; 494 495 /* Congestion Alarms */ 496 __le16 cgn_alarm_min[60]; 497 __le32 cgn_alarm_hr[24]; 498 __le32 cgn_alarm_day[LPFC_MAX_CGN_DAYS]; 499 500 struct_group(cgn_stat, 501 uint8_t cgn_stat_npm; /* Notifications per minute */ 502 503 /* Start Time */ 504 struct lpfc_cgn_ts stat_start; /* Base time */ 505 uint8_t cgn_pad2; 506 507 __le32 cgn_notification; 508 __le32 cgn_peer_notification; 509 __le32 link_integ_notification; 510 __le32 delivery_notification; 511 struct lpfc_cgn_ts stat_fpin; /* Last congestion notification FPIN */ 512 struct lpfc_cgn_ts stat_peer; /* Last peer congestion FPIN */ 513 struct lpfc_cgn_ts stat_lnk; /* Last link integrity FPIN */ 514 struct lpfc_cgn_ts stat_delivery; /* Last delivery notification FPIN */ 515 ); 516 517 __le32 cgn_info_crc; 518#define LPFC_CGN_CRC32_MAGIC_NUMBER 0x1EDC6F41 519#define LPFC_CGN_CRC32_SEED 0xFFFFFFFF 520}; 521 522#define LPFC_CGN_INFO_SZ (sizeof(struct lpfc_cgn_info) - \ 523 sizeof(uint32_t)) 524 525struct lpfc_cgn_stat { 526 atomic64_t total_bytes; 527 atomic64_t rcv_bytes; 528 atomic64_t rx_latency; 529#define LPFC_CGN_NOT_SENT 0xFFFFFFFFFFFFFFFFLL 530 atomic_t rx_io_cnt; 531}; 532 533struct lpfc_cgn_acqe_stat { 534 atomic64_t alarm; 535 atomic64_t warn; 536}; 537 538struct lpfc_vport { 539 struct lpfc_hba *phba; 540 struct list_head listentry; 541 uint8_t port_type; 542#define LPFC_PHYSICAL_PORT 1 543#define LPFC_NPIV_PORT 2 544#define LPFC_FABRIC_PORT 3 545 enum discovery_state port_state; 546 547 uint16_t vpi; 548 uint16_t vfi; 549 uint8_t vpi_state; 550#define LPFC_VPI_REGISTERED 0x1 551 552 uint32_t fc_flag; /* FC flags */ 553/* Several of these flags are HBA centric and should be moved to 554 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 555 */ 556#define FC_PT2PT 0x1 /* pt2pt with no fabric */ 557#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 558#define FC_DISC_TMO 0x4 /* Discovery timer running */ 559#define FC_PUBLIC_LOOP 0x8 /* Public loop */ 560#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 561#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 562#define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 563#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 564#define FC_FABRIC 0x100 /* We are fabric attached */ 565#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 566#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 567#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 568#define FC_PT2PT_NO_NVME 0x1000 /* Don't send NVME PRLI */ 569#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 570#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 571#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 572#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 573#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 574#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 575#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 576#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 577#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 578#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 579#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 580 581 uint32_t ct_flags; 582#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 583#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 584#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 585#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 586#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 587#define FC_CT_RPRT_DEFER 0x20 /* Defer issuing FDMI RPRT */ 588 589 struct list_head fc_nodes; 590 591 /* Keep counters for the number of entries in each list. */ 592 uint16_t fc_plogi_cnt; 593 uint16_t fc_adisc_cnt; 594 uint16_t fc_reglogin_cnt; 595 uint16_t fc_prli_cnt; 596 uint16_t fc_unmap_cnt; 597 uint16_t fc_map_cnt; 598 uint16_t fc_npr_cnt; 599 uint16_t fc_unused_cnt; 600 struct serv_parm fc_sparam; /* buffer for our service parameters */ 601 602 uint32_t fc_myDID; /* fibre channel S_ID */ 603 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 604 struct lpfc_name fabric_portname; 605 struct lpfc_name fabric_nodename; 606 607 int32_t stopped; /* HBA has not been restarted since last ERATT */ 608 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 609 610 uint32_t num_disc_nodes; /* in addition to hba_state */ 611 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 612 613 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 614 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 615 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 616 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 617 struct lpfc_name fc_nodename; /* fc nodename */ 618 struct lpfc_name fc_portname; /* fc portname */ 619 620 struct lpfc_work_evt disc_timeout_evt; 621 622 struct timer_list fc_disctmo; /* Discovery rescue timer */ 623 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 624 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 625 626 spinlock_t work_port_lock; 627 uint32_t work_port_events; /* Timeout to be handled */ 628#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 629#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 630#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 631 632#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 633#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 634#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 635#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 636#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 637#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 638#define WORKER_CHECK_INACTIVE_VMID 0x4000 /* hba: check inactive vmids */ 639#define WORKER_CHECK_VMID_ISSUE_QFPA 0x8000 /* vport: Check if qfpa needs 640 * to be issued */ 641 642 struct timer_list els_tmofunc; 643 struct timer_list delayed_disc_tmo; 644 645 uint8_t load_flag; 646#define FC_LOADING 0x1 /* HBA in process of loading drvr */ 647#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 648#define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 649#define FC_ALLOW_VMID 0x8 /* Allow VMID I/Os */ 650#define FC_DEREGISTER_ALL_APP_ID 0x10 /* Deregister all VMIDs */ 651 /* Vport Config Parameters */ 652 uint32_t cfg_scan_down; 653 uint32_t cfg_lun_queue_depth; 654 uint32_t cfg_nodev_tmo; 655 uint32_t cfg_devloss_tmo; 656 uint32_t cfg_restrict_login; 657 uint32_t cfg_peer_port_login; 658 uint32_t cfg_fcp_class; 659 uint32_t cfg_use_adisc; 660 uint32_t cfg_discovery_threads; 661 uint32_t cfg_log_verbose; 662 uint32_t cfg_enable_fc4_type; 663 uint32_t cfg_max_luns; 664 uint32_t cfg_enable_da_id; 665 uint32_t cfg_max_scsicmpl_time; 666 uint32_t cfg_tgt_queue_depth; 667 uint32_t cfg_first_burst_size; 668 uint32_t dev_loss_tmo_changed; 669 /* VMID parameters */ 670 u8 lpfc_vmid_host_uuid[16]; 671 u32 max_vmid; /* maximum VMIDs allowed per port */ 672 u32 cur_vmid_cnt; /* Current VMID count */ 673#define LPFC_MIN_VMID 4 674#define LPFC_MAX_VMID 255 675 u32 vmid_inactivity_timeout; /* Time after which the VMID */ 676 /* deregisters from switch */ 677 u32 vmid_priority_tagging; 678#define LPFC_VMID_PRIO_TAG_DISABLE 0 /* Disable */ 679#define LPFC_VMID_PRIO_TAG_SUP_TARGETS 1 /* Allow supported targets only */ 680#define LPFC_VMID_PRIO_TAG_ALL_TARGETS 2 /* Allow all targets */ 681 unsigned long *vmid_priority_range; 682#define LPFC_VMID_MAX_PRIORITY_RANGE 256 683#define LPFC_VMID_PRIORITY_BITMAP_SIZE 32 684 u8 vmid_flag; 685#define LPFC_VMID_IN_USE 0x1 686#define LPFC_VMID_ISSUE_QFPA 0x2 687#define LPFC_VMID_QFPA_CMPL 0x4 688#define LPFC_VMID_QOS_ENABLED 0x8 689#define LPFC_VMID_TIMER_ENBLD 0x10 690#define LPFC_VMID_TYPE_PRIO 0x20 691 struct fc_qfpa_res *qfpa_res; 692 693 struct fc_vport *fc_vport; 694 695 struct lpfc_vmid *vmid; 696 DECLARE_HASHTABLE(hash_table, 8); 697 rwlock_t vmid_lock; 698 struct lpfc_vmid_priority_info vmid_priority; 699 700#ifdef CONFIG_SCSI_LPFC_DEBUG_FS 701 struct dentry *debug_disc_trc; 702 struct dentry *debug_nodelist; 703 struct dentry *debug_nvmestat; 704 struct dentry *debug_scsistat; 705 struct dentry *debug_ioktime; 706 struct dentry *debug_hdwqstat; 707 struct dentry *vport_debugfs_root; 708 struct lpfc_debugfs_trc *disc_trc; 709 atomic_t disc_trc_cnt; 710#endif 711 struct list_head rcv_buffer_list; 712 unsigned long rcv_buffer_time_stamp; 713 uint32_t vport_flag; 714#define STATIC_VPORT 0x1 715#define FAWWPN_PARAM_CHG 0x2 716 717 uint16_t fdmi_num_disc; 718 uint32_t fdmi_hba_mask; 719 uint32_t fdmi_port_mask; 720 721 /* There is a single nvme instance per vport. */ 722 struct nvme_fc_local_port *localport; 723 uint8_t nvmei_support; /* driver supports NVME Initiator */ 724 uint32_t last_fcp_wqidx; 725 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 726}; 727 728struct hbq_s { 729 uint16_t entry_count; /* Current number of HBQ slots */ 730 uint16_t buffer_count; /* Current number of buffers posted */ 731 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 732 uint32_t hbqPutIdx; /* HBQ slot to use */ 733 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 734 void *hbq_virt; /* Virtual ptr to this hbq */ 735 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 736 /* Callback for HBQ buffer allocation */ 737 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 738 /* Callback for HBQ buffer free */ 739 void (*hbq_free_buffer) (struct lpfc_hba *, 740 struct hbq_dmabuf *); 741}; 742 743/* this matches the position in the lpfc_hbq_defs array */ 744#define LPFC_ELS_HBQ 0 745#define LPFC_MAX_HBQS 1 746 747enum hba_temp_state { 748 HBA_NORMAL_TEMP, 749 HBA_OVER_TEMP 750}; 751 752enum intr_type_t { 753 NONE = 0, 754 INTx, 755 MSI, 756 MSIX, 757}; 758 759#define LPFC_CT_CTX_MAX 64 760struct unsol_rcv_ct_ctx { 761 uint32_t ctxt_id; 762 uint32_t SID; 763 uint32_t valid; 764#define UNSOL_INVALID 0 765#define UNSOL_VALID 1 766 uint16_t oxid; 767 uint16_t rxid; 768}; 769 770#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 771#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 772#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 773#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 774#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 775#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 776#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 777#define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 778#define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 779#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 780 781#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 782 783enum nemb_type { 784 nemb_mse = 1, 785 nemb_hbd 786}; 787 788enum mbox_type { 789 mbox_rd = 1, 790 mbox_wr 791}; 792 793enum dma_type { 794 dma_mbox = 1, 795 dma_ebuf 796}; 797 798enum sta_type { 799 sta_pre_addr = 1, 800 sta_pos_addr 801}; 802 803struct lpfc_mbox_ext_buf_ctx { 804 uint32_t state; 805#define LPFC_BSG_MBOX_IDLE 0 806#define LPFC_BSG_MBOX_HOST 1 807#define LPFC_BSG_MBOX_PORT 2 808#define LPFC_BSG_MBOX_DONE 3 809#define LPFC_BSG_MBOX_ABTS 4 810 enum nemb_type nembType; 811 enum mbox_type mboxType; 812 uint32_t numBuf; 813 uint32_t mbxTag; 814 uint32_t seqNum; 815 struct lpfc_dmabuf *mbx_dmabuf; 816 struct list_head ext_dmabuf_list; 817}; 818 819struct lpfc_epd_pool { 820 /* Expedite pool */ 821 struct list_head list; 822 u32 count; 823 spinlock_t lock; /* lock for expedite pool */ 824}; 825 826enum ras_state { 827 INACTIVE, 828 REG_INPROGRESS, 829 ACTIVE 830}; 831 832struct lpfc_ras_fwlog { 833 uint8_t *fwlog_buff; 834 uint32_t fw_buffcount; /* Buffer size posted to FW */ 835#define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 836#define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 837#define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 838#define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 839 uint32_t fw_loglevel; /* Log level set */ 840 struct lpfc_dmabuf lwpd; 841 struct list_head fwlog_buff_list; 842 843 /* RAS support status on adapter */ 844 bool ras_hwsupport; /* RAS Support available on HW or not */ 845 bool ras_enabled; /* Ras Enabled for the function */ 846#define LPFC_RAS_DISABLE_LOGGING 0x00 847#define LPFC_RAS_ENABLE_LOGGING 0x01 848 enum ras_state state; /* RAS logging running state */ 849}; 850 851#define DBG_LOG_STR_SZ 256 852#define DBG_LOG_SZ 256 853 854struct dbg_log_ent { 855 char log[DBG_LOG_STR_SZ]; 856 u64 t_ns; 857}; 858 859enum lpfc_irq_chann_mode { 860 /* Assign IRQs to all possible cpus that have hardware queues */ 861 NORMAL_MODE, 862 863 /* Assign IRQs only to cpus on the same numa node as HBA */ 864 NUMA_MODE, 865 866 /* Assign IRQs only on non-hyperthreaded CPUs. This is the 867 * same as normal_mode, but assign IRQS only on physical CPUs. 868 */ 869 NHT_MODE, 870}; 871 872enum lpfc_hba_bit_flags { 873 FABRIC_COMANDS_BLOCKED, 874 HBA_PCI_ERR, 875 MBX_TMO_ERR, 876}; 877 878struct lpfc_hba { 879 /* SCSI interface function jump table entries */ 880 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 881 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 882 struct scsi_cmnd *cmnd); 883 int (*lpfc_scsi_prep_dma_buf) 884 (struct lpfc_hba *, struct lpfc_io_buf *); 885 void (*lpfc_scsi_unprep_dma_buf) 886 (struct lpfc_hba *, struct lpfc_io_buf *); 887 void (*lpfc_release_scsi_buf) 888 (struct lpfc_hba *, struct lpfc_io_buf *); 889 void (*lpfc_rampdown_queue_depth) 890 (struct lpfc_hba *); 891 void (*lpfc_scsi_prep_cmnd) 892 (struct lpfc_vport *, struct lpfc_io_buf *, 893 struct lpfc_nodelist *); 894 int (*lpfc_scsi_prep_cmnd_buf) 895 (struct lpfc_vport *vport, 896 struct lpfc_io_buf *lpfc_cmd, 897 uint8_t tmo); 898 int (*lpfc_scsi_prep_task_mgmt_cmd) 899 (struct lpfc_vport *vport, 900 struct lpfc_io_buf *lpfc_cmd, 901 u64 lun, u8 task_mgmt_cmd); 902 903 /* IOCB interface function jump table entries */ 904 int (*__lpfc_sli_issue_iocb) 905 (struct lpfc_hba *, uint32_t, 906 struct lpfc_iocbq *, uint32_t); 907 int (*__lpfc_sli_issue_fcp_io) 908 (struct lpfc_hba *phba, uint32_t ring_number, 909 struct lpfc_iocbq *piocb, uint32_t flag); 910 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 911 struct lpfc_iocbq *); 912 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 913 914 /* MBOX interface function jump table entries */ 915 int (*lpfc_sli_issue_mbox) 916 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 917 918 /* Slow-path IOCB process function jump table entries */ 919 void (*lpfc_sli_handle_slow_ring_event) 920 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 921 uint32_t mask); 922 923 /* INIT device interface function jump table entries */ 924 int (*lpfc_sli_hbq_to_firmware) 925 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 926 int (*lpfc_sli_brdrestart) 927 (struct lpfc_hba *); 928 int (*lpfc_sli_brdready) 929 (struct lpfc_hba *, uint32_t); 930 void (*lpfc_handle_eratt) 931 (struct lpfc_hba *); 932 void (*lpfc_stop_port) 933 (struct lpfc_hba *); 934 int (*lpfc_hba_init_link) 935 (struct lpfc_hba *, uint32_t); 936 int (*lpfc_hba_down_link) 937 (struct lpfc_hba *, uint32_t); 938 int (*lpfc_selective_reset) 939 (struct lpfc_hba *); 940 941 int (*lpfc_bg_scsi_prep_dma_buf) 942 (struct lpfc_hba *, struct lpfc_io_buf *); 943 944 /* Prep SLI WQE/IOCB jump table entries */ 945 void (*__lpfc_sli_prep_els_req_rsp)(struct lpfc_iocbq *cmdiocbq, 946 struct lpfc_vport *vport, 947 struct lpfc_dmabuf *bmp, 948 u16 cmd_size, u32 did, u32 elscmd, 949 u8 tmo, u8 expect_rsp); 950 void (*__lpfc_sli_prep_gen_req)(struct lpfc_iocbq *cmdiocbq, 951 struct lpfc_dmabuf *bmp, u16 rpi, 952 u32 num_entry, u8 tmo); 953 void (*__lpfc_sli_prep_xmit_seq64)(struct lpfc_iocbq *cmdiocbq, 954 struct lpfc_dmabuf *bmp, u16 rpi, 955 u16 ox_id, u32 num_entry, u8 rctl, 956 u8 last_seq, u8 cr_cx_cmd); 957 void (*__lpfc_sli_prep_abort_xri)(struct lpfc_iocbq *cmdiocbq, 958 u16 ulp_context, u16 iotag, 959 u8 ulp_class, u16 cqid, bool ia, 960 bool wqec); 961 962 /* expedite pool */ 963 struct lpfc_epd_pool epd_pool; 964 965 /* SLI4 specific HBA data structure */ 966 struct lpfc_sli4_hba sli4_hba; 967 968 struct workqueue_struct *wq; 969 struct delayed_work eq_delay_work; 970 971#define LPFC_IDLE_STAT_DELAY 1000 972 struct delayed_work idle_stat_delay_work; 973 974 struct lpfc_sli sli; 975 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 976 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 977 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 978#define LPFC_SLI3_HBQ_ENABLED 0x01 979#define LPFC_SLI3_NPIV_ENABLED 0x02 980#define LPFC_SLI3_VPORT_TEARDOWN 0x04 981#define LPFC_SLI3_CRP_ENABLED 0x08 982#define LPFC_SLI3_BG_ENABLED 0x20 983#define LPFC_SLI3_DSS_ENABLED 0x40 984#define LPFC_SLI4_PERFH_ENABLED 0x80 985#define LPFC_SLI4_PHWQ_ENABLED 0x100 986 uint32_t iocb_cmd_size; 987 uint32_t iocb_rsp_size; 988 989 struct lpfc_trunk_link trunk_link; 990 enum hba_state link_state; 991 uint32_t link_flag; /* link state flags */ 992#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 993 /* This flag is set while issuing */ 994 /* INIT_LINK mailbox command */ 995#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 996#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 997#define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 998#define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 999#define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 1000#define LS_EXTERNAL_LOOPBACK 0x40 /* External loopback plug inserted */ 1001 1002 uint32_t hba_flag; /* hba generic flags */ 1003#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 1004#define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 1005#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 1006#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 1007#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 1008#define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */ 1009#define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */ 1010#define ASYNC_EVENT 0x80 1011#define LINK_DISABLED 0x100 /* Link disabled by user */ 1012#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 1013#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 1014#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 1015#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 1016#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 1017#define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 1018#define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 1019#define HBA_FORCED_LINK_SPEED 0x40000 /* 1020 * Firmware supports Forced Link Speed 1021 * capability 1022 */ 1023#define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 1024#define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */ 1025#define HBA_SETUP 0x1000000 /* Signifies HBA setup is completed */ 1026#define HBA_NEEDS_CFG_PORT 0x2000000 /* SLI3 - needs a CONFIG_PORT mbox */ 1027#define HBA_HBEAT_INP 0x4000000 /* mbox HBEAT is in progress */ 1028#define HBA_HBEAT_TMO 0x8000000 /* HBEAT initiated after timeout */ 1029#define HBA_FLOGI_OUTSTANDING 0x10000000 /* FLOGI is outstanding */ 1030#define HBA_RHBA_CMPL 0x20000000 /* RHBA FDMI command is successful */ 1031 1032 struct completion *fw_dump_cmpl; /* cmpl event tracker for fw_dump */ 1033 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 1034 struct lpfc_dmabuf slim2p; 1035 1036 MAILBOX_t *mbox; 1037 uint32_t *mbox_ext; 1038 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 1039 uint32_t ha_copy; 1040 struct _PCB *pcb; 1041 struct _IOCB *IOCBs; 1042 1043 struct lpfc_dmabuf hbqslimp; 1044 1045 uint16_t pci_cfg_value; 1046 1047 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 1048 1049 uint32_t fc_eventTag; /* event tag for link attention */ 1050 uint32_t link_events; 1051 1052 /* These fields used to be binfo */ 1053 uint32_t fc_pref_DID; /* preferred D_ID */ 1054 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 1055 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 1056 uint32_t fc_edtov; /* E_D_TOV timer value */ 1057 uint32_t fc_arbtov; /* ARB_TOV timer value */ 1058 uint32_t fc_ratov; /* R_A_TOV timer value */ 1059 uint32_t fc_rttov; /* R_T_TOV timer value */ 1060 uint32_t fc_altov; /* AL_TOV timer value */ 1061 uint32_t fc_crtov; /* C_R_TOV timer value */ 1062 1063 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 1064 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 1065 1066 uint32_t lmt; 1067 1068 uint32_t fc_topology; /* link topology, from LINK INIT */ 1069 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 1070 1071 struct lpfc_stats fc_stat; 1072 1073 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 1074 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 1075 1076 uint8_t wwnn[8]; 1077 uint8_t wwpn[8]; 1078 uint32_t RandomData[7]; 1079 uint8_t fcp_embed_io; 1080 uint8_t nvmet_support; /* driver supports NVMET */ 1081#define LPFC_NVMET_MAX_PORTS 32 1082 uint8_t mds_diags_support; 1083 uint8_t bbcredit_support; 1084 uint8_t enab_exp_wqcq_pages; 1085 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 1086 1087 /* HBA Config Parameters */ 1088 uint32_t cfg_ack0; 1089 uint32_t cfg_xri_rebalancing; 1090 uint32_t cfg_xpsgl; 1091 uint32_t cfg_enable_npiv; 1092 uint32_t cfg_enable_rrq; 1093 uint32_t cfg_topology; 1094 uint32_t cfg_link_speed; 1095#define LPFC_FCF_FOV 1 /* Fast fcf failover */ 1096#define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 1097 uint32_t cfg_fcf_failover_policy; 1098 uint32_t cfg_fcp_io_sched; 1099 uint32_t cfg_ns_query; 1100 uint32_t cfg_fcp2_no_tgt_reset; 1101 uint32_t cfg_cr_delay; 1102 uint32_t cfg_cr_count; 1103 uint32_t cfg_multi_ring_support; 1104 uint32_t cfg_multi_ring_rctl; 1105 uint32_t cfg_multi_ring_type; 1106 uint32_t cfg_poll; 1107 uint32_t cfg_poll_tmo; 1108 uint32_t cfg_task_mgmt_tmo; 1109 uint32_t cfg_use_msi; 1110 uint32_t cfg_auto_imax; 1111 uint32_t cfg_fcp_imax; 1112 uint32_t cfg_force_rscn; 1113 uint32_t cfg_cq_poll_threshold; 1114 uint32_t cfg_cq_max_proc_limit; 1115 uint32_t cfg_fcp_cpu_map; 1116 uint32_t cfg_fcp_mq_threshold; 1117 uint32_t cfg_hdw_queue; 1118 uint32_t cfg_irq_chann; 1119 uint32_t cfg_suppress_rsp; 1120 uint32_t cfg_nvme_oas; 1121 uint32_t cfg_nvme_embed_cmd; 1122 uint32_t cfg_nvmet_mrq_post; 1123 uint32_t cfg_nvmet_mrq; 1124 uint32_t cfg_enable_nvmet; 1125 uint32_t cfg_nvme_enable_fb; 1126 uint32_t cfg_nvmet_fb_size; 1127 uint32_t cfg_total_seg_cnt; 1128 uint32_t cfg_sg_seg_cnt; 1129 uint32_t cfg_nvme_seg_cnt; 1130 uint32_t cfg_scsi_seg_cnt; 1131 uint32_t cfg_sg_dma_buf_size; 1132 uint32_t cfg_hba_queue_depth; 1133 uint32_t cfg_enable_hba_reset; 1134 uint32_t cfg_enable_hba_heartbeat; 1135 uint32_t cfg_fof; 1136 uint32_t cfg_EnableXLane; 1137 uint8_t cfg_oas_tgt_wwpn[8]; 1138 uint8_t cfg_oas_vpt_wwpn[8]; 1139 uint32_t cfg_oas_lun_state; 1140#define OAS_LUN_ENABLE 1 1141#define OAS_LUN_DISABLE 0 1142 uint32_t cfg_oas_lun_status; 1143#define OAS_LUN_STATUS_EXISTS 0x01 1144 uint32_t cfg_oas_flags; 1145#define OAS_FIND_ANY_VPORT 0x01 1146#define OAS_FIND_ANY_TARGET 0x02 1147#define OAS_LUN_VALID 0x04 1148 uint32_t cfg_oas_priority; 1149 uint32_t cfg_XLanePriority; 1150 uint32_t cfg_enable_bg; 1151 uint32_t cfg_prot_mask; 1152 uint32_t cfg_prot_guard; 1153 uint32_t cfg_hostmem_hgp; 1154 uint32_t cfg_log_verbose; 1155 uint32_t cfg_enable_fc4_type; 1156#define LPFC_ENABLE_FCP 1 1157#define LPFC_ENABLE_NVME 2 1158#define LPFC_ENABLE_BOTH 3 1159#if (IS_ENABLED(CONFIG_NVME_FC)) 1160#define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_BOTH 1161#define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_BOTH 1162#else 1163#define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_FCP 1164#define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_FCP 1165#endif 1166 uint32_t cfg_sriov_nr_virtfn; 1167 uint32_t cfg_request_firmware_upgrade; 1168 uint32_t cfg_suppress_link_up; 1169 uint32_t cfg_rrq_xri_bitmap_sz; 1170 u32 cfg_fcp_wait_abts_rsp; 1171 uint32_t cfg_delay_discovery; 1172 uint32_t cfg_sli_mode; 1173#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 1174#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 1175#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 1176 uint32_t cfg_fdmi_on; 1177#define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 1178#define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 1179 uint32_t cfg_enable_SmartSAN; 1180 uint32_t cfg_enable_mds_diags; 1181 uint32_t cfg_ras_fwlog_level; 1182 uint32_t cfg_ras_fwlog_buffsize; 1183 uint32_t cfg_ras_fwlog_func; 1184 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 1185 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 1186 uint32_t cfg_enable_pbde; 1187 uint32_t cfg_enable_mi; 1188 struct nvmet_fc_target_port *targetport; 1189 lpfc_vpd_t vpd; /* vital product data */ 1190 1191 u32 cfg_max_vmid; /* maximum VMIDs allowed per port */ 1192 u32 cfg_vmid_app_header; 1193#define LPFC_VMID_APP_HEADER_DISABLE 0 1194#define LPFC_VMID_APP_HEADER_ENABLE 1 1195 u32 cfg_vmid_priority_tagging; 1196 u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */ 1197 /* deregisters from switch */ 1198 struct pci_dev *pcidev; 1199 struct list_head work_list; 1200 uint32_t work_ha; /* Host Attention Bits for WT */ 1201 uint32_t work_ha_mask; /* HA Bits owned by WT */ 1202 uint32_t work_hs; /* HS stored in case of ERRAT */ 1203 uint32_t work_status[2]; /* Extra status from SLIM */ 1204 1205 wait_queue_head_t work_waitq; 1206 struct task_struct *worker_thread; 1207 unsigned long data_flags; 1208 uint32_t border_sge_num; 1209 1210 uint32_t hbq_in_use; /* HBQs in use flag */ 1211 uint32_t hbq_count; /* Count of configured HBQs */ 1212 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 1213 1214 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 1215 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 1216 1217 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 1218 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 1219 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 1220 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 1221 PCI BAR0 */ 1222 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 1223 PCI BAR2 */ 1224 1225 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 1226 PCI BAR0 with dual-ULP support */ 1227 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 1228 PCI BAR2 with dual-ULP support */ 1229 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 1230 PCI BAR4 with dual-ULP support */ 1231#define PCI_64BIT_BAR0 0 1232#define PCI_64BIT_BAR2 2 1233#define PCI_64BIT_BAR4 4 1234 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 1235 void __iomem *HAregaddr; /* virtual address for host attn reg */ 1236 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 1237 void __iomem *HSregaddr; /* virtual address for host status 1238 reg */ 1239 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 1240 1241 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 1242 struct lpfc_pgp *port_gp; 1243 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 1244 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 1245 1246 int brd_no; /* FC board number */ 1247 char SerialNumber[32]; /* adapter Serial Number */ 1248 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 1249 char BIOSVersion[16]; /* Boot BIOS version */ 1250 char ModelDesc[256]; /* Model Description */ 1251 char ModelName[80]; /* Model Name */ 1252 char ProgramType[256]; /* Program Type */ 1253 char Port[20]; /* Port No */ 1254 uint8_t vpd_flag; /* VPD data flag */ 1255 1256#define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 1257#define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 1258#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 1259#define VPD_PORT 0x8 /* valid vpd port data */ 1260#define VPD_MASK 0xf /* mask for any vpd data */ 1261 1262 1263 struct timer_list fcp_poll_timer; 1264 struct timer_list eratt_poll; 1265 uint32_t eratt_poll_interval; 1266 1267 uint64_t bg_guard_err_cnt; 1268 uint64_t bg_apptag_err_cnt; 1269 uint64_t bg_reftag_err_cnt; 1270 1271 /* fastpath list. */ 1272 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 1273 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 1274 struct list_head lpfc_scsi_buf_list_get; 1275 struct list_head lpfc_scsi_buf_list_put; 1276 uint32_t total_scsi_bufs; 1277 struct list_head lpfc_iocb_list; 1278 uint32_t total_iocbq_bufs; 1279 struct list_head active_rrq_list; 1280 spinlock_t hbalock; 1281 struct work_struct unblock_request_work; /* SCSI layer unblock IOs */ 1282 1283 /* dma_mem_pools */ 1284 struct dma_pool *lpfc_sg_dma_buf_pool; 1285 struct dma_pool *lpfc_mbuf_pool; 1286 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 1287 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 1288 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 1289 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 1290 struct dma_pool *lpfc_cmd_rsp_buf_pool; 1291 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 1292 1293 mempool_t *mbox_mem_pool; 1294 mempool_t *nlp_mem_pool; 1295 mempool_t *rrq_pool; 1296 mempool_t *active_rrq_pool; 1297 1298 struct fc_host_statistics link_stats; 1299 enum lpfc_irq_chann_mode irq_chann_mode; 1300 enum intr_type_t intr_type; 1301 uint32_t intr_mode; 1302#define LPFC_INTR_ERROR 0xFFFFFFFF 1303 struct list_head port_list; 1304 spinlock_t port_list_lock; /* lock for port_list mutations */ 1305 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1306 uint16_t max_vpi; /* Maximum virtual nports */ 1307#define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1308#define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1309 uint16_t max_vports; /* 1310 * For IOV HBAs max_vpi can change 1311 * after a reset. max_vports is max 1312 * number of vports present. This can 1313 * be greater than max_vpi. 1314 */ 1315 uint16_t vpi_base; 1316 uint16_t vfi_base; 1317 unsigned long *vpi_bmask; /* vpi allocation table */ 1318 uint16_t *vpi_ids; 1319 uint16_t vpi_count; 1320 struct list_head lpfc_vpi_blk_list; 1321 1322 /* Data structure used by fabric iocb scheduler */ 1323 struct list_head fabric_iocb_list; 1324 atomic_t fabric_iocb_count; 1325 struct timer_list fabric_block_timer; 1326 unsigned long bit_flags; 1327 atomic_t num_rsrc_err; 1328 atomic_t num_cmd_success; 1329 unsigned long last_rsrc_error_time; 1330 unsigned long last_ramp_down_time; 1331#ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1332 struct dentry *hba_debugfs_root; 1333 atomic_t debugfs_vport_count; 1334 struct dentry *debug_multixri_pools; 1335 struct dentry *debug_hbqinfo; 1336 struct dentry *debug_dumpHostSlim; 1337 struct dentry *debug_dumpHBASlim; 1338 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1339 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1340 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1341 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1342 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1343 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1344 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1345 struct dentry *debug_readApp; /* inject read app_tag errors */ 1346 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1347 1348 struct dentry *debug_nvmeio_trc; 1349 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1350 struct dentry *debug_hdwqinfo; 1351#ifdef LPFC_HDWQ_LOCK_STAT 1352 struct dentry *debug_lockstat; 1353#endif 1354 struct dentry *debug_cgn_buffer; 1355 struct dentry *debug_rx_monitor; 1356 struct dentry *debug_ras_log; 1357 atomic_t nvmeio_trc_cnt; 1358 uint32_t nvmeio_trc_size; 1359 uint32_t nvmeio_trc_output_idx; 1360 1361 /* T10 DIF error injection */ 1362 uint32_t lpfc_injerr_wgrd_cnt; 1363 uint32_t lpfc_injerr_wapp_cnt; 1364 uint32_t lpfc_injerr_wref_cnt; 1365 uint32_t lpfc_injerr_rgrd_cnt; 1366 uint32_t lpfc_injerr_rapp_cnt; 1367 uint32_t lpfc_injerr_rref_cnt; 1368 uint32_t lpfc_injerr_nportid; 1369 struct lpfc_name lpfc_injerr_wwpn; 1370 sector_t lpfc_injerr_lba; 1371#define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1372 1373 struct dentry *debug_slow_ring_trc; 1374 struct lpfc_debugfs_trc *slow_ring_trc; 1375 atomic_t slow_ring_trc_cnt; 1376 /* iDiag debugfs sub-directory */ 1377 struct dentry *idiag_root; 1378 struct dentry *idiag_pci_cfg; 1379 struct dentry *idiag_bar_acc; 1380 struct dentry *idiag_que_info; 1381 struct dentry *idiag_que_acc; 1382 struct dentry *idiag_drb_acc; 1383 struct dentry *idiag_ctl_acc; 1384 struct dentry *idiag_mbx_acc; 1385 struct dentry *idiag_ext_acc; 1386 uint8_t lpfc_idiag_last_eq; 1387#endif 1388 uint16_t nvmeio_trc_on; 1389 1390 /* Used for deferred freeing of ELS data buffers */ 1391 struct list_head elsbuf; 1392 int elsbuf_cnt; 1393 int elsbuf_prev_cnt; 1394 1395 uint8_t temp_sensor_support; 1396 /* Fields used for heart beat. */ 1397 unsigned long last_completion_time; 1398 unsigned long skipped_hb; 1399 struct timer_list hb_tmofunc; 1400 struct timer_list rrq_tmr; 1401 enum hba_temp_state over_temp_state; 1402 /* 1403 * Following bit will be set for all buffer tags which are not 1404 * associated with any HBQ. 1405 */ 1406#define QUE_BUFTAG_BIT (1<<31) 1407 uint32_t buffer_tag_count; 1408 1409/* Maximum number of events that can be outstanding at any time*/ 1410#define LPFC_MAX_EVT_COUNT 512 1411 atomic_t fast_event_count; 1412 uint32_t fcoe_eventtag; 1413 uint32_t fcoe_eventtag_at_fcf_scan; 1414 uint32_t fcoe_cvl_eventtag; 1415 uint32_t fcoe_cvl_eventtag_attn; 1416 struct lpfc_fcf fcf; 1417 uint8_t fc_map[3]; 1418 uint8_t valid_vlan; 1419 uint16_t vlan_id; 1420 struct list_head fcf_conn_rec_list; 1421 1422 bool defer_flogi_acc_flag; 1423 uint16_t defer_flogi_acc_rx_id; 1424 uint16_t defer_flogi_acc_ox_id; 1425 1426 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1427 struct list_head ct_ev_waiters; 1428 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1429 uint32_t ctx_idx; 1430 struct timer_list inactive_vmid_poll; 1431 1432 /* RAS Support */ 1433 struct lpfc_ras_fwlog ras_fwlog; 1434 1435 uint32_t iocb_cnt; 1436 uint32_t iocb_max; 1437 atomic_t sdev_cnt; 1438 spinlock_t devicelock; /* lock for luns list */ 1439 mempool_t *device_data_mem_pool; 1440 struct list_head luns; 1441#define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1442#define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1443#define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1444#define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1445#define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1446#define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1447#define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1448#define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1449#define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1450#define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1451 uint16_t sfp_alarm; 1452 uint16_t sfp_warning; 1453 1454#ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1455 uint16_t hdwqstat_on; 1456#define LPFC_CHECK_OFF 0 1457#define LPFC_CHECK_NVME_IO 1 1458#define LPFC_CHECK_NVMET_IO 2 1459#define LPFC_CHECK_SCSI_IO 4 1460 uint16_t ktime_on; 1461 uint64_t ktime_data_samples; 1462 uint64_t ktime_status_samples; 1463 uint64_t ktime_last_cmd; 1464 uint64_t ktime_seg1_total; 1465 uint64_t ktime_seg1_min; 1466 uint64_t ktime_seg1_max; 1467 uint64_t ktime_seg2_total; 1468 uint64_t ktime_seg2_min; 1469 uint64_t ktime_seg2_max; 1470 uint64_t ktime_seg3_total; 1471 uint64_t ktime_seg3_min; 1472 uint64_t ktime_seg3_max; 1473 uint64_t ktime_seg4_total; 1474 uint64_t ktime_seg4_min; 1475 uint64_t ktime_seg4_max; 1476 uint64_t ktime_seg5_total; 1477 uint64_t ktime_seg5_min; 1478 uint64_t ktime_seg5_max; 1479 uint64_t ktime_seg6_total; 1480 uint64_t ktime_seg6_min; 1481 uint64_t ktime_seg6_max; 1482 uint64_t ktime_seg7_total; 1483 uint64_t ktime_seg7_min; 1484 uint64_t ktime_seg7_max; 1485 uint64_t ktime_seg8_total; 1486 uint64_t ktime_seg8_min; 1487 uint64_t ktime_seg8_max; 1488 uint64_t ktime_seg9_total; 1489 uint64_t ktime_seg9_min; 1490 uint64_t ktime_seg9_max; 1491 uint64_t ktime_seg10_total; 1492 uint64_t ktime_seg10_min; 1493 uint64_t ktime_seg10_max; 1494#endif 1495 /* CMF objects */ 1496 struct lpfc_cgn_stat __percpu *cmf_stat; 1497 uint32_t cmf_interval_rate; /* timer interval limit in ms */ 1498 uint32_t cmf_timer_cnt; 1499#define LPFC_CMF_INTERVAL 90 1500 uint64_t cmf_link_byte_count; 1501 uint64_t cmf_max_line_rate; 1502 uint64_t cmf_max_bytes_per_interval; 1503 uint64_t cmf_last_sync_bw; 1504#define LPFC_CMF_BLK_SIZE 512 1505 struct hrtimer cmf_timer; 1506 struct hrtimer cmf_stats_timer; /* 1 minute stats timer */ 1507 atomic_t cmf_bw_wait; 1508 atomic_t cmf_busy; 1509 atomic_t cmf_stop_io; /* To block request and stop IO's */ 1510 uint32_t cmf_active_mode; 1511 uint32_t cmf_info_per_interval; 1512#define LPFC_MAX_CMF_INFO 32 1513 struct timespec64 cmf_latency; /* Interval congestion timestamp */ 1514 uint32_t cmf_last_ts; /* Interval congestion time (ms) */ 1515 uint32_t cmf_active_info; 1516 1517 /* Signal / FPIN handling for Congestion Mgmt */ 1518 u8 cgn_reg_fpin; /* Negotiated value from RDF */ 1519 u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */ 1520#define LPFC_CGN_FPIN_NONE 0x0 1521#define LPFC_CGN_FPIN_WARN 0x1 1522#define LPFC_CGN_FPIN_ALARM 0x2 1523#define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM) 1524 1525 u8 cgn_reg_signal; /* Negotiated value from EDC */ 1526 u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */ 1527 /* cgn_reg_signal and cgn_init_reg_signal use 1528 * enum fc_edc_cg_signal_cap_types 1529 */ 1530 u16 cgn_fpin_frequency; /* In units of msecs */ 1531#define LPFC_FPIN_INIT_FREQ 0xffff 1532 u32 cgn_sig_freq; 1533 u32 cgn_acqe_cnt; 1534 1535 /* RX monitor handling for CMF */ 1536 struct lpfc_rx_info_monitor *rx_monitor; 1537 atomic_t rx_max_read_cnt; /* Maximum read bytes */ 1538 uint64_t rx_block_cnt; 1539 1540 /* Congestion parameters from flash */ 1541 struct lpfc_cgn_param cgn_p; 1542 1543 /* Statistics counter for ACQE cgn alarms and warnings */ 1544 struct lpfc_cgn_acqe_stat cgn_acqe_stat; 1545 1546 /* Congestion buffer information */ 1547 struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */ 1548 atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */ 1549 atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */ 1550 atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */ 1551 atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */ 1552 atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */ 1553 atomic_t cgn_latency_evt_cnt; 1554 atomic64_t cgn_latency_evt; /* Avg latency per minute */ 1555 unsigned long cgn_evt_timestamp; 1556#define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */ 1557 uint32_t cgn_evt_minute; 1558#define LPFC_SEC_MIN 60UL 1559#define LPFC_MIN_HOUR 60 1560#define LPFC_HOUR_DAY 24 1561#define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY) 1562 1563 struct hlist_node cpuhp; /* used for cpuhp per hba callback */ 1564 struct timer_list cpuhp_poll_timer; 1565 struct list_head poll_list; /* slowpath eq polling list */ 1566#define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1567 1568 char os_host_name[MAXHOSTNAMELEN]; 1569 1570 /* LD Signaling */ 1571 u32 degrade_activate_threshold; 1572 u32 degrade_deactivate_threshold; 1573 u32 fec_degrade_interval; 1574 1575 atomic_t dbg_log_idx; 1576 atomic_t dbg_log_cnt; 1577 atomic_t dbg_log_dmping; 1578 struct dbg_log_ent dbg_log[DBG_LOG_SZ]; 1579}; 1580 1581#define LPFC_MAX_RXMONITOR_ENTRY 800 1582#define LPFC_MAX_RXMONITOR_DUMP 32 1583struct rx_info_entry { 1584 uint64_t cmf_bytes; /* Total no of read bytes for CMF_SYNC_WQE */ 1585 uint64_t total_bytes; /* Total no of read bytes requested */ 1586 uint64_t rcv_bytes; /* Total no of read bytes completed */ 1587 uint64_t avg_io_size; 1588 uint64_t avg_io_latency;/* Average io latency in microseconds */ 1589 uint64_t max_read_cnt; /* Maximum read bytes */ 1590 uint64_t max_bytes_per_interval; 1591 uint32_t cmf_busy; 1592 uint32_t cmf_info; /* CMF_SYNC_WQE info */ 1593 uint32_t io_cnt; 1594 uint32_t timer_utilization; 1595 uint32_t timer_interval; 1596}; 1597 1598struct lpfc_rx_info_monitor { 1599 struct rx_info_entry *ring; /* info organized in a circular buffer */ 1600 u32 head_idx, tail_idx; /* index to head/tail of ring */ 1601 spinlock_t lock; /* spinlock for ring */ 1602 u32 entries; /* storing number entries/size of ring */ 1603}; 1604 1605static inline struct Scsi_Host * 1606lpfc_shost_from_vport(struct lpfc_vport *vport) 1607{ 1608 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1609} 1610 1611static inline void 1612lpfc_set_loopback_flag(struct lpfc_hba *phba) 1613{ 1614 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1615 phba->link_flag |= LS_LOOPBACK_MODE; 1616 else 1617 phba->link_flag &= ~LS_LOOPBACK_MODE; 1618} 1619 1620static inline int 1621lpfc_is_link_up(struct lpfc_hba *phba) 1622{ 1623 return phba->link_state == LPFC_LINK_UP || 1624 phba->link_state == LPFC_CLEAR_LA || 1625 phba->link_state == LPFC_HBA_READY; 1626} 1627 1628static inline void 1629lpfc_worker_wake_up(struct lpfc_hba *phba) 1630{ 1631 /* Set the lpfc data pending flag */ 1632 set_bit(LPFC_DATA_READY, &phba->data_flags); 1633 1634 /* Wake up worker thread */ 1635 wake_up(&phba->work_waitq); 1636 return; 1637} 1638 1639static inline int 1640lpfc_readl(void __iomem *addr, uint32_t *data) 1641{ 1642 uint32_t temp; 1643 temp = readl(addr); 1644 if (temp == 0xffffffff) 1645 return -EIO; 1646 *data = temp; 1647 return 0; 1648} 1649 1650static inline int 1651lpfc_sli_read_hs(struct lpfc_hba *phba) 1652{ 1653 /* 1654 * There was a link/board error. Read the status register to retrieve 1655 * the error event and process it. 1656 */ 1657 phba->sli.slistat.err_attn_event++; 1658 1659 /* Save status info and check for unplug error */ 1660 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1661 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1662 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1663 return -EIO; 1664 } 1665 1666 /* Clear chip Host Attention error bit */ 1667 writel(HA_ERATT, phba->HAregaddr); 1668 readl(phba->HAregaddr); /* flush */ 1669 phba->pport->stopped = 1; 1670 1671 return 0; 1672} 1673 1674static inline struct lpfc_sli_ring * 1675lpfc_phba_elsring(struct lpfc_hba *phba) 1676{ 1677 /* Return NULL if sli_rev has become invalid due to bad fw */ 1678 if (phba->sli_rev != LPFC_SLI_REV4 && 1679 phba->sli_rev != LPFC_SLI_REV3 && 1680 phba->sli_rev != LPFC_SLI_REV2) 1681 return NULL; 1682 1683 if (phba->sli_rev == LPFC_SLI_REV4) { 1684 if (phba->sli4_hba.els_wq) 1685 return phba->sli4_hba.els_wq->pring; 1686 else 1687 return NULL; 1688 } 1689 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1690} 1691 1692/** 1693 * lpfc_next_online_cpu - Finds next online CPU on cpumask 1694 * @mask: Pointer to phba's cpumask member. 1695 * @start: starting cpu index 1696 * 1697 * Note: If no valid cpu found, then nr_cpu_ids is returned. 1698 * 1699 **/ 1700static inline unsigned int 1701lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start) 1702{ 1703 unsigned int cpu_it; 1704 1705 for_each_cpu_wrap(cpu_it, mask, start) { 1706 if (cpu_online(cpu_it)) 1707 break; 1708 } 1709 1710 return cpu_it; 1711} 1712/** 1713 * lpfc_next_present_cpu - Finds next present CPU after n 1714 * @n: the cpu prior to search 1715 * 1716 * Note: If no next present cpu, then fallback to first present cpu. 1717 * 1718 **/ 1719static inline unsigned int lpfc_next_present_cpu(int n) 1720{ 1721 unsigned int cpu; 1722 1723 cpu = cpumask_next(n, cpu_present_mask); 1724 1725 if (cpu >= nr_cpu_ids) 1726 cpu = cpumask_first(cpu_present_mask); 1727 1728 return cpu; 1729} 1730 1731/** 1732 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1733 * @phba: Pointer to HBA context object. 1734 * @q: The Event Queue to update. 1735 * @delay: The delay value (in us) to be written. 1736 * 1737 **/ 1738static inline void 1739lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1740 u32 delay) 1741{ 1742 struct lpfc_register reg_data; 1743 1744 reg_data.word0 = 0; 1745 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1746 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1747 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1748 eq->q_mode = delay; 1749} 1750 1751 1752/* 1753 * Macro that declares tables and a routine to perform enum type to 1754 * ascii string lookup. 1755 * 1756 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for 1757 * the enum to populate the table. Macro defines a routine (named 1758 * by caller) that will search all elements of the table for the key 1759 * and return the name string if found or "Unrecognized" if not found. 1760 */ 1761#define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ 1762static struct { \ 1763 enum enum_name value; \ 1764 char *name; \ 1765} fc_##enum_name##_e2str_names[] = enum_init; \ 1766static const char *routine(enum enum_name table_key) \ 1767{ \ 1768 int i; \ 1769 char *name = "Unrecognized"; \ 1770 \ 1771 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ 1772 if (fc_##enum_name##_e2str_names[i].value == table_key) {\ 1773 name = fc_##enum_name##_e2str_names[i].name; \ 1774 break; \ 1775 } \ 1776 } \ 1777 return name; \ 1778} 1779 1780/** 1781 * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types 1782 * @phba: Pointer to HBA context object. 1783 * 1784 * Relationship between the enable, target support and if vmid tag is required 1785 * for the particular combination 1786 * --------------------------------------------------- 1787 * Switch Enable Flag Target Support VMID Needed 1788 * --------------------------------------------------- 1789 * App Id 0 NA N 1790 * App Id 1 0 N 1791 * App Id 1 1 Y 1792 * Pr Tag 0 NA N 1793 * Pr Tag 1 0 N 1794 * Pr Tag 1 1 Y 1795 * Pr Tag 2 * Y 1796 --------------------------------------------------- 1797 * 1798 **/ 1799static inline int lpfc_is_vmid_enabled(struct lpfc_hba *phba) 1800{ 1801 return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging; 1802} 1803 1804static inline 1805u8 get_job_ulpstatus(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1806{ 1807 if (phba->sli_rev == LPFC_SLI_REV4) 1808 return bf_get(lpfc_wcqe_c_status, &iocbq->wcqe_cmpl); 1809 else 1810 return iocbq->iocb.ulpStatus; 1811} 1812 1813static inline 1814u32 get_job_word4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1815{ 1816 if (phba->sli_rev == LPFC_SLI_REV4) 1817 return iocbq->wcqe_cmpl.parameter; 1818 else 1819 return iocbq->iocb.un.ulpWord[4]; 1820} 1821 1822static inline 1823u8 get_job_cmnd(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1824{ 1825 if (phba->sli_rev == LPFC_SLI_REV4) 1826 return bf_get(wqe_cmnd, &iocbq->wqe.generic.wqe_com); 1827 else 1828 return iocbq->iocb.ulpCommand; 1829} 1830 1831static inline 1832u16 get_job_ulpcontext(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1833{ 1834 if (phba->sli_rev == LPFC_SLI_REV4) 1835 return bf_get(wqe_ctxt_tag, &iocbq->wqe.generic.wqe_com); 1836 else 1837 return iocbq->iocb.ulpContext; 1838} 1839 1840static inline 1841u16 get_job_rcvoxid(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1842{ 1843 if (phba->sli_rev == LPFC_SLI_REV4) 1844 return bf_get(wqe_rcvoxid, &iocbq->wqe.generic.wqe_com); 1845 else 1846 return iocbq->iocb.unsli3.rcvsli3.ox_id; 1847} 1848 1849static inline 1850u32 get_job_data_placed(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1851{ 1852 if (phba->sli_rev == LPFC_SLI_REV4) 1853 return iocbq->wcqe_cmpl.total_data_placed; 1854 else 1855 return iocbq->iocb.un.genreq64.bdl.bdeSize; 1856} 1857 1858static inline 1859u32 get_job_abtsiotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1860{ 1861 if (phba->sli_rev == LPFC_SLI_REV4) 1862 return iocbq->wqe.abort_cmd.wqe_com.abort_tag; 1863 else 1864 return iocbq->iocb.un.acxri.abortIoTag; 1865} 1866 1867static inline 1868u32 get_job_els_rsp64_did(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1869{ 1870 if (phba->sli_rev == LPFC_SLI_REV4) 1871 return bf_get(wqe_els_did, &iocbq->wqe.els_req.wqe_dest); 1872 else 1873 return iocbq->iocb.un.elsreq64.remoteID; 1874} 1875