162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> 462306a36Sopenharmony_ci * http://www.simtec.co.uk/products/SWLINUX/ 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * S3C2410 Internal RTC register definition 762306a36Sopenharmony_ci*/ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef __ASM_ARCH_REGS_RTC_H 1062306a36Sopenharmony_ci#define __ASM_ARCH_REGS_RTC_H __FILE__ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#define S3C2410_RTCREG(x) (x) 1362306a36Sopenharmony_ci#define S3C2410_INTP S3C2410_RTCREG(0x30) 1462306a36Sopenharmony_ci#define S3C2410_INTP_ALM (1 << 1) 1562306a36Sopenharmony_ci#define S3C2410_INTP_TIC (1 << 0) 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#define S3C2410_RTCCON S3C2410_RTCREG(0x40) 1862306a36Sopenharmony_ci#define S3C2410_RTCCON_RTCEN (1 << 0) 1962306a36Sopenharmony_ci#define S3C2410_RTCCON_CNTSEL (1 << 2) 2062306a36Sopenharmony_ci#define S3C2410_RTCCON_CLKRST (1 << 3) 2162306a36Sopenharmony_ci#define S3C2443_RTCCON_TICSEL (1 << 4) 2262306a36Sopenharmony_ci#define S3C64XX_RTCCON_TICEN (1 << 8) 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci#define S3C2410_TICNT S3C2410_RTCREG(0x44) 2562306a36Sopenharmony_ci#define S3C2410_TICNT_ENABLE (1 << 7) 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci/* S3C2443: tick count is 15 bit wide 2862306a36Sopenharmony_ci * TICNT[6:0] contains upper 7 bits 2962306a36Sopenharmony_ci * TICNT1[7:0] contains lower 8 bits 3062306a36Sopenharmony_ci */ 3162306a36Sopenharmony_ci#define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8) 3262306a36Sopenharmony_ci#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C) 3362306a36Sopenharmony_ci#define S3C2443_TICNT1_PART(x) (x & 0xff) 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci/* S3C2416: tick count is 32 bit wide 3662306a36Sopenharmony_ci * TICNT[6:0] contains bits [14:8] 3762306a36Sopenharmony_ci * TICNT1[7:0] contains lower 8 bits 3862306a36Sopenharmony_ci * TICNT2[16:0] contains upper 17 bits 3962306a36Sopenharmony_ci */ 4062306a36Sopenharmony_ci#define S3C2416_TICNT2 S3C2410_RTCREG(0x48) 4162306a36Sopenharmony_ci#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15) 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#define S3C2410_RTCALM S3C2410_RTCREG(0x50) 4462306a36Sopenharmony_ci#define S3C2410_RTCALM_ALMEN (1 << 6) 4562306a36Sopenharmony_ci#define S3C2410_RTCALM_YEAREN (1 << 5) 4662306a36Sopenharmony_ci#define S3C2410_RTCALM_MONEN (1 << 4) 4762306a36Sopenharmony_ci#define S3C2410_RTCALM_DAYEN (1 << 3) 4862306a36Sopenharmony_ci#define S3C2410_RTCALM_HOUREN (1 << 2) 4962306a36Sopenharmony_ci#define S3C2410_RTCALM_MINEN (1 << 1) 5062306a36Sopenharmony_ci#define S3C2410_RTCALM_SECEN (1 << 0) 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci#define S3C2410_ALMSEC S3C2410_RTCREG(0x54) 5362306a36Sopenharmony_ci#define S3C2410_ALMMIN S3C2410_RTCREG(0x58) 5462306a36Sopenharmony_ci#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci#define S3C2410_ALMDATE S3C2410_RTCREG(0x60) 5762306a36Sopenharmony_ci#define S3C2410_ALMMON S3C2410_RTCREG(0x64) 5862306a36Sopenharmony_ci#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci#define S3C2410_RTCSEC S3C2410_RTCREG(0x70) 6162306a36Sopenharmony_ci#define S3C2410_RTCMIN S3C2410_RTCREG(0x74) 6262306a36Sopenharmony_ci#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) 6362306a36Sopenharmony_ci#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) 6462306a36Sopenharmony_ci#define S3C2410_RTCMON S3C2410_RTCREG(0x84) 6562306a36Sopenharmony_ci#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci#endif /* __ASM_ARCH_REGS_RTC_H */ 68