162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Copyright (C) 2017 Synopsys. 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Synopsys HSDK Development platform reset driver. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 762306a36Sopenharmony_ci * License version 2. This program is licensed "as is" without any 862306a36Sopenharmony_ci * warranty of any kind, whether express or implied. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/delay.h> 1262306a36Sopenharmony_ci#include <linux/io.h> 1362306a36Sopenharmony_ci#include <linux/iopoll.h> 1462306a36Sopenharmony_ci#include <linux/module.h> 1562306a36Sopenharmony_ci#include <linux/of.h> 1662306a36Sopenharmony_ci#include <linux/platform_device.h> 1762306a36Sopenharmony_ci#include <linux/reset-controller.h> 1862306a36Sopenharmony_ci#include <linux/slab.h> 1962306a36Sopenharmony_ci#include <linux/types.h> 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci#define to_hsdk_rst(p) container_of((p), struct hsdk_rst, rcdev) 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_cistruct hsdk_rst { 2462306a36Sopenharmony_ci void __iomem *regs_ctl; 2562306a36Sopenharmony_ci void __iomem *regs_rst; 2662306a36Sopenharmony_ci spinlock_t lock; 2762306a36Sopenharmony_ci struct reset_controller_dev rcdev; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_cistatic const u32 rst_map[] = { 3162306a36Sopenharmony_ci BIT(16), /* APB_RST */ 3262306a36Sopenharmony_ci BIT(17), /* AXI_RST */ 3362306a36Sopenharmony_ci BIT(18), /* ETH_RST */ 3462306a36Sopenharmony_ci BIT(19), /* USB_RST */ 3562306a36Sopenharmony_ci BIT(20), /* SDIO_RST */ 3662306a36Sopenharmony_ci BIT(21), /* HDMI_RST */ 3762306a36Sopenharmony_ci BIT(22), /* GFX_RST */ 3862306a36Sopenharmony_ci BIT(25), /* DMAC_RST */ 3962306a36Sopenharmony_ci BIT(31), /* EBI_RST */ 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci#define HSDK_MAX_RESETS ARRAY_SIZE(rst_map) 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci#define CGU_SYS_RST_CTRL 0x0 4562306a36Sopenharmony_ci#define CGU_IP_SW_RESET 0x0 4662306a36Sopenharmony_ci#define CGU_IP_SW_RESET_DELAY_SHIFT 16 4762306a36Sopenharmony_ci#define CGU_IP_SW_RESET_DELAY_MASK GENMASK(31, CGU_IP_SW_RESET_DELAY_SHIFT) 4862306a36Sopenharmony_ci#define CGU_IP_SW_RESET_DELAY 0 4962306a36Sopenharmony_ci#define CGU_IP_SW_RESET_RESET BIT(0) 5062306a36Sopenharmony_ci#define SW_RESET_TIMEOUT 10000 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_cistatic void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id) 5362306a36Sopenharmony_ci{ 5462306a36Sopenharmony_ci writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL); 5562306a36Sopenharmony_ci} 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_cistatic int hsdk_reset_do(struct hsdk_rst *rst) 5862306a36Sopenharmony_ci{ 5962306a36Sopenharmony_ci u32 reg; 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci reg = readl(rst->regs_rst + CGU_IP_SW_RESET); 6262306a36Sopenharmony_ci reg &= ~CGU_IP_SW_RESET_DELAY_MASK; 6362306a36Sopenharmony_ci reg |= CGU_IP_SW_RESET_DELAY << CGU_IP_SW_RESET_DELAY_SHIFT; 6462306a36Sopenharmony_ci reg |= CGU_IP_SW_RESET_RESET; 6562306a36Sopenharmony_ci writel(reg, rst->regs_rst + CGU_IP_SW_RESET); 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci /* wait till reset bit is back to 0 */ 6862306a36Sopenharmony_ci return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg, 6962306a36Sopenharmony_ci !(reg & CGU_IP_SW_RESET_RESET), 5, SW_RESET_TIMEOUT); 7062306a36Sopenharmony_ci} 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_cistatic int hsdk_reset_reset(struct reset_controller_dev *rcdev, 7362306a36Sopenharmony_ci unsigned long id) 7462306a36Sopenharmony_ci{ 7562306a36Sopenharmony_ci struct hsdk_rst *rst = to_hsdk_rst(rcdev); 7662306a36Sopenharmony_ci unsigned long flags; 7762306a36Sopenharmony_ci int ret; 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci spin_lock_irqsave(&rst->lock, flags); 8062306a36Sopenharmony_ci hsdk_reset_config(rst, id); 8162306a36Sopenharmony_ci ret = hsdk_reset_do(rst); 8262306a36Sopenharmony_ci spin_unlock_irqrestore(&rst->lock, flags); 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci return ret; 8562306a36Sopenharmony_ci} 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cistatic const struct reset_control_ops hsdk_reset_ops = { 8862306a36Sopenharmony_ci .reset = hsdk_reset_reset, 8962306a36Sopenharmony_ci .deassert = hsdk_reset_reset, 9062306a36Sopenharmony_ci}; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_cistatic int hsdk_reset_probe(struct platform_device *pdev) 9362306a36Sopenharmony_ci{ 9462306a36Sopenharmony_ci struct hsdk_rst *rst; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL); 9762306a36Sopenharmony_ci if (!rst) 9862306a36Sopenharmony_ci return -ENOMEM; 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci rst->regs_ctl = devm_platform_ioremap_resource(pdev, 0); 10162306a36Sopenharmony_ci if (IS_ERR(rst->regs_ctl)) 10262306a36Sopenharmony_ci return PTR_ERR(rst->regs_ctl); 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci rst->regs_rst = devm_platform_ioremap_resource(pdev, 1); 10562306a36Sopenharmony_ci if (IS_ERR(rst->regs_rst)) 10662306a36Sopenharmony_ci return PTR_ERR(rst->regs_rst); 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci spin_lock_init(&rst->lock); 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci rst->rcdev.owner = THIS_MODULE; 11162306a36Sopenharmony_ci rst->rcdev.ops = &hsdk_reset_ops; 11262306a36Sopenharmony_ci rst->rcdev.of_node = pdev->dev.of_node; 11362306a36Sopenharmony_ci rst->rcdev.nr_resets = HSDK_MAX_RESETS; 11462306a36Sopenharmony_ci rst->rcdev.of_reset_n_cells = 1; 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci return reset_controller_register(&rst->rcdev); 11762306a36Sopenharmony_ci} 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_cistatic const struct of_device_id hsdk_reset_dt_match[] = { 12062306a36Sopenharmony_ci { .compatible = "snps,hsdk-reset" }, 12162306a36Sopenharmony_ci { }, 12262306a36Sopenharmony_ci}; 12362306a36Sopenharmony_ci 12462306a36Sopenharmony_cistatic struct platform_driver hsdk_reset_driver = { 12562306a36Sopenharmony_ci .probe = hsdk_reset_probe, 12662306a36Sopenharmony_ci .driver = { 12762306a36Sopenharmony_ci .name = "hsdk-reset", 12862306a36Sopenharmony_ci .of_match_table = hsdk_reset_dt_match, 12962306a36Sopenharmony_ci }, 13062306a36Sopenharmony_ci}; 13162306a36Sopenharmony_cibuiltin_platform_driver(hsdk_reset_driver); 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ciMODULE_AUTHOR("Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>"); 13462306a36Sopenharmony_ciMODULE_DESCRIPTION("Synopsys HSDK SDP reset driver"); 13562306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 136