1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2015, Sony Mobile Communications AB. 4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 5 */ 6 7#include <linux/module.h> 8#include <linux/of.h> 9#include <linux/platform_device.h> 10#include <linux/regulator/driver.h> 11#include <linux/regulator/of_regulator.h> 12#include <linux/soc/qcom/smd-rpm.h> 13 14struct qcom_rpm_reg { 15 struct device *dev; 16 17 struct qcom_smd_rpm *rpm; 18 19 u32 type; 20 u32 id; 21 22 struct regulator_desc desc; 23 24 int is_enabled; 25 int uV; 26 u32 load; 27 28 unsigned int enabled_updated:1; 29 unsigned int uv_updated:1; 30 unsigned int load_updated:1; 31}; 32 33struct rpm_regulator_req { 34 __le32 key; 35 __le32 nbytes; 36 __le32 value; 37}; 38 39#define RPM_KEY_SWEN 0x6e657773 /* "swen" */ 40#define RPM_KEY_UV 0x00007675 /* "uv" */ 41#define RPM_KEY_MA 0x0000616d /* "ma" */ 42 43static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) 44{ 45 struct rpm_regulator_req req[3]; 46 int reqlen = 0; 47 int ret; 48 49 if (vreg->enabled_updated) { 50 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN); 51 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 52 req[reqlen].value = cpu_to_le32(vreg->is_enabled); 53 reqlen++; 54 } 55 56 if (vreg->uv_updated && vreg->is_enabled) { 57 req[reqlen].key = cpu_to_le32(RPM_KEY_UV); 58 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 59 req[reqlen].value = cpu_to_le32(vreg->uV); 60 reqlen++; 61 } 62 63 if (vreg->load_updated && vreg->is_enabled) { 64 req[reqlen].key = cpu_to_le32(RPM_KEY_MA); 65 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 66 req[reqlen].value = cpu_to_le32(vreg->load / 1000); 67 reqlen++; 68 } 69 70 if (!reqlen) 71 return 0; 72 73 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE, 74 vreg->type, vreg->id, 75 req, sizeof(req[0]) * reqlen); 76 if (!ret) { 77 vreg->enabled_updated = 0; 78 vreg->uv_updated = 0; 79 vreg->load_updated = 0; 80 } 81 82 return ret; 83} 84 85static int rpm_reg_enable(struct regulator_dev *rdev) 86{ 87 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 88 int ret; 89 90 vreg->is_enabled = 1; 91 vreg->enabled_updated = 1; 92 93 ret = rpm_reg_write_active(vreg); 94 if (ret) 95 vreg->is_enabled = 0; 96 97 return ret; 98} 99 100static int rpm_reg_is_enabled(struct regulator_dev *rdev) 101{ 102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 103 104 return vreg->is_enabled; 105} 106 107static int rpm_reg_disable(struct regulator_dev *rdev) 108{ 109 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 110 int ret; 111 112 vreg->is_enabled = 0; 113 vreg->enabled_updated = 1; 114 115 ret = rpm_reg_write_active(vreg); 116 if (ret) 117 vreg->is_enabled = 1; 118 119 return ret; 120} 121 122static int rpm_reg_get_voltage(struct regulator_dev *rdev) 123{ 124 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 125 126 return vreg->uV; 127} 128 129static int rpm_reg_set_voltage(struct regulator_dev *rdev, 130 int min_uV, 131 int max_uV, 132 unsigned *selector) 133{ 134 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 135 int ret; 136 int old_uV = vreg->uV; 137 138 vreg->uV = min_uV; 139 vreg->uv_updated = 1; 140 141 ret = rpm_reg_write_active(vreg); 142 if (ret) 143 vreg->uV = old_uV; 144 145 return ret; 146} 147 148static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) 149{ 150 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 151 u32 old_load = vreg->load; 152 int ret; 153 154 vreg->load = load_uA; 155 vreg->load_updated = 1; 156 ret = rpm_reg_write_active(vreg); 157 if (ret) 158 vreg->load = old_load; 159 160 return ret; 161} 162 163static const struct regulator_ops rpm_smps_ldo_ops = { 164 .enable = rpm_reg_enable, 165 .disable = rpm_reg_disable, 166 .is_enabled = rpm_reg_is_enabled, 167 .list_voltage = regulator_list_voltage_linear_range, 168 169 .get_voltage = rpm_reg_get_voltage, 170 .set_voltage = rpm_reg_set_voltage, 171 172 .set_load = rpm_reg_set_load, 173}; 174 175static const struct regulator_ops rpm_smps_ldo_ops_fixed = { 176 .enable = rpm_reg_enable, 177 .disable = rpm_reg_disable, 178 .is_enabled = rpm_reg_is_enabled, 179 180 .get_voltage = rpm_reg_get_voltage, 181 .set_voltage = rpm_reg_set_voltage, 182 183 .set_load = rpm_reg_set_load, 184}; 185 186static const struct regulator_ops rpm_switch_ops = { 187 .enable = rpm_reg_enable, 188 .disable = rpm_reg_disable, 189 .is_enabled = rpm_reg_is_enabled, 190}; 191 192static const struct regulator_ops rpm_bob_ops = { 193 .enable = rpm_reg_enable, 194 .disable = rpm_reg_disable, 195 .is_enabled = rpm_reg_is_enabled, 196 197 .get_voltage = rpm_reg_get_voltage, 198 .set_voltage = rpm_reg_set_voltage, 199}; 200 201static const struct regulator_ops rpm_mp5496_ops = { 202 .enable = rpm_reg_enable, 203 .disable = rpm_reg_disable, 204 .is_enabled = rpm_reg_is_enabled, 205 .list_voltage = regulator_list_voltage_linear_range, 206 207 .get_voltage = rpm_reg_get_voltage, 208 .set_voltage = rpm_reg_set_voltage, 209}; 210 211static const struct regulator_desc pma8084_hfsmps = { 212 .linear_ranges = (struct linear_range[]) { 213 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 214 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 215 }, 216 .n_linear_ranges = 2, 217 .n_voltages = 159, 218 .ops = &rpm_smps_ldo_ops, 219}; 220 221static const struct regulator_desc pma8084_ftsmps = { 222 .linear_ranges = (struct linear_range[]) { 223 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 224 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 225 }, 226 .n_linear_ranges = 2, 227 .n_voltages = 262, 228 .ops = &rpm_smps_ldo_ops, 229}; 230 231static const struct regulator_desc pma8084_pldo = { 232 .linear_ranges = (struct linear_range[]) { 233 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 234 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 235 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 236 }, 237 .n_linear_ranges = 3, 238 .n_voltages = 164, 239 .ops = &rpm_smps_ldo_ops, 240}; 241 242static const struct regulator_desc pma8084_nldo = { 243 .linear_ranges = (struct linear_range[]) { 244 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 245 }, 246 .n_linear_ranges = 1, 247 .n_voltages = 64, 248 .ops = &rpm_smps_ldo_ops, 249}; 250 251static const struct regulator_desc pma8084_switch = { 252 .ops = &rpm_switch_ops, 253}; 254 255static const struct regulator_desc pm8226_hfsmps = { 256 .linear_ranges = (struct linear_range[]) { 257 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 258 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), 259 }, 260 .n_linear_ranges = 2, 261 .n_voltages = 159, 262 .ops = &rpm_smps_ldo_ops, 263}; 264 265static const struct regulator_desc pm8226_ftsmps = { 266 .linear_ranges = (struct linear_range[]) { 267 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 268 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 269 }, 270 .n_linear_ranges = 2, 271 .n_voltages = 262, 272 .ops = &rpm_smps_ldo_ops, 273}; 274 275static const struct regulator_desc pm8226_pldo = { 276 .linear_ranges = (struct linear_range[]) { 277 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 278 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 279 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 280 }, 281 .n_linear_ranges = 3, 282 .n_voltages = 164, 283 .ops = &rpm_smps_ldo_ops, 284}; 285 286static const struct regulator_desc pm8226_nldo = { 287 .linear_ranges = (struct linear_range[]) { 288 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 289 }, 290 .n_linear_ranges = 1, 291 .n_voltages = 64, 292 .ops = &rpm_smps_ldo_ops, 293}; 294 295static const struct regulator_desc pm8226_switch = { 296 .ops = &rpm_switch_ops, 297}; 298 299static const struct regulator_desc pm8x41_hfsmps = { 300 .linear_ranges = (struct linear_range[]) { 301 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 302 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), 303 }, 304 .n_linear_ranges = 2, 305 .n_voltages = 159, 306 .ops = &rpm_smps_ldo_ops, 307}; 308 309static const struct regulator_desc pm8841_ftsmps = { 310 .linear_ranges = (struct linear_range[]) { 311 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 312 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 313 }, 314 .n_linear_ranges = 2, 315 .n_voltages = 262, 316 .ops = &rpm_smps_ldo_ops, 317}; 318 319static const struct regulator_desc pm8941_boost = { 320 .linear_ranges = (struct linear_range[]) { 321 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), 322 }, 323 .n_linear_ranges = 1, 324 .n_voltages = 31, 325 .ops = &rpm_smps_ldo_ops, 326}; 327 328static const struct regulator_desc pm8941_pldo = { 329 .linear_ranges = (struct linear_range[]) { 330 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 331 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 332 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 333 }, 334 .n_linear_ranges = 3, 335 .n_voltages = 164, 336 .ops = &rpm_smps_ldo_ops, 337}; 338 339static const struct regulator_desc pm8941_nldo = { 340 .linear_ranges = (struct linear_range[]) { 341 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 342 }, 343 .n_linear_ranges = 1, 344 .n_voltages = 64, 345 .ops = &rpm_smps_ldo_ops, 346}; 347 348static const struct regulator_desc pm8941_lnldo = { 349 .fixed_uV = 1740000, 350 .n_voltages = 1, 351 .ops = &rpm_smps_ldo_ops_fixed, 352}; 353 354static const struct regulator_desc pm8941_switch = { 355 .ops = &rpm_switch_ops, 356}; 357 358static const struct regulator_desc pm8916_pldo = { 359 .linear_ranges = (struct linear_range[]) { 360 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), 361 }, 362 .n_linear_ranges = 1, 363 .n_voltages = 128, 364 .ops = &rpm_smps_ldo_ops, 365}; 366 367static const struct regulator_desc pm8916_nldo = { 368 .linear_ranges = (struct linear_range[]) { 369 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), 370 }, 371 .n_linear_ranges = 1, 372 .n_voltages = 94, 373 .ops = &rpm_smps_ldo_ops, 374}; 375 376static const struct regulator_desc pm8916_buck_lvo_smps = { 377 .linear_ranges = (struct linear_range[]) { 378 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 379 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000), 380 }, 381 .n_linear_ranges = 2, 382 .n_voltages = 128, 383 .ops = &rpm_smps_ldo_ops, 384}; 385 386static const struct regulator_desc pm8916_buck_hvo_smps = { 387 .linear_ranges = (struct linear_range[]) { 388 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000), 389 }, 390 .n_linear_ranges = 1, 391 .n_voltages = 32, 392 .ops = &rpm_smps_ldo_ops, 393}; 394 395static const struct regulator_desc pm8950_hfsmps = { 396 .linear_ranges = (struct linear_range[]) { 397 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 398 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000), 399 }, 400 .n_linear_ranges = 2, 401 .n_voltages = 128, 402 .ops = &rpm_smps_ldo_ops, 403}; 404 405static const struct regulator_desc pm8950_ftsmps2p5 = { 406 .linear_ranges = (struct linear_range[]) { 407 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000), 408 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000), 409 }, 410 .n_linear_ranges = 2, 411 .n_voltages = 461, 412 .ops = &rpm_smps_ldo_ops, 413}; 414 415static const struct regulator_desc pm8950_ult_nldo = { 416 .linear_ranges = (struct linear_range[]) { 417 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500), 418 }, 419 .n_linear_ranges = 1, 420 .n_voltages = 203, 421 .ops = &rpm_smps_ldo_ops, 422}; 423 424static const struct regulator_desc pm8950_ult_pldo = { 425 .linear_ranges = (struct linear_range[]) { 426 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), 427 }, 428 .n_linear_ranges = 1, 429 .n_voltages = 128, 430 .ops = &rpm_smps_ldo_ops, 431}; 432 433static const struct regulator_desc pm8950_pldo_lv = { 434 .linear_ranges = (struct linear_range[]) { 435 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000), 436 }, 437 .n_linear_ranges = 1, 438 .n_voltages = 17, 439 .ops = &rpm_smps_ldo_ops, 440}; 441 442static const struct regulator_desc pm8950_pldo = { 443 .linear_ranges = (struct linear_range[]) { 444 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500), 445 }, 446 .n_linear_ranges = 1, 447 .n_voltages = 165, 448 .ops = &rpm_smps_ldo_ops, 449}; 450 451static const struct regulator_desc pm8953_lnldo = { 452 .linear_ranges = (struct linear_range[]) { 453 REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000), 454 REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000), 455 }, 456 .n_linear_ranges = 2, 457 .n_voltages = 16, 458 .ops = &rpm_smps_ldo_ops, 459}; 460 461static const struct regulator_desc pm8953_ult_nldo = { 462 .linear_ranges = (struct linear_range[]) { 463 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), 464 }, 465 .n_linear_ranges = 1, 466 .n_voltages = 94, 467 .ops = &rpm_smps_ldo_ops, 468}; 469 470static const struct regulator_desc pm8994_hfsmps = { 471 .linear_ranges = (struct linear_range[]) { 472 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 473 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 474 }, 475 .n_linear_ranges = 2, 476 .n_voltages = 159, 477 .ops = &rpm_smps_ldo_ops, 478}; 479 480static const struct regulator_desc pm8994_ftsmps = { 481 .linear_ranges = (struct linear_range[]) { 482 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 483 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 484 }, 485 .n_linear_ranges = 2, 486 .n_voltages = 350, 487 .ops = &rpm_smps_ldo_ops, 488}; 489 490static const struct regulator_desc pm8994_nldo = { 491 .linear_ranges = (struct linear_range[]) { 492 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 493 }, 494 .n_linear_ranges = 1, 495 .n_voltages = 64, 496 .ops = &rpm_smps_ldo_ops, 497}; 498 499static const struct regulator_desc pm8994_pldo = { 500 .linear_ranges = (struct linear_range[]) { 501 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 502 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 503 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 504 }, 505 .n_linear_ranges = 3, 506 .n_voltages = 164, 507 .ops = &rpm_smps_ldo_ops, 508}; 509 510static const struct regulator_desc pm8994_switch = { 511 .ops = &rpm_switch_ops, 512}; 513 514static const struct regulator_desc pm8994_lnldo = { 515 .fixed_uV = 1740000, 516 .n_voltages = 1, 517 .ops = &rpm_smps_ldo_ops_fixed, 518}; 519 520static const struct regulator_desc pmi8994_ftsmps = { 521 .linear_ranges = (struct linear_range[]) { 522 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 523 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 524 }, 525 .n_linear_ranges = 2, 526 .n_voltages = 350, 527 .ops = &rpm_smps_ldo_ops, 528}; 529 530static const struct regulator_desc pmi8994_hfsmps = { 531 .linear_ranges = (struct linear_range[]) { 532 REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500), 533 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000), 534 }, 535 .n_linear_ranges = 2, 536 .n_voltages = 142, 537 .ops = &rpm_smps_ldo_ops, 538}; 539 540static const struct regulator_desc pmi8994_bby = { 541 .linear_ranges = (struct linear_range[]) { 542 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000), 543 }, 544 .n_linear_ranges = 1, 545 .n_voltages = 45, 546 .ops = &rpm_bob_ops, 547}; 548 549static const struct regulator_desc pm8998_ftsmps = { 550 .linear_ranges = (struct linear_range[]) { 551 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), 552 }, 553 .n_linear_ranges = 1, 554 .n_voltages = 259, 555 .ops = &rpm_smps_ldo_ops, 556}; 557 558static const struct regulator_desc pm8998_hfsmps = { 559 .linear_ranges = (struct linear_range[]) { 560 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 561 }, 562 .n_linear_ranges = 1, 563 .n_voltages = 216, 564 .ops = &rpm_smps_ldo_ops, 565}; 566 567static const struct regulator_desc pm8998_nldo = { 568 .linear_ranges = (struct linear_range[]) { 569 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 570 }, 571 .n_linear_ranges = 1, 572 .n_voltages = 128, 573 .ops = &rpm_smps_ldo_ops, 574}; 575 576static const struct regulator_desc pm8998_pldo = { 577 .linear_ranges = (struct linear_range[]) { 578 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), 579 }, 580 .n_linear_ranges = 1, 581 .n_voltages = 256, 582 .ops = &rpm_smps_ldo_ops, 583}; 584 585static const struct regulator_desc pm8998_pldo_lv = { 586 .linear_ranges = (struct linear_range[]) { 587 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), 588 }, 589 .n_linear_ranges = 1, 590 .n_voltages = 128, 591 .ops = &rpm_smps_ldo_ops, 592}; 593 594static const struct regulator_desc pm8998_switch = { 595 .ops = &rpm_switch_ops, 596}; 597 598static const struct regulator_desc pmi8998_bob = { 599 .linear_ranges = (struct linear_range[]) { 600 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), 601 }, 602 .n_linear_ranges = 1, 603 .n_voltages = 84, 604 .ops = &rpm_bob_ops, 605}; 606 607static const struct regulator_desc pm660_ftsmps = { 608 .linear_ranges = (struct linear_range[]) { 609 REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000), 610 }, 611 .n_linear_ranges = 1, 612 .n_voltages = 200, 613 .ops = &rpm_smps_ldo_ops, 614}; 615 616static const struct regulator_desc pm660_hfsmps = { 617 .linear_ranges = (struct linear_range[]) { 618 REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000), 619 }, 620 .n_linear_ranges = 1, 621 .n_voltages = 217, 622 .ops = &rpm_smps_ldo_ops, 623}; 624 625static const struct regulator_desc pm660_ht_nldo = { 626 .linear_ranges = (struct linear_range[]) { 627 REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000), 628 }, 629 .n_linear_ranges = 1, 630 .n_voltages = 125, 631 .ops = &rpm_smps_ldo_ops, 632}; 633 634static const struct regulator_desc pm660_ht_lvpldo = { 635 .linear_ranges = (struct linear_range[]) { 636 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), 637 }, 638 .n_linear_ranges = 1, 639 .n_voltages = 63, 640 .ops = &rpm_smps_ldo_ops, 641}; 642 643static const struct regulator_desc pm660_nldo660 = { 644 .linear_ranges = (struct linear_range[]) { 645 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), 646 }, 647 .n_linear_ranges = 1, 648 .n_voltages = 124, 649 .ops = &rpm_smps_ldo_ops, 650}; 651 652static const struct regulator_desc pm660_pldo660 = { 653 .linear_ranges = (struct linear_range[]) { 654 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 655 }, 656 .n_linear_ranges = 1, 657 .n_voltages = 256, 658 .ops = &rpm_smps_ldo_ops, 659}; 660 661static const struct regulator_desc pm660l_bob = { 662 .linear_ranges = (struct linear_range[]) { 663 REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000), 664 }, 665 .n_linear_ranges = 1, 666 .n_voltages = 85, 667 .ops = &rpm_bob_ops, 668}; 669 670static const struct regulator_desc pm6125_ftsmps = { 671 .linear_ranges = (struct linear_range[]) { 672 REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000), 673 }, 674 .n_linear_ranges = 1, 675 .n_voltages = 269, 676 .ops = &rpm_smps_ldo_ops, 677}; 678 679static const struct regulator_desc pmic5_ftsmps520 = { 680 .linear_ranges = (struct linear_range[]) { 681 REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), 682 }, 683 .n_linear_ranges = 1, 684 .n_voltages = 264, 685 .ops = &rpm_smps_ldo_ops, 686}; 687 688static const struct regulator_desc pmic5_hfsmps515 = { 689 .linear_ranges = (struct linear_range[]) { 690 REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000), 691 }, 692 .n_linear_ranges = 1, 693 .n_voltages = 236, 694 .ops = &rpm_smps_ldo_ops, 695}; 696 697static const struct regulator_desc pms405_hfsmps3 = { 698 .linear_ranges = (struct linear_range[]) { 699 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 700 }, 701 .n_linear_ranges = 1, 702 .n_voltages = 216, 703 .ops = &rpm_smps_ldo_ops, 704}; 705 706static const struct regulator_desc pms405_nldo300 = { 707 .linear_ranges = (struct linear_range[]) { 708 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 709 }, 710 .n_linear_ranges = 1, 711 .n_voltages = 128, 712 .ops = &rpm_smps_ldo_ops, 713}; 714 715static const struct regulator_desc pms405_nldo1200 = { 716 .linear_ranges = (struct linear_range[]) { 717 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 718 }, 719 .n_linear_ranges = 1, 720 .n_voltages = 128, 721 .ops = &rpm_smps_ldo_ops, 722}; 723 724static const struct regulator_desc pms405_pldo50 = { 725 .linear_ranges = (struct linear_range[]) { 726 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 727 }, 728 .n_linear_ranges = 1, 729 .n_voltages = 129, 730 .ops = &rpm_smps_ldo_ops, 731}; 732 733static const struct regulator_desc pms405_pldo150 = { 734 .linear_ranges = (struct linear_range[]) { 735 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 736 }, 737 .n_linear_ranges = 1, 738 .n_voltages = 129, 739 .ops = &rpm_smps_ldo_ops, 740}; 741 742static const struct regulator_desc pms405_pldo600 = { 743 .linear_ranges = (struct linear_range[]) { 744 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000), 745 }, 746 .n_linear_ranges = 1, 747 .n_voltages = 99, 748 .ops = &rpm_smps_ldo_ops, 749}; 750 751static const struct regulator_desc mp5496_smps = { 752 .linear_ranges = (struct linear_range[]) { 753 REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500), 754 }, 755 .n_linear_ranges = 1, 756 .n_voltages = 128, 757 .ops = &rpm_mp5496_ops, 758}; 759 760static const struct regulator_desc mp5496_ldoa2 = { 761 .linear_ranges = (struct linear_range[]) { 762 REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000), 763 }, 764 .n_linear_ranges = 1, 765 .n_voltages = 128, 766 .ops = &rpm_mp5496_ops, 767}; 768 769static const struct regulator_desc pm2250_lvftsmps = { 770 .linear_ranges = (struct linear_range[]) { 771 REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000), 772 }, 773 .n_linear_ranges = 1, 774 .n_voltages = 270, 775 .ops = &rpm_smps_ldo_ops, 776}; 777 778static const struct regulator_desc pm2250_ftsmps = { 779 .linear_ranges = (struct linear_range[]) { 780 REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000), 781 }, 782 .n_linear_ranges = 1, 783 .n_voltages = 270, 784 .ops = &rpm_smps_ldo_ops, 785}; 786 787struct rpm_regulator_data { 788 const char *name; 789 u32 type; 790 u32 id; 791 const struct regulator_desc *desc; 792 const char *supply; 793}; 794 795static const struct rpm_regulator_data rpm_mp5496_regulators[] = { 796 { "s1", QCOM_SMD_RPM_SMPA, 1, &mp5496_smps, "s1" }, 797 { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smps, "s2" }, 798 { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" }, 799 {} 800}; 801 802static const struct rpm_regulator_data rpm_pm2250_regulators[] = { 803 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, 804 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, 805 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" }, 806 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" }, 807 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 808 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 809 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 810 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 811 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 812 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 813 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 814 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 815 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 816 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 817 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 818 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 819 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 820 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 821 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 822 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 823 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 824 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 825 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 826 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 827 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 828 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 829 {} 830}; 831 832static const struct rpm_regulator_data rpm_pm6125_regulators[] = { 833 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" }, 834 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" }, 835 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" }, 836 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" }, 837 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, 838 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" }, 839 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, 840 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" }, 841 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 842 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" }, 843 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" }, 844 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" }, 845 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 846 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" }, 847 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 848 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" }, 849 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" }, 850 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 851 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" }, 852 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" }, 853 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 854 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 855 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 856 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" }, 857 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 858 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 859 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 860 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 861 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 862 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 863 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" }, 864 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" }, 865 { } 866}; 867 868static const struct rpm_regulator_data rpm_pm660_regulators[] = { 869 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, 870 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, 871 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, 872 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, 873 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, 874 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, 875 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, 876 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, 877 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, 878 /* l4 is unaccessible on PM660 */ 879 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, 880 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 881 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 882 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 883 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 884 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 885 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 886 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 887 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 888 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 889 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 890 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 891 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 892 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 893 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 894 { } 895}; 896 897static const struct rpm_regulator_data rpm_pm660l_regulators[] = { 898 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, 899 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, 900 { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, 901 { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, 902 { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, 903 { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, 904 { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 905 { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, 906 { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 907 { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, 908 { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 909 { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 910 { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 911 { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 912 { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, 913 { } 914}; 915 916static const struct rpm_regulator_data rpm_pm8226_regulators[] = { 917 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" }, 918 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" }, 919 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" }, 920 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" }, 921 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" }, 922 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 923 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 924 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" }, 925 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 926 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 927 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 928 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 929 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 930 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 931 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" }, 932 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" }, 933 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" }, 934 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" }, 935 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" }, 936 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 937 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 938 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 939 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 940 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 941 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 942 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 943 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 944 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 945 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" }, 946 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" }, 947 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" }, 948 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 949 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 950 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" }, 951 {} 952}; 953 954static const struct rpm_regulator_data rpm_pm8841_regulators[] = { 955 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, 956 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, 957 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" }, 958 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" }, 959 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" }, 960 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" }, 961 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" }, 962 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" }, 963 {} 964}; 965 966static const struct rpm_regulator_data rpm_pm8909_regulators[] = { 967 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, 968 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" }, 969 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" }, 970 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" }, 971 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" }, 972 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" }, 973 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" }, 974 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" }, 975 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" }, 976 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, 977 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, 978 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" }, 979 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" }, 980 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, 981 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" }, 982 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, 983 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, 984 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, 985 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, 986 {} 987}; 988 989static const struct rpm_regulator_data rpm_pm8916_regulators[] = { 990 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, 991 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" }, 992 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" }, 993 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" }, 994 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" }, 995 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" }, 996 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" }, 997 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" }, 998 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" }, 999 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" }, 1000 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" }, 1001 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 1002 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 1003 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1004 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1005 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1006 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1007 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1008 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1009 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1010 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1011 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 1012 {} 1013}; 1014 1015static const struct rpm_regulator_data rpm_pm8941_regulators[] = { 1016 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, 1017 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, 1018 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" }, 1019 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost }, 1020 1021 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" }, 1022 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" }, 1023 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" }, 1024 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" }, 1025 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" }, 1026 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 1027 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" }, 1028 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 1029 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 1030 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 1031 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" }, 1032 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 1033 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 1034 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 1035 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 1036 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 1037 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 1038 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 1039 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 1040 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 1041 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" }, 1042 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 1043 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 1044 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 1045 1046 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 1047 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 1048 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 1049 1050 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, 1051 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, 1052 1053 {} 1054}; 1055 1056static const struct rpm_regulator_data rpm_pm8950_regulators[] = { 1057 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, 1058 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, 1059 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" }, 1060 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" }, 1061 /* S5 is managed via SPMI. */ 1062 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" }, 1063 1064 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" }, 1065 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" }, 1066 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" }, 1067 /* L4 seems not to exist. */ 1068 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, 1069 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, 1070 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, 1071 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 1072 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 1073 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"}, 1074 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 1075 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 1076 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 1077 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 1078 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 1079 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" }, 1080 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 1081 /* L18 seems not to exist. */ 1082 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" }, 1083 /* L20 & L21 seem not to exist. */ 1084 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" }, 1085 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" }, 1086 {} 1087}; 1088 1089static const struct rpm_regulator_data rpm_pm8953_regulators[] = { 1090 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" }, 1091 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" }, 1092 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, 1093 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, 1094 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, 1095 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" }, 1096 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, 1097 1098 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" }, 1099 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" }, 1100 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" }, 1101 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1102 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1103 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1104 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1105 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1106 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1107 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1108 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1109 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1110 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1111 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1112 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 1113 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1114 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1115 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1116 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1117 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" }, 1118 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" }, 1119 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1120 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" }, 1121 {} 1122}; 1123 1124static const struct rpm_regulator_data rpm_pm8994_regulators[] = { 1125 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" }, 1126 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" }, 1127 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, 1128 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, 1129 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" }, 1130 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" }, 1131 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" }, 1132 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" }, 1133 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" }, 1134 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" }, 1135 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" }, 1136 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" }, 1137 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" }, 1138 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" }, 1139 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" }, 1140 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" }, 1141 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" }, 1142 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" }, 1143 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" }, 1144 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" }, 1145 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1146 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1147 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" }, 1148 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" }, 1149 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1150 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" }, 1151 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" }, 1152 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" }, 1153 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" }, 1154 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1155 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1156 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" }, 1157 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" }, 1158 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1159 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1160 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1161 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" }, 1162 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" }, 1163 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" }, 1164 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" }, 1165 { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" }, 1166 { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" }, 1167 { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" }, 1168 { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" }, 1169 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" }, 1170 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" }, 1171 1172 {} 1173}; 1174 1175static const struct rpm_regulator_data rpm_pm8998_regulators[] = { 1176 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, 1177 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, 1178 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, 1179 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, 1180 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, 1181 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" }, 1182 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" }, 1183 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" }, 1184 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" }, 1185 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" }, 1186 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" }, 1187 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" }, 1188 { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" }, 1189 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" }, 1190 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" }, 1191 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" }, 1192 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" }, 1193 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" }, 1194 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" }, 1195 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1196 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" }, 1197 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" }, 1198 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" }, 1199 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" }, 1200 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1201 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" }, 1202 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1203 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1204 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" }, 1205 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" }, 1206 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" }, 1207 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" }, 1208 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" }, 1209 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" }, 1210 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" }, 1211 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" }, 1212 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" }, 1213 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" }, 1214 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" }, 1215 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" }, 1216 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" }, 1217 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" }, 1218 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" }, 1219 {} 1220}; 1221 1222static const struct rpm_regulator_data rpm_pma8084_regulators[] = { 1223 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, 1224 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, 1225 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, 1226 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, 1227 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, 1228 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, 1229 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, 1230 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, 1231 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, 1232 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, 1233 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, 1234 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, 1235 1236 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, 1237 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1238 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1239 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1240 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, 1241 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1242 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, 1243 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, 1244 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1245 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1246 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, 1247 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1248 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1249 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1250 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1251 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, 1252 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, 1253 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, 1254 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, 1255 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1256 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, 1257 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, 1258 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1259 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1260 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, 1261 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1262 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1263 1264 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, 1265 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, 1266 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, 1267 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, 1268 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, 1269 1270 {} 1271}; 1272 1273static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { 1274 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, 1275 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, 1276 { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, 1277 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, 1278 {} 1279}; 1280 1281static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { 1282 { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, 1283 {} 1284}; 1285 1286static const struct rpm_regulator_data rpm_pmr735a_regulators[] = { 1287 { "s1", QCOM_SMD_RPM_SMPE, 1, &pmic5_ftsmps520, "vdd_s1"}, 1288 { "s2", QCOM_SMD_RPM_SMPE, 2, &pmic5_ftsmps520, "vdd_s2"}, 1289 { "s3", QCOM_SMD_RPM_SMPE, 3, &pmic5_hfsmps515, "vdd_s3"}, 1290 { "l1", QCOM_SMD_RPM_LDOE, 1, &pm660_nldo660, "vdd_l1_l2"}, 1291 { "l2", QCOM_SMD_RPM_LDOE, 2, &pm660_nldo660, "vdd_l1_l2"}, 1292 { "l3", QCOM_SMD_RPM_LDOE, 3, &pm660_nldo660, "vdd_l3"}, 1293 { "l4", QCOM_SMD_RPM_LDOE, 4, &pm660_ht_lvpldo, "vdd_l4"}, 1294 { "l5", QCOM_SMD_RPM_LDOE, 5, &pm660_nldo660, "vdd_l5_l6"}, 1295 { "l6", QCOM_SMD_RPM_LDOE, 6, &pm660_nldo660, "vdd_l5_l6"}, 1296 { "l7", QCOM_SMD_RPM_LDOE, 7, &pm660_pldo660, "vdd_l7_bob"}, 1297 {} 1298}; 1299 1300static const struct rpm_regulator_data rpm_pms405_regulators[] = { 1301 { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" }, 1302 { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" }, 1303 { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" }, 1304 { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" }, 1305 { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" }, 1306 { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" }, 1307 { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" }, 1308 { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" }, 1309 { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" }, 1310 { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" }, 1311 { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" }, 1312 { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" }, 1313 { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" }, 1314 { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" }, 1315 { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" }, 1316 { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1317 { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1318 { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1319 {} 1320}; 1321 1322static const struct of_device_id rpm_of_match[] = { 1323 { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, 1324 { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, 1325 { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators }, 1326 { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, 1327 { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, 1328 { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators }, 1329 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, 1330 { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators }, 1331 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, 1332 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, 1333 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, 1334 { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, 1335 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, 1336 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, 1337 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, 1338 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, 1339 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, 1340 { .compatible = "qcom,rpm-pmr735a-regulators", .data = &rpm_pmr735a_regulators }, 1341 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, 1342 {} 1343}; 1344MODULE_DEVICE_TABLE(of, rpm_of_match); 1345 1346/** 1347 * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator 1348 * @vreg: Pointer to the individual qcom_smd-regulator resource 1349 * @dev: Pointer to the top level qcom_smd-regulator PMIC device 1350 * @node: Pointer to the individual qcom_smd-regulator resource 1351 * device node 1352 * @rpm: Pointer to the rpm bus node 1353 * @pmic_rpm_data: Pointer to a null-terminated array of qcom_smd-regulator 1354 * resources defined for the top level PMIC device 1355 * 1356 * Return: 0 on success, errno on failure 1357 */ 1358static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev, 1359 struct device_node *node, struct qcom_smd_rpm *rpm, 1360 const struct rpm_regulator_data *pmic_rpm_data) 1361{ 1362 struct regulator_config config = {}; 1363 const struct rpm_regulator_data *rpm_data; 1364 struct regulator_dev *rdev; 1365 int ret; 1366 1367 for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++) 1368 if (of_node_name_eq(node, rpm_data->name)) 1369 break; 1370 1371 if (!rpm_data->name) { 1372 dev_err(dev, "Unknown regulator %pOFn\n", node); 1373 return -EINVAL; 1374 } 1375 1376 vreg->dev = dev; 1377 vreg->rpm = rpm; 1378 vreg->type = rpm_data->type; 1379 vreg->id = rpm_data->id; 1380 1381 memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc)); 1382 vreg->desc.name = rpm_data->name; 1383 vreg->desc.supply_name = rpm_data->supply; 1384 vreg->desc.owner = THIS_MODULE; 1385 vreg->desc.type = REGULATOR_VOLTAGE; 1386 vreg->desc.of_match = rpm_data->name; 1387 1388 config.dev = dev; 1389 config.of_node = node; 1390 config.driver_data = vreg; 1391 1392 rdev = devm_regulator_register(dev, &vreg->desc, &config); 1393 if (IS_ERR(rdev)) { 1394 ret = PTR_ERR(rdev); 1395 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret); 1396 return ret; 1397 } 1398 1399 return 0; 1400} 1401 1402static int rpm_reg_probe(struct platform_device *pdev) 1403{ 1404 struct device *dev = &pdev->dev; 1405 const struct rpm_regulator_data *vreg_data; 1406 struct device_node *node; 1407 struct qcom_rpm_reg *vreg; 1408 struct qcom_smd_rpm *rpm; 1409 int ret; 1410 1411 rpm = dev_get_drvdata(pdev->dev.parent); 1412 if (!rpm) { 1413 dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n"); 1414 return -ENODEV; 1415 } 1416 1417 vreg_data = of_device_get_match_data(dev); 1418 if (!vreg_data) 1419 return -ENODEV; 1420 1421 for_each_available_child_of_node(dev->of_node, node) { 1422 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); 1423 if (!vreg) { 1424 of_node_put(node); 1425 return -ENOMEM; 1426 } 1427 1428 ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data); 1429 1430 if (ret < 0) { 1431 of_node_put(node); 1432 return ret; 1433 } 1434 } 1435 1436 return 0; 1437} 1438 1439static struct platform_driver rpm_reg_driver = { 1440 .probe = rpm_reg_probe, 1441 .driver = { 1442 .name = "qcom_rpm_smd_regulator", 1443 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1444 .of_match_table = rpm_of_match, 1445 }, 1446}; 1447 1448static int __init rpm_reg_init(void) 1449{ 1450 return platform_driver_register(&rpm_reg_driver); 1451} 1452subsys_initcall(rpm_reg_init); 1453 1454static void __exit rpm_reg_exit(void) 1455{ 1456 platform_driver_unregister(&rpm_reg_driver); 1457} 1458module_exit(rpm_reg_exit) 1459 1460MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); 1461MODULE_LICENSE("GPL v2"); 1462