1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Driver for Regulator part of Palmas PMIC Chips 4 * 5 * Copyright 2011-2013 Texas Instruments Inc. 6 * 7 * Author: Graeme Gregory <gg@slimlogic.co.uk> 8 * Author: Ian Lartey <ian@slimlogic.co.uk> 9 */ 10 11#include <linux/kernel.h> 12#include <linux/module.h> 13#include <linux/init.h> 14#include <linux/err.h> 15#include <linux/platform_device.h> 16#include <linux/regulator/driver.h> 17#include <linux/regulator/machine.h> 18#include <linux/slab.h> 19#include <linux/regmap.h> 20#include <linux/mfd/palmas.h> 21#include <linux/of.h> 22#include <linux/of_platform.h> 23#include <linux/regulator/of_regulator.h> 24 25static const struct linear_range smps_low_ranges[] = { 26 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 27 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0), 28 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000), 29 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0), 30}; 31 32static const struct linear_range smps_high_ranges[] = { 33 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 34 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0), 35 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000), 36 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0), 37}; 38 39static struct palmas_regs_info palmas_generic_regs_info[] = { 40 { 41 .name = "SMPS12", 42 .sname = "smps1-in", 43 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 44 .ctrl_addr = PALMAS_SMPS12_CTRL, 45 .tstep_addr = PALMAS_SMPS12_TSTEP, 46 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 47 }, 48 { 49 .name = "SMPS123", 50 .sname = "smps1-in", 51 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 52 .ctrl_addr = PALMAS_SMPS12_CTRL, 53 .tstep_addr = PALMAS_SMPS12_TSTEP, 54 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 55 }, 56 { 57 .name = "SMPS3", 58 .sname = "smps3-in", 59 .vsel_addr = PALMAS_SMPS3_VOLTAGE, 60 .ctrl_addr = PALMAS_SMPS3_CTRL, 61 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3, 62 }, 63 { 64 .name = "SMPS45", 65 .sname = "smps4-in", 66 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 67 .ctrl_addr = PALMAS_SMPS45_CTRL, 68 .tstep_addr = PALMAS_SMPS45_TSTEP, 69 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 70 }, 71 { 72 .name = "SMPS457", 73 .sname = "smps4-in", 74 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 75 .ctrl_addr = PALMAS_SMPS45_CTRL, 76 .tstep_addr = PALMAS_SMPS45_TSTEP, 77 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 78 }, 79 { 80 .name = "SMPS6", 81 .sname = "smps6-in", 82 .vsel_addr = PALMAS_SMPS6_VOLTAGE, 83 .ctrl_addr = PALMAS_SMPS6_CTRL, 84 .tstep_addr = PALMAS_SMPS6_TSTEP, 85 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6, 86 }, 87 { 88 .name = "SMPS7", 89 .sname = "smps7-in", 90 .vsel_addr = PALMAS_SMPS7_VOLTAGE, 91 .ctrl_addr = PALMAS_SMPS7_CTRL, 92 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7, 93 }, 94 { 95 .name = "SMPS8", 96 .sname = "smps8-in", 97 .vsel_addr = PALMAS_SMPS8_VOLTAGE, 98 .ctrl_addr = PALMAS_SMPS8_CTRL, 99 .tstep_addr = PALMAS_SMPS8_TSTEP, 100 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8, 101 }, 102 { 103 .name = "SMPS9", 104 .sname = "smps9-in", 105 .vsel_addr = PALMAS_SMPS9_VOLTAGE, 106 .ctrl_addr = PALMAS_SMPS9_CTRL, 107 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9, 108 }, 109 { 110 .name = "SMPS10_OUT2", 111 .sname = "smps10-in", 112 .ctrl_addr = PALMAS_SMPS10_CTRL, 113 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 114 }, 115 { 116 .name = "SMPS10_OUT1", 117 .sname = "smps10-out2", 118 .ctrl_addr = PALMAS_SMPS10_CTRL, 119 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 120 }, 121 { 122 .name = "LDO1", 123 .sname = "ldo1-in", 124 .vsel_addr = PALMAS_LDO1_VOLTAGE, 125 .ctrl_addr = PALMAS_LDO1_CTRL, 126 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1, 127 }, 128 { 129 .name = "LDO2", 130 .sname = "ldo2-in", 131 .vsel_addr = PALMAS_LDO2_VOLTAGE, 132 .ctrl_addr = PALMAS_LDO2_CTRL, 133 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2, 134 }, 135 { 136 .name = "LDO3", 137 .sname = "ldo3-in", 138 .vsel_addr = PALMAS_LDO3_VOLTAGE, 139 .ctrl_addr = PALMAS_LDO3_CTRL, 140 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3, 141 }, 142 { 143 .name = "LDO4", 144 .sname = "ldo4-in", 145 .vsel_addr = PALMAS_LDO4_VOLTAGE, 146 .ctrl_addr = PALMAS_LDO4_CTRL, 147 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4, 148 }, 149 { 150 .name = "LDO5", 151 .sname = "ldo5-in", 152 .vsel_addr = PALMAS_LDO5_VOLTAGE, 153 .ctrl_addr = PALMAS_LDO5_CTRL, 154 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5, 155 }, 156 { 157 .name = "LDO6", 158 .sname = "ldo6-in", 159 .vsel_addr = PALMAS_LDO6_VOLTAGE, 160 .ctrl_addr = PALMAS_LDO6_CTRL, 161 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6, 162 }, 163 { 164 .name = "LDO7", 165 .sname = "ldo7-in", 166 .vsel_addr = PALMAS_LDO7_VOLTAGE, 167 .ctrl_addr = PALMAS_LDO7_CTRL, 168 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7, 169 }, 170 { 171 .name = "LDO8", 172 .sname = "ldo8-in", 173 .vsel_addr = PALMAS_LDO8_VOLTAGE, 174 .ctrl_addr = PALMAS_LDO8_CTRL, 175 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8, 176 }, 177 { 178 .name = "LDO9", 179 .sname = "ldo9-in", 180 .vsel_addr = PALMAS_LDO9_VOLTAGE, 181 .ctrl_addr = PALMAS_LDO9_CTRL, 182 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9, 183 }, 184 { 185 .name = "LDOLN", 186 .sname = "ldoln-in", 187 .vsel_addr = PALMAS_LDOLN_VOLTAGE, 188 .ctrl_addr = PALMAS_LDOLN_CTRL, 189 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN, 190 }, 191 { 192 .name = "LDOUSB", 193 .sname = "ldousb-in", 194 .vsel_addr = PALMAS_LDOUSB_VOLTAGE, 195 .ctrl_addr = PALMAS_LDOUSB_CTRL, 196 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB, 197 }, 198 { 199 .name = "REGEN1", 200 .ctrl_addr = PALMAS_REGEN1_CTRL, 201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1, 202 }, 203 { 204 .name = "REGEN2", 205 .ctrl_addr = PALMAS_REGEN2_CTRL, 206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2, 207 }, 208 { 209 .name = "REGEN3", 210 .ctrl_addr = PALMAS_REGEN3_CTRL, 211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3, 212 }, 213 { 214 .name = "SYSEN1", 215 .ctrl_addr = PALMAS_SYSEN1_CTRL, 216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1, 217 }, 218 { 219 .name = "SYSEN2", 220 .ctrl_addr = PALMAS_SYSEN2_CTRL, 221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2, 222 }, 223}; 224 225static struct palmas_regs_info tps65917_regs_info[] = { 226 { 227 .name = "SMPS1", 228 .sname = "smps1-in", 229 .vsel_addr = TPS65917_SMPS1_VOLTAGE, 230 .ctrl_addr = TPS65917_SMPS1_CTRL, 231 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1, 232 }, 233 { 234 .name = "SMPS2", 235 .sname = "smps2-in", 236 .vsel_addr = TPS65917_SMPS2_VOLTAGE, 237 .ctrl_addr = TPS65917_SMPS2_CTRL, 238 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2, 239 }, 240 { 241 .name = "SMPS3", 242 .sname = "smps3-in", 243 .vsel_addr = TPS65917_SMPS3_VOLTAGE, 244 .ctrl_addr = TPS65917_SMPS3_CTRL, 245 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3, 246 }, 247 { 248 .name = "SMPS4", 249 .sname = "smps4-in", 250 .vsel_addr = TPS65917_SMPS4_VOLTAGE, 251 .ctrl_addr = TPS65917_SMPS4_CTRL, 252 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4, 253 }, 254 { 255 .name = "SMPS5", 256 .sname = "smps5-in", 257 .vsel_addr = TPS65917_SMPS5_VOLTAGE, 258 .ctrl_addr = TPS65917_SMPS5_CTRL, 259 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5, 260 }, 261 { 262 .name = "SMPS12", 263 .sname = "smps1-in", 264 .vsel_addr = TPS65917_SMPS1_VOLTAGE, 265 .ctrl_addr = TPS65917_SMPS1_CTRL, 266 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12, 267 }, 268 { 269 .name = "LDO1", 270 .sname = "ldo1-in", 271 .vsel_addr = TPS65917_LDO1_VOLTAGE, 272 .ctrl_addr = TPS65917_LDO1_CTRL, 273 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1, 274 }, 275 { 276 .name = "LDO2", 277 .sname = "ldo2-in", 278 .vsel_addr = TPS65917_LDO2_VOLTAGE, 279 .ctrl_addr = TPS65917_LDO2_CTRL, 280 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2, 281 }, 282 { 283 .name = "LDO3", 284 .sname = "ldo3-in", 285 .vsel_addr = TPS65917_LDO3_VOLTAGE, 286 .ctrl_addr = TPS65917_LDO3_CTRL, 287 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3, 288 }, 289 { 290 .name = "LDO4", 291 .sname = "ldo4-in", 292 .vsel_addr = TPS65917_LDO4_VOLTAGE, 293 .ctrl_addr = TPS65917_LDO4_CTRL, 294 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4, 295 }, 296 { 297 .name = "LDO5", 298 .sname = "ldo5-in", 299 .vsel_addr = TPS65917_LDO5_VOLTAGE, 300 .ctrl_addr = TPS65917_LDO5_CTRL, 301 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5, 302 }, 303 { 304 .name = "REGEN1", 305 .ctrl_addr = TPS65917_REGEN1_CTRL, 306 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1, 307 }, 308 { 309 .name = "REGEN2", 310 .ctrl_addr = TPS65917_REGEN2_CTRL, 311 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2, 312 }, 313 { 314 .name = "REGEN3", 315 .ctrl_addr = TPS65917_REGEN3_CTRL, 316 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3, 317 }, 318}; 319 320#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ 321 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ 322 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ 323 .reg_offset = _offset, \ 324 .bit_pos = _pos, \ 325 } 326 327static struct palmas_sleep_requestor_info palma_sleep_req_info[] = { 328 EXTERNAL_REQUESTOR(REGEN1, 0, 0), 329 EXTERNAL_REQUESTOR(REGEN2, 0, 1), 330 EXTERNAL_REQUESTOR(SYSEN1, 0, 2), 331 EXTERNAL_REQUESTOR(SYSEN2, 0, 3), 332 EXTERNAL_REQUESTOR(CLK32KG, 0, 4), 333 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), 334 EXTERNAL_REQUESTOR(REGEN3, 0, 6), 335 EXTERNAL_REQUESTOR(SMPS12, 1, 0), 336 EXTERNAL_REQUESTOR(SMPS3, 1, 1), 337 EXTERNAL_REQUESTOR(SMPS45, 1, 2), 338 EXTERNAL_REQUESTOR(SMPS6, 1, 3), 339 EXTERNAL_REQUESTOR(SMPS7, 1, 4), 340 EXTERNAL_REQUESTOR(SMPS8, 1, 5), 341 EXTERNAL_REQUESTOR(SMPS9, 1, 6), 342 EXTERNAL_REQUESTOR(SMPS10, 1, 7), 343 EXTERNAL_REQUESTOR(LDO1, 2, 0), 344 EXTERNAL_REQUESTOR(LDO2, 2, 1), 345 EXTERNAL_REQUESTOR(LDO3, 2, 2), 346 EXTERNAL_REQUESTOR(LDO4, 2, 3), 347 EXTERNAL_REQUESTOR(LDO5, 2, 4), 348 EXTERNAL_REQUESTOR(LDO6, 2, 5), 349 EXTERNAL_REQUESTOR(LDO7, 2, 6), 350 EXTERNAL_REQUESTOR(LDO8, 2, 7), 351 EXTERNAL_REQUESTOR(LDO9, 3, 0), 352 EXTERNAL_REQUESTOR(LDOLN, 3, 1), 353 EXTERNAL_REQUESTOR(LDOUSB, 3, 2), 354}; 355 356#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ 357 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ 358 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ 359 .reg_offset = _offset, \ 360 .bit_pos = _pos, \ 361 } 362 363static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = { 364 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0), 365 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1), 366 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6), 367 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0), 368 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1), 369 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2), 370 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3), 371 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4), 372 EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5), 373 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0), 374 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1), 375 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2), 376 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3), 377 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4), 378}; 379 380static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; 381 382#define SMPS_CTRL_MODE_OFF 0x00 383#define SMPS_CTRL_MODE_ON 0x01 384#define SMPS_CTRL_MODE_ECO 0x02 385#define SMPS_CTRL_MODE_PWM 0x03 386 387#define PALMAS_SMPS_NUM_VOLTAGES 122 388#define PALMAS_SMPS10_NUM_VOLTAGES 2 389#define PALMAS_LDO_NUM_VOLTAGES 50 390 391#define SMPS10_VSEL (1<<3) 392#define SMPS10_BOOST_EN (1<<2) 393#define SMPS10_BYPASS_EN (1<<1) 394#define SMPS10_SWITCH_EN (1<<0) 395 396#define REGULATOR_SLAVE 0 397 398static int palmas_smps_read(struct palmas *palmas, unsigned int reg, 399 unsigned int *dest) 400{ 401 unsigned int addr; 402 403 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 404 405 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 406} 407 408static int palmas_smps_write(struct palmas *palmas, unsigned int reg, 409 unsigned int value) 410{ 411 unsigned int addr; 412 413 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 414 415 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 416} 417 418static int palmas_ldo_read(struct palmas *palmas, unsigned int reg, 419 unsigned int *dest) 420{ 421 unsigned int addr; 422 423 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 424 425 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 426} 427 428static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, 429 unsigned int value) 430{ 431 unsigned int addr; 432 433 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 434 435 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 436} 437 438static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) 439{ 440 int id = rdev_get_id(dev); 441 int ret; 442 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 443 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 444 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 445 unsigned int reg; 446 bool rail_enable = true; 447 448 ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®); 449 if (ret) 450 return ret; 451 452 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 453 454 if (reg == SMPS_CTRL_MODE_OFF) 455 rail_enable = false; 456 457 switch (mode) { 458 case REGULATOR_MODE_NORMAL: 459 reg |= SMPS_CTRL_MODE_ON; 460 break; 461 case REGULATOR_MODE_IDLE: 462 reg |= SMPS_CTRL_MODE_ECO; 463 break; 464 case REGULATOR_MODE_FAST: 465 reg |= SMPS_CTRL_MODE_PWM; 466 break; 467 default: 468 return -EINVAL; 469 } 470 471 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 472 if (rail_enable) 473 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg); 474 475 /* Switch the enable value to ensure this is used for enable */ 476 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; 477 478 return 0; 479} 480 481static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) 482{ 483 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 484 int id = rdev_get_id(dev); 485 unsigned int reg; 486 487 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 488 489 switch (reg) { 490 case SMPS_CTRL_MODE_ON: 491 return REGULATOR_MODE_NORMAL; 492 case SMPS_CTRL_MODE_ECO: 493 return REGULATOR_MODE_IDLE; 494 case SMPS_CTRL_MODE_PWM: 495 return REGULATOR_MODE_FAST; 496 } 497 498 return 0; 499} 500 501static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, 502 int ramp_delay) 503{ 504 int id = rdev_get_id(rdev); 505 struct palmas_pmic *pmic = rdev_get_drvdata(rdev); 506 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 507 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 508 unsigned int reg = 0; 509 int ret; 510 511 /* SMPS3 and SMPS7 do not have tstep_addr setting */ 512 switch (id) { 513 case PALMAS_REG_SMPS3: 514 case PALMAS_REG_SMPS7: 515 return 0; 516 } 517 518 if (ramp_delay <= 0) 519 reg = 0; 520 else if (ramp_delay <= 2500) 521 reg = 3; 522 else if (ramp_delay <= 5000) 523 reg = 2; 524 else 525 reg = 1; 526 527 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg); 528 if (ret < 0) { 529 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret); 530 return ret; 531 } 532 533 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg]; 534 return ret; 535} 536 537static const struct regulator_ops palmas_ops_smps = { 538 .is_enabled = regulator_is_enabled_regmap, 539 .enable = regulator_enable_regmap, 540 .disable = regulator_disable_regmap, 541 .set_mode = palmas_set_mode_smps, 542 .get_mode = palmas_get_mode_smps, 543 .get_voltage_sel = regulator_get_voltage_sel_regmap, 544 .set_voltage_sel = regulator_set_voltage_sel_regmap, 545 .list_voltage = regulator_list_voltage_linear_range, 546 .map_voltage = regulator_map_voltage_linear_range, 547 .set_voltage_time_sel = regulator_set_voltage_time_sel, 548 .set_ramp_delay = palmas_smps_set_ramp_delay, 549}; 550 551static const struct regulator_ops palmas_ops_ext_control_smps = { 552 .set_mode = palmas_set_mode_smps, 553 .get_mode = palmas_get_mode_smps, 554 .get_voltage_sel = regulator_get_voltage_sel_regmap, 555 .set_voltage_sel = regulator_set_voltage_sel_regmap, 556 .list_voltage = regulator_list_voltage_linear_range, 557 .map_voltage = regulator_map_voltage_linear_range, 558 .set_voltage_time_sel = regulator_set_voltage_time_sel, 559 .set_ramp_delay = palmas_smps_set_ramp_delay, 560}; 561 562static const struct regulator_ops palmas_ops_smps10 = { 563 .is_enabled = regulator_is_enabled_regmap, 564 .enable = regulator_enable_regmap, 565 .disable = regulator_disable_regmap, 566 .get_voltage_sel = regulator_get_voltage_sel_regmap, 567 .set_voltage_sel = regulator_set_voltage_sel_regmap, 568 .list_voltage = regulator_list_voltage_linear, 569 .map_voltage = regulator_map_voltage_linear, 570 .set_bypass = regulator_set_bypass_regmap, 571 .get_bypass = regulator_get_bypass_regmap, 572}; 573 574static const struct regulator_ops tps65917_ops_smps = { 575 .is_enabled = regulator_is_enabled_regmap, 576 .enable = regulator_enable_regmap, 577 .disable = regulator_disable_regmap, 578 .set_mode = palmas_set_mode_smps, 579 .get_mode = palmas_get_mode_smps, 580 .get_voltage_sel = regulator_get_voltage_sel_regmap, 581 .set_voltage_sel = regulator_set_voltage_sel_regmap, 582 .list_voltage = regulator_list_voltage_linear_range, 583 .map_voltage = regulator_map_voltage_linear_range, 584 .set_voltage_time_sel = regulator_set_voltage_time_sel, 585}; 586 587static const struct regulator_ops tps65917_ops_ext_control_smps = { 588 .set_mode = palmas_set_mode_smps, 589 .get_mode = palmas_get_mode_smps, 590 .get_voltage_sel = regulator_get_voltage_sel_regmap, 591 .set_voltage_sel = regulator_set_voltage_sel_regmap, 592 .list_voltage = regulator_list_voltage_linear_range, 593 .map_voltage = regulator_map_voltage_linear_range, 594}; 595 596static int palmas_is_enabled_ldo(struct regulator_dev *dev) 597{ 598 int id = rdev_get_id(dev); 599 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 600 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 601 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 602 unsigned int reg; 603 604 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®); 605 606 reg &= PALMAS_LDO1_CTRL_STATUS; 607 608 return !!(reg); 609} 610 611static const struct regulator_ops palmas_ops_ldo = { 612 .is_enabled = palmas_is_enabled_ldo, 613 .enable = regulator_enable_regmap, 614 .disable = regulator_disable_regmap, 615 .get_voltage_sel = regulator_get_voltage_sel_regmap, 616 .set_voltage_sel = regulator_set_voltage_sel_regmap, 617 .list_voltage = regulator_list_voltage_linear, 618 .map_voltage = regulator_map_voltage_linear, 619}; 620 621static const struct regulator_ops palmas_ops_ldo9 = { 622 .is_enabled = palmas_is_enabled_ldo, 623 .enable = regulator_enable_regmap, 624 .disable = regulator_disable_regmap, 625 .get_voltage_sel = regulator_get_voltage_sel_regmap, 626 .set_voltage_sel = regulator_set_voltage_sel_regmap, 627 .list_voltage = regulator_list_voltage_linear, 628 .map_voltage = regulator_map_voltage_linear, 629 .set_bypass = regulator_set_bypass_regmap, 630 .get_bypass = regulator_get_bypass_regmap, 631}; 632 633static const struct regulator_ops palmas_ops_ext_control_ldo = { 634 .get_voltage_sel = regulator_get_voltage_sel_regmap, 635 .set_voltage_sel = regulator_set_voltage_sel_regmap, 636 .list_voltage = regulator_list_voltage_linear, 637 .map_voltage = regulator_map_voltage_linear, 638}; 639 640static const struct regulator_ops palmas_ops_extreg = { 641 .is_enabled = regulator_is_enabled_regmap, 642 .enable = regulator_enable_regmap, 643 .disable = regulator_disable_regmap, 644}; 645 646static const struct regulator_ops palmas_ops_ext_control_extreg = { 647}; 648 649static const struct regulator_ops tps65917_ops_ldo = { 650 .is_enabled = palmas_is_enabled_ldo, 651 .enable = regulator_enable_regmap, 652 .disable = regulator_disable_regmap, 653 .get_voltage_sel = regulator_get_voltage_sel_regmap, 654 .set_voltage_sel = regulator_set_voltage_sel_regmap, 655 .list_voltage = regulator_list_voltage_linear, 656 .map_voltage = regulator_map_voltage_linear, 657 .set_voltage_time_sel = regulator_set_voltage_time_sel, 658}; 659 660static const struct regulator_ops tps65917_ops_ldo_1_2 = { 661 .is_enabled = palmas_is_enabled_ldo, 662 .enable = regulator_enable_regmap, 663 .disable = regulator_disable_regmap, 664 .get_voltage_sel = regulator_get_voltage_sel_regmap, 665 .set_voltage_sel = regulator_set_voltage_sel_regmap, 666 .list_voltage = regulator_list_voltage_linear, 667 .map_voltage = regulator_map_voltage_linear, 668 .set_voltage_time_sel = regulator_set_voltage_time_sel, 669 .set_bypass = regulator_set_bypass_regmap, 670 .get_bypass = regulator_get_bypass_regmap, 671}; 672 673static int palmas_regulator_config_external(struct palmas *palmas, int id, 674 struct palmas_reg_init *reg_init) 675{ 676 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 677 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 678 int ret; 679 680 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id, 681 reg_init->roof_floor, true); 682 if (ret < 0) 683 dev_err(palmas->dev, 684 "Ext control config for regulator %d failed %d\n", 685 id, ret); 686 return ret; 687} 688 689/* 690 * setup the hardware based sleep configuration of the SMPS/LDO regulators 691 * from the platform data. This is different to the software based control 692 * supported by the regulator framework as it is controlled by toggling 693 * pins on the PMIC such as PREQ, SYSEN, ... 694 */ 695static int palmas_smps_init(struct palmas *palmas, int id, 696 struct palmas_reg_init *reg_init) 697{ 698 unsigned int reg; 699 int ret; 700 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 701 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 702 unsigned int addr = rinfo->ctrl_addr; 703 704 ret = palmas_smps_read(palmas, addr, ®); 705 if (ret) 706 return ret; 707 708 switch (id) { 709 case PALMAS_REG_SMPS10_OUT1: 710 case PALMAS_REG_SMPS10_OUT2: 711 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK; 712 if (reg_init->mode_sleep) 713 reg |= reg_init->mode_sleep << 714 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT; 715 break; 716 default: 717 if (reg_init->warm_reset) 718 reg |= PALMAS_SMPS12_CTRL_WR_S; 719 else 720 reg &= ~PALMAS_SMPS12_CTRL_WR_S; 721 722 if (reg_init->roof_floor) 723 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 724 else 725 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 726 727 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK; 728 if (reg_init->mode_sleep) 729 reg |= reg_init->mode_sleep << 730 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT; 731 } 732 733 ret = palmas_smps_write(palmas, addr, reg); 734 if (ret) 735 return ret; 736 737 if (rinfo->vsel_addr && reg_init->vsel) { 738 739 reg = reg_init->vsel; 740 741 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg); 742 if (ret) 743 return ret; 744 } 745 746 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) && 747 (id != PALMAS_REG_SMPS10_OUT2)) { 748 /* Enable externally controlled regulator */ 749 ret = palmas_smps_read(palmas, addr, ®); 750 if (ret < 0) 751 return ret; 752 753 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) { 754 reg |= SMPS_CTRL_MODE_ON; 755 ret = palmas_smps_write(palmas, addr, reg); 756 if (ret < 0) 757 return ret; 758 } 759 return palmas_regulator_config_external(palmas, id, reg_init); 760 } 761 return 0; 762} 763 764static int palmas_ldo_init(struct palmas *palmas, int id, 765 struct palmas_reg_init *reg_init) 766{ 767 unsigned int reg; 768 unsigned int addr; 769 int ret; 770 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 771 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 772 773 addr = rinfo->ctrl_addr; 774 775 ret = palmas_ldo_read(palmas, addr, ®); 776 if (ret) 777 return ret; 778 779 if (reg_init->warm_reset) 780 reg |= PALMAS_LDO1_CTRL_WR_S; 781 else 782 reg &= ~PALMAS_LDO1_CTRL_WR_S; 783 784 if (reg_init->mode_sleep) 785 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP; 786 else 787 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP; 788 789 ret = palmas_ldo_write(palmas, addr, reg); 790 if (ret) 791 return ret; 792 793 if (reg_init->roof_floor) { 794 /* Enable externally controlled regulator */ 795 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE, 796 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE, 797 PALMAS_LDO1_CTRL_MODE_ACTIVE); 798 if (ret < 0) { 799 dev_err(palmas->dev, 800 "LDO Register 0x%02x update failed %d\n", 801 addr, ret); 802 return ret; 803 } 804 return palmas_regulator_config_external(palmas, id, reg_init); 805 } 806 return 0; 807} 808 809static int palmas_extreg_init(struct palmas *palmas, int id, 810 struct palmas_reg_init *reg_init) 811{ 812 unsigned int addr; 813 int ret; 814 unsigned int val = 0; 815 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 816 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 817 818 addr = rinfo->ctrl_addr; 819 820 if (reg_init->mode_sleep) 821 val = PALMAS_REGEN1_CTRL_MODE_SLEEP; 822 823 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 824 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val); 825 if (ret < 0) { 826 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", 827 addr, ret); 828 return ret; 829 } 830 831 if (reg_init->roof_floor) { 832 /* Enable externally controlled regulator */ 833 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 834 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE, 835 PALMAS_REGEN1_CTRL_MODE_ACTIVE); 836 if (ret < 0) { 837 dev_err(palmas->dev, 838 "Resource Register 0x%02x update failed %d\n", 839 addr, ret); 840 return ret; 841 } 842 return palmas_regulator_config_external(palmas, id, reg_init); 843 } 844 return 0; 845} 846 847static void palmas_enable_ldo8_track(struct palmas *palmas) 848{ 849 unsigned int reg; 850 unsigned int addr; 851 int ret; 852 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 853 struct palmas_regs_info *rinfo; 854 855 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8]; 856 addr = rinfo->ctrl_addr; 857 858 ret = palmas_ldo_read(palmas, addr, ®); 859 if (ret) { 860 dev_err(palmas->dev, "Error in reading ldo8 control reg\n"); 861 return; 862 } 863 864 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN; 865 ret = palmas_ldo_write(palmas, addr, reg); 866 if (ret < 0) { 867 dev_err(palmas->dev, "Error in enabling tracking mode\n"); 868 return; 869 } 870 /* 871 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8 872 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two, 873 * and can be set from 0.45 to 1.65 V. 874 */ 875 addr = rinfo->vsel_addr; 876 ret = palmas_ldo_read(palmas, addr, ®); 877 if (ret) { 878 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n"); 879 return; 880 } 881 882 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK; 883 ret = palmas_ldo_write(palmas, addr, reg); 884 if (ret < 0) 885 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n"); 886 887 return; 888} 889 890static int palmas_ldo_registration(struct palmas_pmic *pmic, 891 struct palmas_pmic_driver_data *ddata, 892 struct palmas_pmic_platform_data *pdata, 893 const char *pdev_name, 894 struct regulator_config config) 895{ 896 int id, ret; 897 struct regulator_dev *rdev; 898 struct palmas_reg_init *reg_init; 899 struct palmas_regs_info *rinfo; 900 struct regulator_desc *desc; 901 902 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 903 if (pdata && pdata->reg_init[id]) 904 reg_init = pdata->reg_init[id]; 905 else 906 reg_init = NULL; 907 908 rinfo = &ddata->palmas_regs_info[id]; 909 /* Miss out regulators which are not available due 910 * to alternate functions. 911 */ 912 913 /* Register the regulators */ 914 desc = &pmic->desc[id]; 915 desc->name = rinfo->name; 916 desc->id = id; 917 desc->type = REGULATOR_VOLTAGE; 918 desc->owner = THIS_MODULE; 919 920 if (id < PALMAS_REG_REGEN1) { 921 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 922 if (reg_init && reg_init->roof_floor) 923 desc->ops = &palmas_ops_ext_control_ldo; 924 else 925 desc->ops = &palmas_ops_ldo; 926 desc->min_uV = 900000; 927 desc->uV_step = 50000; 928 desc->linear_min_sel = 1; 929 desc->enable_time = 500; 930 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 931 rinfo->vsel_addr); 932 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 933 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 934 rinfo->ctrl_addr); 935 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 936 937 /* Check if LDO8 is in tracking mode or not */ 938 if (pdata && (id == PALMAS_REG_LDO8) && 939 pdata->enable_ldo8_tracking) { 940 palmas_enable_ldo8_track(pmic->palmas); 941 desc->min_uV = 450000; 942 desc->uV_step = 25000; 943 } 944 945 /* LOD6 in vibrator mode will have enable time 2000us */ 946 if (pdata && pdata->ldo6_vibrator && 947 (id == PALMAS_REG_LDO6)) 948 desc->enable_time = 2000; 949 950 if (id == PALMAS_REG_LDO9) { 951 desc->ops = &palmas_ops_ldo9; 952 desc->bypass_reg = desc->enable_reg; 953 desc->bypass_val_on = 954 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 955 desc->bypass_mask = 956 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 957 } 958 } else { 959 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3) 960 continue; 961 962 desc->n_voltages = 1; 963 if (reg_init && reg_init->roof_floor) 964 desc->ops = &palmas_ops_ext_control_extreg; 965 else 966 desc->ops = &palmas_ops_extreg; 967 desc->enable_reg = 968 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 969 rinfo->ctrl_addr); 970 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 971 } 972 973 if (pdata) 974 config.init_data = pdata->reg_data[id]; 975 else 976 config.init_data = NULL; 977 978 desc->supply_name = rinfo->sname; 979 config.of_node = ddata->palmas_matches[id].of_node; 980 981 rdev = devm_regulator_register(pmic->dev, desc, &config); 982 if (IS_ERR(rdev)) { 983 dev_err(pmic->dev, 984 "failed to register %s regulator\n", 985 pdev_name); 986 return PTR_ERR(rdev); 987 } 988 989 /* Initialise sleep/init values from platform data */ 990 if (pdata) { 991 reg_init = pdata->reg_init[id]; 992 if (reg_init) { 993 if (id <= ddata->ldo_end) 994 ret = palmas_ldo_init(pmic->palmas, id, 995 reg_init); 996 else 997 ret = palmas_extreg_init(pmic->palmas, 998 id, reg_init); 999 if (ret) 1000 return ret; 1001 } 1002 } 1003 } 1004 1005 return 0; 1006} 1007 1008static int tps65917_ldo_registration(struct palmas_pmic *pmic, 1009 struct palmas_pmic_driver_data *ddata, 1010 struct palmas_pmic_platform_data *pdata, 1011 const char *pdev_name, 1012 struct regulator_config config) 1013{ 1014 int id, ret; 1015 struct regulator_dev *rdev; 1016 struct palmas_reg_init *reg_init; 1017 struct palmas_regs_info *rinfo; 1018 struct regulator_desc *desc; 1019 1020 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 1021 if (pdata && pdata->reg_init[id]) 1022 reg_init = pdata->reg_init[id]; 1023 else 1024 reg_init = NULL; 1025 1026 /* Miss out regulators which are not available due 1027 * to alternate functions. 1028 */ 1029 rinfo = &ddata->palmas_regs_info[id]; 1030 1031 /* Register the regulators */ 1032 desc = &pmic->desc[id]; 1033 desc->name = rinfo->name; 1034 desc->id = id; 1035 desc->type = REGULATOR_VOLTAGE; 1036 desc->owner = THIS_MODULE; 1037 1038 if (id < TPS65917_REG_REGEN1) { 1039 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 1040 if (reg_init && reg_init->roof_floor) 1041 desc->ops = &palmas_ops_ext_control_ldo; 1042 else 1043 desc->ops = &tps65917_ops_ldo; 1044 desc->min_uV = 900000; 1045 desc->uV_step = 50000; 1046 desc->linear_min_sel = 1; 1047 desc->enable_time = 500; 1048 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1049 rinfo->vsel_addr); 1050 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 1051 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1052 rinfo->ctrl_addr); 1053 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 1054 /* 1055 * To be confirmed. Discussion on going with PMIC Team. 1056 * It is of the order of ~60mV/uS. 1057 */ 1058 desc->ramp_delay = 2500; 1059 if (id == TPS65917_REG_LDO1 || 1060 id == TPS65917_REG_LDO2) { 1061 desc->ops = &tps65917_ops_ldo_1_2; 1062 desc->bypass_reg = desc->enable_reg; 1063 desc->bypass_val_on = 1064 TPS65917_LDO1_CTRL_BYPASS_EN; 1065 desc->bypass_mask = 1066 TPS65917_LDO1_CTRL_BYPASS_EN; 1067 } 1068 } else { 1069 desc->n_voltages = 1; 1070 if (reg_init && reg_init->roof_floor) 1071 desc->ops = &palmas_ops_ext_control_extreg; 1072 else 1073 desc->ops = &palmas_ops_extreg; 1074 desc->enable_reg = 1075 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 1076 rinfo->ctrl_addr); 1077 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 1078 } 1079 1080 if (pdata) 1081 config.init_data = pdata->reg_data[id]; 1082 else 1083 config.init_data = NULL; 1084 1085 desc->supply_name = rinfo->sname; 1086 config.of_node = ddata->palmas_matches[id].of_node; 1087 1088 rdev = devm_regulator_register(pmic->dev, desc, &config); 1089 if (IS_ERR(rdev)) { 1090 dev_err(pmic->dev, 1091 "failed to register %s regulator\n", 1092 pdev_name); 1093 return PTR_ERR(rdev); 1094 } 1095 1096 /* Initialise sleep/init values from platform data */ 1097 if (pdata) { 1098 reg_init = pdata->reg_init[id]; 1099 if (reg_init) { 1100 if (id < TPS65917_REG_REGEN1) 1101 ret = palmas_ldo_init(pmic->palmas, 1102 id, reg_init); 1103 else 1104 ret = palmas_extreg_init(pmic->palmas, 1105 id, reg_init); 1106 if (ret) 1107 return ret; 1108 } 1109 } 1110 } 1111 1112 return 0; 1113} 1114 1115static int palmas_smps_registration(struct palmas_pmic *pmic, 1116 struct palmas_pmic_driver_data *ddata, 1117 struct palmas_pmic_platform_data *pdata, 1118 const char *pdev_name, 1119 struct regulator_config config) 1120{ 1121 int id, ret; 1122 unsigned int addr, reg; 1123 struct regulator_dev *rdev; 1124 struct palmas_reg_init *reg_init; 1125 struct palmas_regs_info *rinfo; 1126 struct regulator_desc *desc; 1127 1128 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1129 bool ramp_delay_support = false; 1130 1131 /* 1132 * Miss out regulators which are not available due 1133 * to slaving configurations. 1134 */ 1135 switch (id) { 1136 case PALMAS_REG_SMPS12: 1137 case PALMAS_REG_SMPS3: 1138 if (pmic->smps123) 1139 continue; 1140 if (id == PALMAS_REG_SMPS12) 1141 ramp_delay_support = true; 1142 break; 1143 case PALMAS_REG_SMPS123: 1144 if (!pmic->smps123) 1145 continue; 1146 ramp_delay_support = true; 1147 break; 1148 case PALMAS_REG_SMPS45: 1149 case PALMAS_REG_SMPS7: 1150 if (pmic->smps457) 1151 continue; 1152 if (id == PALMAS_REG_SMPS45) 1153 ramp_delay_support = true; 1154 break; 1155 case PALMAS_REG_SMPS457: 1156 if (!pmic->smps457) 1157 continue; 1158 ramp_delay_support = true; 1159 break; 1160 case PALMAS_REG_SMPS10_OUT1: 1161 case PALMAS_REG_SMPS10_OUT2: 1162 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST)) 1163 continue; 1164 } 1165 rinfo = &ddata->palmas_regs_info[id]; 1166 desc = &pmic->desc[id]; 1167 1168 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8)) 1169 ramp_delay_support = true; 1170 1171 if (ramp_delay_support) { 1172 addr = rinfo->tstep_addr; 1173 ret = palmas_smps_read(pmic->palmas, addr, ®); 1174 if (ret < 0) { 1175 dev_err(pmic->dev, 1176 "reading TSTEP reg failed: %d\n", ret); 1177 return ret; 1178 } 1179 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3]; 1180 pmic->ramp_delay[id] = desc->ramp_delay; 1181 } 1182 1183 /* Initialise sleep/init values from platform data */ 1184 if (pdata && pdata->reg_init[id]) { 1185 reg_init = pdata->reg_init[id]; 1186 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1187 if (ret) 1188 return ret; 1189 } else { 1190 reg_init = NULL; 1191 } 1192 1193 /* Register the regulators */ 1194 desc->name = rinfo->name; 1195 desc->id = id; 1196 1197 switch (id) { 1198 case PALMAS_REG_SMPS10_OUT1: 1199 case PALMAS_REG_SMPS10_OUT2: 1200 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; 1201 desc->ops = &palmas_ops_smps10; 1202 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1203 PALMAS_SMPS10_CTRL); 1204 desc->vsel_mask = SMPS10_VSEL; 1205 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1206 PALMAS_SMPS10_CTRL); 1207 if (id == PALMAS_REG_SMPS10_OUT1) 1208 desc->enable_mask = SMPS10_SWITCH_EN; 1209 else 1210 desc->enable_mask = SMPS10_BOOST_EN; 1211 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1212 PALMAS_SMPS10_CTRL); 1213 desc->bypass_val_on = SMPS10_BYPASS_EN; 1214 desc->bypass_mask = SMPS10_BYPASS_EN; 1215 desc->min_uV = 3750000; 1216 desc->uV_step = 1250000; 1217 break; 1218 default: 1219 /* 1220 * Read and store the RANGE bit for later use 1221 * This must be done before regulator is probed, 1222 * otherwise we error in probe with unsupportable 1223 * ranges. Read the current smps mode for later use. 1224 */ 1225 addr = rinfo->vsel_addr; 1226 desc->n_linear_ranges = 3; 1227 1228 ret = palmas_smps_read(pmic->palmas, addr, ®); 1229 if (ret) 1230 return ret; 1231 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) 1232 pmic->range[id] = 1; 1233 if (pmic->range[id]) 1234 desc->linear_ranges = smps_high_ranges; 1235 else 1236 desc->linear_ranges = smps_low_ranges; 1237 1238 if (reg_init && reg_init->roof_floor) 1239 desc->ops = &palmas_ops_ext_control_smps; 1240 else 1241 desc->ops = &palmas_ops_smps; 1242 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1243 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1244 rinfo->vsel_addr); 1245 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1246 1247 /* Read the smps mode for later use. */ 1248 addr = rinfo->ctrl_addr; 1249 ret = palmas_smps_read(pmic->palmas, addr, ®); 1250 if (ret) 1251 return ret; 1252 pmic->current_reg_mode[id] = reg & 1253 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1254 1255 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1256 rinfo->ctrl_addr); 1257 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1258 /* set_mode overrides this value */ 1259 desc->enable_val = SMPS_CTRL_MODE_ON; 1260 } 1261 1262 desc->type = REGULATOR_VOLTAGE; 1263 desc->owner = THIS_MODULE; 1264 1265 if (pdata) 1266 config.init_data = pdata->reg_data[id]; 1267 else 1268 config.init_data = NULL; 1269 1270 desc->supply_name = rinfo->sname; 1271 config.of_node = ddata->palmas_matches[id].of_node; 1272 1273 rdev = devm_regulator_register(pmic->dev, desc, &config); 1274 if (IS_ERR(rdev)) { 1275 dev_err(pmic->dev, 1276 "failed to register %s regulator\n", 1277 pdev_name); 1278 return PTR_ERR(rdev); 1279 } 1280 } 1281 1282 return 0; 1283} 1284 1285static int tps65917_smps_registration(struct palmas_pmic *pmic, 1286 struct palmas_pmic_driver_data *ddata, 1287 struct palmas_pmic_platform_data *pdata, 1288 const char *pdev_name, 1289 struct regulator_config config) 1290{ 1291 int id, ret; 1292 unsigned int addr, reg; 1293 struct regulator_dev *rdev; 1294 struct palmas_reg_init *reg_init; 1295 struct palmas_regs_info *rinfo; 1296 struct regulator_desc *desc; 1297 1298 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1299 /* 1300 * Miss out regulators which are not available due 1301 * to slaving configurations. 1302 */ 1303 desc = &pmic->desc[id]; 1304 desc->n_linear_ranges = 3; 1305 if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) && 1306 pmic->smps12) 1307 continue; 1308 1309 /* Initialise sleep/init values from platform data */ 1310 if (pdata && pdata->reg_init[id]) { 1311 reg_init = pdata->reg_init[id]; 1312 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1313 if (ret) 1314 return ret; 1315 } else { 1316 reg_init = NULL; 1317 } 1318 rinfo = &ddata->palmas_regs_info[id]; 1319 1320 /* Register the regulators */ 1321 desc->name = rinfo->name; 1322 desc->id = id; 1323 1324 /* 1325 * Read and store the RANGE bit for later use 1326 * This must be done before regulator is probed, 1327 * otherwise we error in probe with unsupportable 1328 * ranges. Read the current smps mode for later use. 1329 */ 1330 addr = rinfo->vsel_addr; 1331 1332 ret = palmas_smps_read(pmic->palmas, addr, ®); 1333 if (ret) 1334 return ret; 1335 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE) 1336 pmic->range[id] = 1; 1337 1338 if (pmic->range[id]) 1339 desc->linear_ranges = smps_high_ranges; 1340 else 1341 desc->linear_ranges = smps_low_ranges; 1342 1343 if (reg_init && reg_init->roof_floor) 1344 desc->ops = &tps65917_ops_ext_control_smps; 1345 else 1346 desc->ops = &tps65917_ops_smps; 1347 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1348 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1349 rinfo->vsel_addr); 1350 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1351 desc->ramp_delay = 2500; 1352 1353 /* Read the smps mode for later use. */ 1354 addr = rinfo->ctrl_addr; 1355 ret = palmas_smps_read(pmic->palmas, addr, ®); 1356 if (ret) 1357 return ret; 1358 pmic->current_reg_mode[id] = reg & 1359 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1360 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1361 rinfo->ctrl_addr); 1362 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1363 /* set_mode overrides this value */ 1364 desc->enable_val = SMPS_CTRL_MODE_ON; 1365 1366 desc->type = REGULATOR_VOLTAGE; 1367 desc->owner = THIS_MODULE; 1368 1369 if (pdata) 1370 config.init_data = pdata->reg_data[id]; 1371 else 1372 config.init_data = NULL; 1373 1374 desc->supply_name = rinfo->sname; 1375 config.of_node = ddata->palmas_matches[id].of_node; 1376 1377 rdev = devm_regulator_register(pmic->dev, desc, &config); 1378 if (IS_ERR(rdev)) { 1379 dev_err(pmic->dev, 1380 "failed to register %s regulator\n", 1381 pdev_name); 1382 return PTR_ERR(rdev); 1383 } 1384 } 1385 1386 return 0; 1387} 1388 1389static struct of_regulator_match palmas_matches[] = { 1390 { .name = "smps12", }, 1391 { .name = "smps123", }, 1392 { .name = "smps3", }, 1393 { .name = "smps45", }, 1394 { .name = "smps457", }, 1395 { .name = "smps6", }, 1396 { .name = "smps7", }, 1397 { .name = "smps8", }, 1398 { .name = "smps9", }, 1399 { .name = "smps10_out2", }, 1400 { .name = "smps10_out1", }, 1401 { .name = "ldo1", }, 1402 { .name = "ldo2", }, 1403 { .name = "ldo3", }, 1404 { .name = "ldo4", }, 1405 { .name = "ldo5", }, 1406 { .name = "ldo6", }, 1407 { .name = "ldo7", }, 1408 { .name = "ldo8", }, 1409 { .name = "ldo9", }, 1410 { .name = "ldoln", }, 1411 { .name = "ldousb", }, 1412 { .name = "regen1", }, 1413 { .name = "regen2", }, 1414 { .name = "regen3", }, 1415 { .name = "sysen1", }, 1416 { .name = "sysen2", }, 1417}; 1418 1419static struct of_regulator_match tps65917_matches[] = { 1420 { .name = "smps1", }, 1421 { .name = "smps2", }, 1422 { .name = "smps3", }, 1423 { .name = "smps4", }, 1424 { .name = "smps5", }, 1425 { .name = "smps12",}, 1426 { .name = "ldo1", }, 1427 { .name = "ldo2", }, 1428 { .name = "ldo3", }, 1429 { .name = "ldo4", }, 1430 { .name = "ldo5", }, 1431 { .name = "regen1", }, 1432 { .name = "regen2", }, 1433 { .name = "regen3", }, 1434 { .name = "sysen1", }, 1435 { .name = "sysen2", }, 1436}; 1437 1438static struct palmas_pmic_driver_data palmas_ddata = { 1439 .smps_start = PALMAS_REG_SMPS12, 1440 .smps_end = PALMAS_REG_SMPS10_OUT1, 1441 .ldo_begin = PALMAS_REG_LDO1, 1442 .ldo_end = PALMAS_REG_LDOUSB, 1443 .max_reg = PALMAS_NUM_REGS, 1444 .has_regen3 = true, 1445 .palmas_regs_info = palmas_generic_regs_info, 1446 .palmas_matches = palmas_matches, 1447 .sleep_req_info = palma_sleep_req_info, 1448 .smps_register = palmas_smps_registration, 1449 .ldo_register = palmas_ldo_registration, 1450}; 1451 1452static struct palmas_pmic_driver_data tps65917_ddata = { 1453 .smps_start = TPS65917_REG_SMPS1, 1454 .smps_end = TPS65917_REG_SMPS12, 1455 .ldo_begin = TPS65917_REG_LDO1, 1456 .ldo_end = TPS65917_REG_LDO5, 1457 .max_reg = TPS65917_NUM_REGS, 1458 .has_regen3 = true, 1459 .palmas_regs_info = tps65917_regs_info, 1460 .palmas_matches = tps65917_matches, 1461 .sleep_req_info = tps65917_sleep_req_info, 1462 .smps_register = tps65917_smps_registration, 1463 .ldo_register = tps65917_ldo_registration, 1464}; 1465 1466static int palmas_dt_to_pdata(struct device *dev, 1467 struct device_node *node, 1468 struct palmas_pmic_platform_data *pdata, 1469 struct palmas_pmic_driver_data *ddata) 1470{ 1471 struct device_node *regulators; 1472 u32 prop; 1473 int idx, ret; 1474 1475 regulators = of_get_child_by_name(node, "regulators"); 1476 if (!regulators) { 1477 dev_info(dev, "regulator node not found\n"); 1478 return 0; 1479 } 1480 1481 ret = of_regulator_match(dev, regulators, ddata->palmas_matches, 1482 ddata->max_reg); 1483 of_node_put(regulators); 1484 if (ret < 0) { 1485 dev_err(dev, "Error parsing regulator init data: %d\n", ret); 1486 return 0; 1487 } 1488 1489 for (idx = 0; idx < ddata->max_reg; idx++) { 1490 struct of_regulator_match *match; 1491 struct palmas_reg_init *rinit; 1492 struct device_node *np; 1493 1494 match = &ddata->palmas_matches[idx]; 1495 np = match->of_node; 1496 1497 if (!match->init_data || !np) 1498 continue; 1499 1500 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL); 1501 if (!rinit) 1502 return -ENOMEM; 1503 1504 pdata->reg_data[idx] = match->init_data; 1505 pdata->reg_init[idx] = rinit; 1506 1507 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset"); 1508 ret = of_property_read_u32(np, "ti,roof-floor", &prop); 1509 /* EINVAL: Property not found */ 1510 if (ret != -EINVAL) { 1511 int econtrol; 1512 1513 /* use default value, when no value is specified */ 1514 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1515 if (!ret) { 1516 switch (prop) { 1517 case 1: 1518 econtrol = PALMAS_EXT_CONTROL_ENABLE1; 1519 break; 1520 case 2: 1521 econtrol = PALMAS_EXT_CONTROL_ENABLE2; 1522 break; 1523 case 3: 1524 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1525 break; 1526 default: 1527 WARN_ON(1); 1528 dev_warn(dev, 1529 "%s: Invalid roof-floor option: %u\n", 1530 match->name, prop); 1531 break; 1532 } 1533 } 1534 rinit->roof_floor = econtrol; 1535 } 1536 1537 ret = of_property_read_u32(np, "ti,mode-sleep", &prop); 1538 if (!ret) 1539 rinit->mode_sleep = prop; 1540 1541 ret = of_property_read_bool(np, "ti,smps-range"); 1542 if (ret) 1543 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE; 1544 1545 if (idx == PALMAS_REG_LDO8) 1546 pdata->enable_ldo8_tracking = of_property_read_bool( 1547 np, "ti,enable-ldo8-tracking"); 1548 } 1549 1550 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); 1551 1552 return 0; 1553} 1554 1555static const struct of_device_id of_palmas_match_tbl[] = { 1556 { 1557 .compatible = "ti,palmas-pmic", 1558 .data = &palmas_ddata, 1559 }, 1560 { 1561 .compatible = "ti,twl6035-pmic", 1562 .data = &palmas_ddata, 1563 }, 1564 { 1565 .compatible = "ti,twl6036-pmic", 1566 .data = &palmas_ddata, 1567 }, 1568 { 1569 .compatible = "ti,twl6037-pmic", 1570 .data = &palmas_ddata, 1571 }, 1572 { 1573 .compatible = "ti,tps65913-pmic", 1574 .data = &palmas_ddata, 1575 }, 1576 { 1577 .compatible = "ti,tps65914-pmic", 1578 .data = &palmas_ddata, 1579 }, 1580 { 1581 .compatible = "ti,tps80036-pmic", 1582 .data = &palmas_ddata, 1583 }, 1584 { 1585 .compatible = "ti,tps659038-pmic", 1586 .data = &palmas_ddata, 1587 }, 1588 { 1589 .compatible = "ti,tps65917-pmic", 1590 .data = &tps65917_ddata, 1591 }, 1592 { /* end */ } 1593}; 1594 1595static int palmas_regulators_probe(struct platform_device *pdev) 1596{ 1597 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 1598 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev); 1599 struct device_node *node = pdev->dev.of_node; 1600 struct palmas_pmic_driver_data *driver_data; 1601 struct regulator_config config = { }; 1602 struct palmas_pmic *pmic; 1603 const char *pdev_name; 1604 const struct of_device_id *match; 1605 int ret = 0; 1606 unsigned int reg; 1607 1608 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev); 1609 1610 if (!match) 1611 return -ENODATA; 1612 1613 driver_data = (struct palmas_pmic_driver_data *)match->data; 1614 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1615 if (!pdata) 1616 return -ENOMEM; 1617 1618 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 1619 if (!pmic) 1620 return -ENOMEM; 1621 1622 if (of_device_is_compatible(node, "ti,tps659038-pmic")) { 1623 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr = 1624 TPS659038_REGEN2_CTRL; 1625 palmas_ddata.has_regen3 = false; 1626 } 1627 1628 pmic->dev = &pdev->dev; 1629 pmic->palmas = palmas; 1630 palmas->pmic = pmic; 1631 platform_set_drvdata(pdev, pmic); 1632 pmic->palmas->pmic_ddata = driver_data; 1633 1634 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data); 1635 if (ret) 1636 return ret; 1637 1638 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®); 1639 if (ret) 1640 return ret; 1641 1642 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) { 1643 pmic->smps123 = 1; 1644 pmic->smps12 = 1; 1645 } 1646 1647 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) 1648 pmic->smps457 = 1; 1649 1650 config.regmap = palmas->regmap[REGULATOR_SLAVE]; 1651 config.dev = &pdev->dev; 1652 config.driver_data = pmic; 1653 pdev_name = pdev->name; 1654 1655 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name, 1656 config); 1657 if (ret) 1658 return ret; 1659 1660 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name, 1661 config); 1662 1663 return ret; 1664} 1665 1666static struct platform_driver palmas_driver = { 1667 .driver = { 1668 .name = "palmas-pmic", 1669 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1670 .of_match_table = of_palmas_match_tbl, 1671 }, 1672 .probe = palmas_regulators_probe, 1673}; 1674 1675static int __init palmas_init(void) 1676{ 1677 return platform_driver_register(&palmas_driver); 1678} 1679subsys_initcall(palmas_init); 1680 1681static void __exit palmas_exit(void) 1682{ 1683 platform_driver_unregister(&palmas_driver); 1684} 1685module_exit(palmas_exit); 1686 1687MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); 1688MODULE_DESCRIPTION("Palmas voltage regulator driver"); 1689MODULE_LICENSE("GPL"); 1690MODULE_ALIAS("platform:palmas-pmic"); 1691MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); 1692