162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Expose a PWM controlled by the ChromeOS EC to the host processor. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2016 Google, Inc. 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/module.h> 962306a36Sopenharmony_ci#include <linux/of.h> 1062306a36Sopenharmony_ci#include <linux/platform_data/cros_ec_commands.h> 1162306a36Sopenharmony_ci#include <linux/platform_data/cros_ec_proto.h> 1262306a36Sopenharmony_ci#include <linux/platform_device.h> 1362306a36Sopenharmony_ci#include <linux/pwm.h> 1462306a36Sopenharmony_ci#include <linux/slab.h> 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#include <dt-bindings/mfd/cros_ec.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/** 1962306a36Sopenharmony_ci * struct cros_ec_pwm_device - Driver data for EC PWM 2062306a36Sopenharmony_ci * 2162306a36Sopenharmony_ci * @dev: Device node 2262306a36Sopenharmony_ci * @ec: Pointer to EC device 2362306a36Sopenharmony_ci * @chip: PWM controller chip 2462306a36Sopenharmony_ci * @use_pwm_type: Use PWM types instead of generic channels 2562306a36Sopenharmony_ci */ 2662306a36Sopenharmony_cistruct cros_ec_pwm_device { 2762306a36Sopenharmony_ci struct device *dev; 2862306a36Sopenharmony_ci struct cros_ec_device *ec; 2962306a36Sopenharmony_ci struct pwm_chip chip; 3062306a36Sopenharmony_ci bool use_pwm_type; 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci/** 3462306a36Sopenharmony_ci * struct cros_ec_pwm - per-PWM driver data 3562306a36Sopenharmony_ci * @duty_cycle: cached duty cycle 3662306a36Sopenharmony_ci */ 3762306a36Sopenharmony_cistruct cros_ec_pwm { 3862306a36Sopenharmony_ci u16 duty_cycle; 3962306a36Sopenharmony_ci}; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_cistatic inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *chip) 4262306a36Sopenharmony_ci{ 4362306a36Sopenharmony_ci return container_of(chip, struct cros_ec_pwm_device, chip); 4462306a36Sopenharmony_ci} 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_cistatic int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 4762306a36Sopenharmony_ci{ 4862306a36Sopenharmony_ci struct cros_ec_pwm *channel; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci channel = kzalloc(sizeof(*channel), GFP_KERNEL); 5162306a36Sopenharmony_ci if (!channel) 5262306a36Sopenharmony_ci return -ENOMEM; 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci pwm_set_chip_data(pwm, channel); 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci return 0; 5762306a36Sopenharmony_ci} 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_cistatic void cros_ec_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 6062306a36Sopenharmony_ci{ 6162306a36Sopenharmony_ci struct cros_ec_pwm *channel = pwm_get_chip_data(pwm); 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci kfree(channel); 6462306a36Sopenharmony_ci} 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_cistatic int cros_ec_dt_type_to_pwm_type(u8 dt_index, u8 *pwm_type) 6762306a36Sopenharmony_ci{ 6862306a36Sopenharmony_ci switch (dt_index) { 6962306a36Sopenharmony_ci case CROS_EC_PWM_DT_KB_LIGHT: 7062306a36Sopenharmony_ci *pwm_type = EC_PWM_TYPE_KB_LIGHT; 7162306a36Sopenharmony_ci return 0; 7262306a36Sopenharmony_ci case CROS_EC_PWM_DT_DISPLAY_LIGHT: 7362306a36Sopenharmony_ci *pwm_type = EC_PWM_TYPE_DISPLAY_LIGHT; 7462306a36Sopenharmony_ci return 0; 7562306a36Sopenharmony_ci default: 7662306a36Sopenharmony_ci return -EINVAL; 7762306a36Sopenharmony_ci } 7862306a36Sopenharmony_ci} 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_cistatic int cros_ec_pwm_set_duty(struct cros_ec_pwm_device *ec_pwm, u8 index, 8162306a36Sopenharmony_ci u16 duty) 8262306a36Sopenharmony_ci{ 8362306a36Sopenharmony_ci struct cros_ec_device *ec = ec_pwm->ec; 8462306a36Sopenharmony_ci struct { 8562306a36Sopenharmony_ci struct cros_ec_command msg; 8662306a36Sopenharmony_ci struct ec_params_pwm_set_duty params; 8762306a36Sopenharmony_ci } __packed buf; 8862306a36Sopenharmony_ci struct ec_params_pwm_set_duty *params = &buf.params; 8962306a36Sopenharmony_ci struct cros_ec_command *msg = &buf.msg; 9062306a36Sopenharmony_ci int ret; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci memset(&buf, 0, sizeof(buf)); 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ci msg->version = 0; 9562306a36Sopenharmony_ci msg->command = EC_CMD_PWM_SET_DUTY; 9662306a36Sopenharmony_ci msg->insize = 0; 9762306a36Sopenharmony_ci msg->outsize = sizeof(*params); 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci params->duty = duty; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci if (ec_pwm->use_pwm_type) { 10262306a36Sopenharmony_ci ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type); 10362306a36Sopenharmony_ci if (ret) { 10462306a36Sopenharmony_ci dev_err(ec->dev, "Invalid PWM type index: %d\n", index); 10562306a36Sopenharmony_ci return ret; 10662306a36Sopenharmony_ci } 10762306a36Sopenharmony_ci params->index = 0; 10862306a36Sopenharmony_ci } else { 10962306a36Sopenharmony_ci params->pwm_type = EC_PWM_TYPE_GENERIC; 11062306a36Sopenharmony_ci params->index = index; 11162306a36Sopenharmony_ci } 11262306a36Sopenharmony_ci 11362306a36Sopenharmony_ci return cros_ec_cmd_xfer_status(ec, msg); 11462306a36Sopenharmony_ci} 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_cistatic int cros_ec_pwm_get_duty(struct cros_ec_pwm_device *ec_pwm, u8 index) 11762306a36Sopenharmony_ci{ 11862306a36Sopenharmony_ci struct cros_ec_device *ec = ec_pwm->ec; 11962306a36Sopenharmony_ci struct { 12062306a36Sopenharmony_ci struct cros_ec_command msg; 12162306a36Sopenharmony_ci union { 12262306a36Sopenharmony_ci struct ec_params_pwm_get_duty params; 12362306a36Sopenharmony_ci struct ec_response_pwm_get_duty resp; 12462306a36Sopenharmony_ci }; 12562306a36Sopenharmony_ci } __packed buf; 12662306a36Sopenharmony_ci struct ec_params_pwm_get_duty *params = &buf.params; 12762306a36Sopenharmony_ci struct ec_response_pwm_get_duty *resp = &buf.resp; 12862306a36Sopenharmony_ci struct cros_ec_command *msg = &buf.msg; 12962306a36Sopenharmony_ci int ret; 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci memset(&buf, 0, sizeof(buf)); 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ci msg->version = 0; 13462306a36Sopenharmony_ci msg->command = EC_CMD_PWM_GET_DUTY; 13562306a36Sopenharmony_ci msg->insize = sizeof(*resp); 13662306a36Sopenharmony_ci msg->outsize = sizeof(*params); 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_ci if (ec_pwm->use_pwm_type) { 13962306a36Sopenharmony_ci ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type); 14062306a36Sopenharmony_ci if (ret) { 14162306a36Sopenharmony_ci dev_err(ec->dev, "Invalid PWM type index: %d\n", index); 14262306a36Sopenharmony_ci return ret; 14362306a36Sopenharmony_ci } 14462306a36Sopenharmony_ci params->index = 0; 14562306a36Sopenharmony_ci } else { 14662306a36Sopenharmony_ci params->pwm_type = EC_PWM_TYPE_GENERIC; 14762306a36Sopenharmony_ci params->index = index; 14862306a36Sopenharmony_ci } 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_ci ret = cros_ec_cmd_xfer_status(ec, msg); 15162306a36Sopenharmony_ci if (ret < 0) 15262306a36Sopenharmony_ci return ret; 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ci return resp->duty; 15562306a36Sopenharmony_ci} 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_cistatic int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 15862306a36Sopenharmony_ci const struct pwm_state *state) 15962306a36Sopenharmony_ci{ 16062306a36Sopenharmony_ci struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip); 16162306a36Sopenharmony_ci struct cros_ec_pwm *channel = pwm_get_chip_data(pwm); 16262306a36Sopenharmony_ci u16 duty_cycle; 16362306a36Sopenharmony_ci int ret; 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_ci /* The EC won't let us change the period */ 16662306a36Sopenharmony_ci if (state->period != EC_PWM_MAX_DUTY) 16762306a36Sopenharmony_ci return -EINVAL; 16862306a36Sopenharmony_ci 16962306a36Sopenharmony_ci if (state->polarity != PWM_POLARITY_NORMAL) 17062306a36Sopenharmony_ci return -EINVAL; 17162306a36Sopenharmony_ci 17262306a36Sopenharmony_ci /* 17362306a36Sopenharmony_ci * EC doesn't separate the concept of duty cycle and enabled, but 17462306a36Sopenharmony_ci * kernel does. Translate. 17562306a36Sopenharmony_ci */ 17662306a36Sopenharmony_ci duty_cycle = state->enabled ? state->duty_cycle : 0; 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_ci ret = cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle); 17962306a36Sopenharmony_ci if (ret < 0) 18062306a36Sopenharmony_ci return ret; 18162306a36Sopenharmony_ci 18262306a36Sopenharmony_ci channel->duty_cycle = state->duty_cycle; 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci return 0; 18562306a36Sopenharmony_ci} 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_cistatic int cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 18862306a36Sopenharmony_ci struct pwm_state *state) 18962306a36Sopenharmony_ci{ 19062306a36Sopenharmony_ci struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip); 19162306a36Sopenharmony_ci struct cros_ec_pwm *channel = pwm_get_chip_data(pwm); 19262306a36Sopenharmony_ci int ret; 19362306a36Sopenharmony_ci 19462306a36Sopenharmony_ci ret = cros_ec_pwm_get_duty(ec_pwm, pwm->hwpwm); 19562306a36Sopenharmony_ci if (ret < 0) { 19662306a36Sopenharmony_ci dev_err(chip->dev, "error getting initial duty: %d\n", ret); 19762306a36Sopenharmony_ci return ret; 19862306a36Sopenharmony_ci } 19962306a36Sopenharmony_ci 20062306a36Sopenharmony_ci state->enabled = (ret > 0); 20162306a36Sopenharmony_ci state->period = EC_PWM_MAX_DUTY; 20262306a36Sopenharmony_ci state->polarity = PWM_POLARITY_NORMAL; 20362306a36Sopenharmony_ci 20462306a36Sopenharmony_ci /* 20562306a36Sopenharmony_ci * Note that "disabled" and "duty cycle == 0" are treated the same. If 20662306a36Sopenharmony_ci * the cached duty cycle is not zero, used the cached duty cycle. This 20762306a36Sopenharmony_ci * ensures that the configured duty cycle is kept across a disable and 20862306a36Sopenharmony_ci * enable operation and avoids potentially confusing consumers. 20962306a36Sopenharmony_ci * 21062306a36Sopenharmony_ci * For the case of the initial hardware readout, channel->duty_cycle 21162306a36Sopenharmony_ci * will be 0 and the actual duty cycle read from the EC is used. 21262306a36Sopenharmony_ci */ 21362306a36Sopenharmony_ci if (ret == 0 && channel->duty_cycle > 0) 21462306a36Sopenharmony_ci state->duty_cycle = channel->duty_cycle; 21562306a36Sopenharmony_ci else 21662306a36Sopenharmony_ci state->duty_cycle = ret; 21762306a36Sopenharmony_ci 21862306a36Sopenharmony_ci return 0; 21962306a36Sopenharmony_ci} 22062306a36Sopenharmony_ci 22162306a36Sopenharmony_cistatic struct pwm_device * 22262306a36Sopenharmony_cicros_ec_pwm_xlate(struct pwm_chip *chip, const struct of_phandle_args *args) 22362306a36Sopenharmony_ci{ 22462306a36Sopenharmony_ci struct pwm_device *pwm; 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci if (args->args[0] >= chip->npwm) 22762306a36Sopenharmony_ci return ERR_PTR(-EINVAL); 22862306a36Sopenharmony_ci 22962306a36Sopenharmony_ci pwm = pwm_request_from_chip(chip, args->args[0], NULL); 23062306a36Sopenharmony_ci if (IS_ERR(pwm)) 23162306a36Sopenharmony_ci return pwm; 23262306a36Sopenharmony_ci 23362306a36Sopenharmony_ci /* The EC won't let us change the period */ 23462306a36Sopenharmony_ci pwm->args.period = EC_PWM_MAX_DUTY; 23562306a36Sopenharmony_ci 23662306a36Sopenharmony_ci return pwm; 23762306a36Sopenharmony_ci} 23862306a36Sopenharmony_ci 23962306a36Sopenharmony_cistatic const struct pwm_ops cros_ec_pwm_ops = { 24062306a36Sopenharmony_ci .request = cros_ec_pwm_request, 24162306a36Sopenharmony_ci .free = cros_ec_pwm_free, 24262306a36Sopenharmony_ci .get_state = cros_ec_pwm_get_state, 24362306a36Sopenharmony_ci .apply = cros_ec_pwm_apply, 24462306a36Sopenharmony_ci .owner = THIS_MODULE, 24562306a36Sopenharmony_ci}; 24662306a36Sopenharmony_ci 24762306a36Sopenharmony_ci/* 24862306a36Sopenharmony_ci * Determine the number of supported PWMs. The EC does not return the number 24962306a36Sopenharmony_ci * of PWMs it supports directly, so we have to read the pwm duty cycle for 25062306a36Sopenharmony_ci * subsequent channels until we get an error. 25162306a36Sopenharmony_ci */ 25262306a36Sopenharmony_cistatic int cros_ec_num_pwms(struct cros_ec_pwm_device *ec_pwm) 25362306a36Sopenharmony_ci{ 25462306a36Sopenharmony_ci int i, ret; 25562306a36Sopenharmony_ci 25662306a36Sopenharmony_ci /* The index field is only 8 bits */ 25762306a36Sopenharmony_ci for (i = 0; i <= U8_MAX; i++) { 25862306a36Sopenharmony_ci ret = cros_ec_pwm_get_duty(ec_pwm, i); 25962306a36Sopenharmony_ci /* 26062306a36Sopenharmony_ci * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM 26162306a36Sopenharmony_ci * responses; everything else is treated as an error. 26262306a36Sopenharmony_ci * The EC error codes map to -EOPNOTSUPP and -EINVAL, 26362306a36Sopenharmony_ci * so check for those. 26462306a36Sopenharmony_ci */ 26562306a36Sopenharmony_ci switch (ret) { 26662306a36Sopenharmony_ci case -EOPNOTSUPP: /* invalid command */ 26762306a36Sopenharmony_ci return -ENODEV; 26862306a36Sopenharmony_ci case -EINVAL: /* invalid parameter */ 26962306a36Sopenharmony_ci return i; 27062306a36Sopenharmony_ci default: 27162306a36Sopenharmony_ci if (ret < 0) 27262306a36Sopenharmony_ci return ret; 27362306a36Sopenharmony_ci break; 27462306a36Sopenharmony_ci } 27562306a36Sopenharmony_ci } 27662306a36Sopenharmony_ci 27762306a36Sopenharmony_ci return U8_MAX; 27862306a36Sopenharmony_ci} 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_cistatic int cros_ec_pwm_probe(struct platform_device *pdev) 28162306a36Sopenharmony_ci{ 28262306a36Sopenharmony_ci struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent); 28362306a36Sopenharmony_ci struct device *dev = &pdev->dev; 28462306a36Sopenharmony_ci struct device_node *np = pdev->dev.of_node; 28562306a36Sopenharmony_ci struct cros_ec_pwm_device *ec_pwm; 28662306a36Sopenharmony_ci struct pwm_chip *chip; 28762306a36Sopenharmony_ci int ret; 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_ci if (!ec) { 29062306a36Sopenharmony_ci dev_err(dev, "no parent EC device\n"); 29162306a36Sopenharmony_ci return -EINVAL; 29262306a36Sopenharmony_ci } 29362306a36Sopenharmony_ci 29462306a36Sopenharmony_ci ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL); 29562306a36Sopenharmony_ci if (!ec_pwm) 29662306a36Sopenharmony_ci return -ENOMEM; 29762306a36Sopenharmony_ci chip = &ec_pwm->chip; 29862306a36Sopenharmony_ci ec_pwm->ec = ec; 29962306a36Sopenharmony_ci 30062306a36Sopenharmony_ci if (of_device_is_compatible(np, "google,cros-ec-pwm-type")) 30162306a36Sopenharmony_ci ec_pwm->use_pwm_type = true; 30262306a36Sopenharmony_ci 30362306a36Sopenharmony_ci /* PWM chip */ 30462306a36Sopenharmony_ci chip->dev = dev; 30562306a36Sopenharmony_ci chip->ops = &cros_ec_pwm_ops; 30662306a36Sopenharmony_ci chip->of_xlate = cros_ec_pwm_xlate; 30762306a36Sopenharmony_ci chip->of_pwm_n_cells = 1; 30862306a36Sopenharmony_ci 30962306a36Sopenharmony_ci if (ec_pwm->use_pwm_type) { 31062306a36Sopenharmony_ci chip->npwm = CROS_EC_PWM_DT_COUNT; 31162306a36Sopenharmony_ci } else { 31262306a36Sopenharmony_ci ret = cros_ec_num_pwms(ec_pwm); 31362306a36Sopenharmony_ci if (ret < 0) { 31462306a36Sopenharmony_ci dev_err(dev, "Couldn't find PWMs: %d\n", ret); 31562306a36Sopenharmony_ci return ret; 31662306a36Sopenharmony_ci } 31762306a36Sopenharmony_ci chip->npwm = ret; 31862306a36Sopenharmony_ci } 31962306a36Sopenharmony_ci 32062306a36Sopenharmony_ci dev_dbg(dev, "Probed %u PWMs\n", chip->npwm); 32162306a36Sopenharmony_ci 32262306a36Sopenharmony_ci ret = pwmchip_add(chip); 32362306a36Sopenharmony_ci if (ret < 0) { 32462306a36Sopenharmony_ci dev_err(dev, "cannot register PWM: %d\n", ret); 32562306a36Sopenharmony_ci return ret; 32662306a36Sopenharmony_ci } 32762306a36Sopenharmony_ci 32862306a36Sopenharmony_ci platform_set_drvdata(pdev, ec_pwm); 32962306a36Sopenharmony_ci 33062306a36Sopenharmony_ci return ret; 33162306a36Sopenharmony_ci} 33262306a36Sopenharmony_ci 33362306a36Sopenharmony_cistatic void cros_ec_pwm_remove(struct platform_device *dev) 33462306a36Sopenharmony_ci{ 33562306a36Sopenharmony_ci struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev); 33662306a36Sopenharmony_ci struct pwm_chip *chip = &ec_pwm->chip; 33762306a36Sopenharmony_ci 33862306a36Sopenharmony_ci pwmchip_remove(chip); 33962306a36Sopenharmony_ci} 34062306a36Sopenharmony_ci 34162306a36Sopenharmony_ci#ifdef CONFIG_OF 34262306a36Sopenharmony_cistatic const struct of_device_id cros_ec_pwm_of_match[] = { 34362306a36Sopenharmony_ci { .compatible = "google,cros-ec-pwm" }, 34462306a36Sopenharmony_ci { .compatible = "google,cros-ec-pwm-type" }, 34562306a36Sopenharmony_ci {}, 34662306a36Sopenharmony_ci}; 34762306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match); 34862306a36Sopenharmony_ci#endif 34962306a36Sopenharmony_ci 35062306a36Sopenharmony_cistatic struct platform_driver cros_ec_pwm_driver = { 35162306a36Sopenharmony_ci .probe = cros_ec_pwm_probe, 35262306a36Sopenharmony_ci .remove_new = cros_ec_pwm_remove, 35362306a36Sopenharmony_ci .driver = { 35462306a36Sopenharmony_ci .name = "cros-ec-pwm", 35562306a36Sopenharmony_ci .of_match_table = of_match_ptr(cros_ec_pwm_of_match), 35662306a36Sopenharmony_ci }, 35762306a36Sopenharmony_ci}; 35862306a36Sopenharmony_cimodule_platform_driver(cros_ec_pwm_driver); 35962306a36Sopenharmony_ci 36062306a36Sopenharmony_ciMODULE_ALIAS("platform:cros-ec-pwm"); 36162306a36Sopenharmony_ciMODULE_DESCRIPTION("ChromeOS EC PWM driver"); 36262306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 363