162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Renesas RZ/G2E System Controller
462306a36Sopenharmony_ci * Copyright (C) 2018 Renesas Electronics Corp.
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Based on Renesas R-Car E3 System Controller
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#include <linux/bits.h>
1062306a36Sopenharmony_ci#include <linux/kernel.h>
1162306a36Sopenharmony_ci#include <linux/sys_soc.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include <dt-bindings/power/r8a774c0-sysc.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#include "rcar-sysc.h"
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_cistatic struct rcar_sysc_area r8a774c0_areas[] __initdata = {
1862306a36Sopenharmony_ci	{ "always-on",	    0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
1962306a36Sopenharmony_ci	{ "ca53-scu",	0x140, 0, R8A774C0_PD_CA53_SCU,  R8A774C0_PD_ALWAYS_ON,
2062306a36Sopenharmony_ci	  PD_SCU },
2162306a36Sopenharmony_ci	{ "ca53-cpu0",	0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
2262306a36Sopenharmony_ci	  PD_CPU_NOCR },
2362306a36Sopenharmony_ci	{ "ca53-cpu1",	0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
2462306a36Sopenharmony_ci	  PD_CPU_NOCR },
2562306a36Sopenharmony_ci	{ "a3vc",	0x380, 0, R8A774C0_PD_A3VC,	R8A774C0_PD_ALWAYS_ON },
2662306a36Sopenharmony_ci	{ "a2vc1",	0x3c0, 1, R8A774C0_PD_A2VC1,	R8A774C0_PD_A3VC },
2762306a36Sopenharmony_ci	{ "3dg-a",	0x100, 0, R8A774C0_PD_3DG_A,	R8A774C0_PD_ALWAYS_ON },
2862306a36Sopenharmony_ci	{ "3dg-b",	0x100, 1, R8A774C0_PD_3DG_B,	R8A774C0_PD_3DG_A },
2962306a36Sopenharmony_ci};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci/* Fixups for RZ/G2E ES1.0 revision */
3262306a36Sopenharmony_cistatic const struct soc_device_attribute r8a774c0[] __initconst = {
3362306a36Sopenharmony_ci	{ .soc_id = "r8a774c0", .revision = "ES1.0" },
3462306a36Sopenharmony_ci	{ /* sentinel */ }
3562306a36Sopenharmony_ci};
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_cistatic int __init r8a774c0_sysc_init(void)
3862306a36Sopenharmony_ci{
3962306a36Sopenharmony_ci	if (soc_device_match(r8a774c0)) {
4062306a36Sopenharmony_ci		/* Fix incorrect 3DG hierarchy */
4162306a36Sopenharmony_ci		swap(r8a774c0_areas[6], r8a774c0_areas[7]);
4262306a36Sopenharmony_ci		r8a774c0_areas[6].parent = R8A774C0_PD_ALWAYS_ON;
4362306a36Sopenharmony_ci		r8a774c0_areas[7].parent = R8A774C0_PD_3DG_B;
4462306a36Sopenharmony_ci	}
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci	return 0;
4762306a36Sopenharmony_ci}
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ciconst struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
5062306a36Sopenharmony_ci	.init = r8a774c0_sysc_init,
5162306a36Sopenharmony_ci	.areas = r8a774c0_areas,
5262306a36Sopenharmony_ci	.num_areas = ARRAY_SIZE(r8a774c0_areas),
5362306a36Sopenharmony_ci	.extmask_offs = 0x2f8,
5462306a36Sopenharmony_ci	.extmask_val = BIT(0),
5562306a36Sopenharmony_ci};
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