162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Driver for the ST Microelectronics SPEAr310 pinmux 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2012 ST Microelectronics 562306a36Sopenharmony_ci * Viresh Kumar <vireshk@kernel.org> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 862306a36Sopenharmony_ci * License version 2. This program is licensed "as is" without any 962306a36Sopenharmony_ci * warranty of any kind, whether express or implied. 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <linux/err.h> 1362306a36Sopenharmony_ci#include <linux/init.h> 1462306a36Sopenharmony_ci#include <linux/mod_devicetable.h> 1562306a36Sopenharmony_ci#include <linux/platform_device.h> 1662306a36Sopenharmony_ci#include "pinctrl-spear3xx.h" 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#define DRIVER_NAME "spear310-pinmux" 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* addresses */ 2162306a36Sopenharmony_ci#define PMX_CONFIG_REG 0x08 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci/* emi_cs_0_to_5_pins */ 2462306a36Sopenharmony_cistatic const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 }; 2562306a36Sopenharmony_cistatic struct spear_muxreg emi_cs_0_to_5_muxreg[] = { 2662306a36Sopenharmony_ci { 2762306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 2862306a36Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, 2962306a36Sopenharmony_ci .val = 0, 3062306a36Sopenharmony_ci }, 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic struct spear_modemux emi_cs_0_to_5_modemux[] = { 3462306a36Sopenharmony_ci { 3562306a36Sopenharmony_ci .muxregs = emi_cs_0_to_5_muxreg, 3662306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg), 3762306a36Sopenharmony_ci }, 3862306a36Sopenharmony_ci}; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cistatic struct spear_pingroup emi_cs_0_to_5_pingroup = { 4162306a36Sopenharmony_ci .name = "emi_cs_0_to_5_grp", 4262306a36Sopenharmony_ci .pins = emi_cs_0_to_5_pins, 4362306a36Sopenharmony_ci .npins = ARRAY_SIZE(emi_cs_0_to_5_pins), 4462306a36Sopenharmony_ci .modemuxs = emi_cs_0_to_5_modemux, 4562306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux), 4662306a36Sopenharmony_ci}; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cistatic const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" }; 4962306a36Sopenharmony_cistatic struct spear_function emi_cs_0_to_5_function = { 5062306a36Sopenharmony_ci .name = "emi", 5162306a36Sopenharmony_ci .groups = emi_cs_0_to_5_grps, 5262306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps), 5362306a36Sopenharmony_ci}; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* uart1_pins */ 5662306a36Sopenharmony_cistatic const unsigned uart1_pins[] = { 0, 1 }; 5762306a36Sopenharmony_cistatic struct spear_muxreg uart1_muxreg[] = { 5862306a36Sopenharmony_ci { 5962306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 6062306a36Sopenharmony_ci .mask = PMX_FIRDA_MASK, 6162306a36Sopenharmony_ci .val = 0, 6262306a36Sopenharmony_ci }, 6362306a36Sopenharmony_ci}; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_cistatic struct spear_modemux uart1_modemux[] = { 6662306a36Sopenharmony_ci { 6762306a36Sopenharmony_ci .muxregs = uart1_muxreg, 6862306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(uart1_muxreg), 6962306a36Sopenharmony_ci }, 7062306a36Sopenharmony_ci}; 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_cistatic struct spear_pingroup uart1_pingroup = { 7362306a36Sopenharmony_ci .name = "uart1_grp", 7462306a36Sopenharmony_ci .pins = uart1_pins, 7562306a36Sopenharmony_ci .npins = ARRAY_SIZE(uart1_pins), 7662306a36Sopenharmony_ci .modemuxs = uart1_modemux, 7762306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(uart1_modemux), 7862306a36Sopenharmony_ci}; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_cistatic const char *const uart1_grps[] = { "uart1_grp" }; 8162306a36Sopenharmony_cistatic struct spear_function uart1_function = { 8262306a36Sopenharmony_ci .name = "uart1", 8362306a36Sopenharmony_ci .groups = uart1_grps, 8462306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(uart1_grps), 8562306a36Sopenharmony_ci}; 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci/* uart2_pins */ 8862306a36Sopenharmony_cistatic const unsigned uart2_pins[] = { 43, 44 }; 8962306a36Sopenharmony_cistatic struct spear_muxreg uart2_muxreg[] = { 9062306a36Sopenharmony_ci { 9162306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 9262306a36Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK, 9362306a36Sopenharmony_ci .val = 0, 9462306a36Sopenharmony_ci }, 9562306a36Sopenharmony_ci}; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_cistatic struct spear_modemux uart2_modemux[] = { 9862306a36Sopenharmony_ci { 9962306a36Sopenharmony_ci .muxregs = uart2_muxreg, 10062306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(uart2_muxreg), 10162306a36Sopenharmony_ci }, 10262306a36Sopenharmony_ci}; 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_cistatic struct spear_pingroup uart2_pingroup = { 10562306a36Sopenharmony_ci .name = "uart2_grp", 10662306a36Sopenharmony_ci .pins = uart2_pins, 10762306a36Sopenharmony_ci .npins = ARRAY_SIZE(uart2_pins), 10862306a36Sopenharmony_ci .modemuxs = uart2_modemux, 10962306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(uart2_modemux), 11062306a36Sopenharmony_ci}; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_cistatic const char *const uart2_grps[] = { "uart2_grp" }; 11362306a36Sopenharmony_cistatic struct spear_function uart2_function = { 11462306a36Sopenharmony_ci .name = "uart2", 11562306a36Sopenharmony_ci .groups = uart2_grps, 11662306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(uart2_grps), 11762306a36Sopenharmony_ci}; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci/* uart3_pins */ 12062306a36Sopenharmony_cistatic const unsigned uart3_pins[] = { 37, 38 }; 12162306a36Sopenharmony_cistatic struct spear_muxreg uart3_muxreg[] = { 12262306a36Sopenharmony_ci { 12362306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 12462306a36Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK, 12562306a36Sopenharmony_ci .val = 0, 12662306a36Sopenharmony_ci }, 12762306a36Sopenharmony_ci}; 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_cistatic struct spear_modemux uart3_modemux[] = { 13062306a36Sopenharmony_ci { 13162306a36Sopenharmony_ci .muxregs = uart3_muxreg, 13262306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(uart3_muxreg), 13362306a36Sopenharmony_ci }, 13462306a36Sopenharmony_ci}; 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_cistatic struct spear_pingroup uart3_pingroup = { 13762306a36Sopenharmony_ci .name = "uart3_grp", 13862306a36Sopenharmony_ci .pins = uart3_pins, 13962306a36Sopenharmony_ci .npins = ARRAY_SIZE(uart3_pins), 14062306a36Sopenharmony_ci .modemuxs = uart3_modemux, 14162306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(uart3_modemux), 14262306a36Sopenharmony_ci}; 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_cistatic const char *const uart3_grps[] = { "uart3_grp" }; 14562306a36Sopenharmony_cistatic struct spear_function uart3_function = { 14662306a36Sopenharmony_ci .name = "uart3", 14762306a36Sopenharmony_ci .groups = uart3_grps, 14862306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(uart3_grps), 14962306a36Sopenharmony_ci}; 15062306a36Sopenharmony_ci 15162306a36Sopenharmony_ci/* uart4_pins */ 15262306a36Sopenharmony_cistatic const unsigned uart4_pins[] = { 39, 40 }; 15362306a36Sopenharmony_cistatic struct spear_muxreg uart4_muxreg[] = { 15462306a36Sopenharmony_ci { 15562306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 15662306a36Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK, 15762306a36Sopenharmony_ci .val = 0, 15862306a36Sopenharmony_ci }, 15962306a36Sopenharmony_ci}; 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_cistatic struct spear_modemux uart4_modemux[] = { 16262306a36Sopenharmony_ci { 16362306a36Sopenharmony_ci .muxregs = uart4_muxreg, 16462306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(uart4_muxreg), 16562306a36Sopenharmony_ci }, 16662306a36Sopenharmony_ci}; 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_cistatic struct spear_pingroup uart4_pingroup = { 16962306a36Sopenharmony_ci .name = "uart4_grp", 17062306a36Sopenharmony_ci .pins = uart4_pins, 17162306a36Sopenharmony_ci .npins = ARRAY_SIZE(uart4_pins), 17262306a36Sopenharmony_ci .modemuxs = uart4_modemux, 17362306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(uart4_modemux), 17462306a36Sopenharmony_ci}; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_cistatic const char *const uart4_grps[] = { "uart4_grp" }; 17762306a36Sopenharmony_cistatic struct spear_function uart4_function = { 17862306a36Sopenharmony_ci .name = "uart4", 17962306a36Sopenharmony_ci .groups = uart4_grps, 18062306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(uart4_grps), 18162306a36Sopenharmony_ci}; 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ci/* uart5_pins */ 18462306a36Sopenharmony_cistatic const unsigned uart5_pins[] = { 41, 42 }; 18562306a36Sopenharmony_cistatic struct spear_muxreg uart5_muxreg[] = { 18662306a36Sopenharmony_ci { 18762306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 18862306a36Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK, 18962306a36Sopenharmony_ci .val = 0, 19062306a36Sopenharmony_ci }, 19162306a36Sopenharmony_ci}; 19262306a36Sopenharmony_ci 19362306a36Sopenharmony_cistatic struct spear_modemux uart5_modemux[] = { 19462306a36Sopenharmony_ci { 19562306a36Sopenharmony_ci .muxregs = uart5_muxreg, 19662306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(uart5_muxreg), 19762306a36Sopenharmony_ci }, 19862306a36Sopenharmony_ci}; 19962306a36Sopenharmony_ci 20062306a36Sopenharmony_cistatic struct spear_pingroup uart5_pingroup = { 20162306a36Sopenharmony_ci .name = "uart5_grp", 20262306a36Sopenharmony_ci .pins = uart5_pins, 20362306a36Sopenharmony_ci .npins = ARRAY_SIZE(uart5_pins), 20462306a36Sopenharmony_ci .modemuxs = uart5_modemux, 20562306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(uart5_modemux), 20662306a36Sopenharmony_ci}; 20762306a36Sopenharmony_ci 20862306a36Sopenharmony_cistatic const char *const uart5_grps[] = { "uart5_grp" }; 20962306a36Sopenharmony_cistatic struct spear_function uart5_function = { 21062306a36Sopenharmony_ci .name = "uart5", 21162306a36Sopenharmony_ci .groups = uart5_grps, 21262306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(uart5_grps), 21362306a36Sopenharmony_ci}; 21462306a36Sopenharmony_ci 21562306a36Sopenharmony_ci/* fsmc_pins */ 21662306a36Sopenharmony_cistatic const unsigned fsmc_pins[] = { 34, 35, 36 }; 21762306a36Sopenharmony_cistatic struct spear_muxreg fsmc_muxreg[] = { 21862306a36Sopenharmony_ci { 21962306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 22062306a36Sopenharmony_ci .mask = PMX_SSP_CS_MASK, 22162306a36Sopenharmony_ci .val = 0, 22262306a36Sopenharmony_ci }, 22362306a36Sopenharmony_ci}; 22462306a36Sopenharmony_ci 22562306a36Sopenharmony_cistatic struct spear_modemux fsmc_modemux[] = { 22662306a36Sopenharmony_ci { 22762306a36Sopenharmony_ci .muxregs = fsmc_muxreg, 22862306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(fsmc_muxreg), 22962306a36Sopenharmony_ci }, 23062306a36Sopenharmony_ci}; 23162306a36Sopenharmony_ci 23262306a36Sopenharmony_cistatic struct spear_pingroup fsmc_pingroup = { 23362306a36Sopenharmony_ci .name = "fsmc_grp", 23462306a36Sopenharmony_ci .pins = fsmc_pins, 23562306a36Sopenharmony_ci .npins = ARRAY_SIZE(fsmc_pins), 23662306a36Sopenharmony_ci .modemuxs = fsmc_modemux, 23762306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(fsmc_modemux), 23862306a36Sopenharmony_ci}; 23962306a36Sopenharmony_ci 24062306a36Sopenharmony_cistatic const char *const fsmc_grps[] = { "fsmc_grp" }; 24162306a36Sopenharmony_cistatic struct spear_function fsmc_function = { 24262306a36Sopenharmony_ci .name = "fsmc", 24362306a36Sopenharmony_ci .groups = fsmc_grps, 24462306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(fsmc_grps), 24562306a36Sopenharmony_ci}; 24662306a36Sopenharmony_ci 24762306a36Sopenharmony_ci/* rs485_0_pins */ 24862306a36Sopenharmony_cistatic const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 }; 24962306a36Sopenharmony_cistatic struct spear_muxreg rs485_0_muxreg[] = { 25062306a36Sopenharmony_ci { 25162306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 25262306a36Sopenharmony_ci .mask = PMX_MII_MASK, 25362306a36Sopenharmony_ci .val = 0, 25462306a36Sopenharmony_ci }, 25562306a36Sopenharmony_ci}; 25662306a36Sopenharmony_ci 25762306a36Sopenharmony_cistatic struct spear_modemux rs485_0_modemux[] = { 25862306a36Sopenharmony_ci { 25962306a36Sopenharmony_ci .muxregs = rs485_0_muxreg, 26062306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(rs485_0_muxreg), 26162306a36Sopenharmony_ci }, 26262306a36Sopenharmony_ci}; 26362306a36Sopenharmony_ci 26462306a36Sopenharmony_cistatic struct spear_pingroup rs485_0_pingroup = { 26562306a36Sopenharmony_ci .name = "rs485_0_grp", 26662306a36Sopenharmony_ci .pins = rs485_0_pins, 26762306a36Sopenharmony_ci .npins = ARRAY_SIZE(rs485_0_pins), 26862306a36Sopenharmony_ci .modemuxs = rs485_0_modemux, 26962306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(rs485_0_modemux), 27062306a36Sopenharmony_ci}; 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_cistatic const char *const rs485_0_grps[] = { "rs485_0" }; 27362306a36Sopenharmony_cistatic struct spear_function rs485_0_function = { 27462306a36Sopenharmony_ci .name = "rs485_0", 27562306a36Sopenharmony_ci .groups = rs485_0_grps, 27662306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(rs485_0_grps), 27762306a36Sopenharmony_ci}; 27862306a36Sopenharmony_ci 27962306a36Sopenharmony_ci/* rs485_1_pins */ 28062306a36Sopenharmony_cistatic const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 }; 28162306a36Sopenharmony_cistatic struct spear_muxreg rs485_1_muxreg[] = { 28262306a36Sopenharmony_ci { 28362306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 28462306a36Sopenharmony_ci .mask = PMX_MII_MASK, 28562306a36Sopenharmony_ci .val = 0, 28662306a36Sopenharmony_ci }, 28762306a36Sopenharmony_ci}; 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_cistatic struct spear_modemux rs485_1_modemux[] = { 29062306a36Sopenharmony_ci { 29162306a36Sopenharmony_ci .muxregs = rs485_1_muxreg, 29262306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(rs485_1_muxreg), 29362306a36Sopenharmony_ci }, 29462306a36Sopenharmony_ci}; 29562306a36Sopenharmony_ci 29662306a36Sopenharmony_cistatic struct spear_pingroup rs485_1_pingroup = { 29762306a36Sopenharmony_ci .name = "rs485_1_grp", 29862306a36Sopenharmony_ci .pins = rs485_1_pins, 29962306a36Sopenharmony_ci .npins = ARRAY_SIZE(rs485_1_pins), 30062306a36Sopenharmony_ci .modemuxs = rs485_1_modemux, 30162306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(rs485_1_modemux), 30262306a36Sopenharmony_ci}; 30362306a36Sopenharmony_ci 30462306a36Sopenharmony_cistatic const char *const rs485_1_grps[] = { "rs485_1" }; 30562306a36Sopenharmony_cistatic struct spear_function rs485_1_function = { 30662306a36Sopenharmony_ci .name = "rs485_1", 30762306a36Sopenharmony_ci .groups = rs485_1_grps, 30862306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(rs485_1_grps), 30962306a36Sopenharmony_ci}; 31062306a36Sopenharmony_ci 31162306a36Sopenharmony_ci/* tdm_pins */ 31262306a36Sopenharmony_cistatic const unsigned tdm_pins[] = { 10, 11, 12, 13 }; 31362306a36Sopenharmony_cistatic struct spear_muxreg tdm_muxreg[] = { 31462306a36Sopenharmony_ci { 31562306a36Sopenharmony_ci .reg = PMX_CONFIG_REG, 31662306a36Sopenharmony_ci .mask = PMX_MII_MASK, 31762306a36Sopenharmony_ci .val = 0, 31862306a36Sopenharmony_ci }, 31962306a36Sopenharmony_ci}; 32062306a36Sopenharmony_ci 32162306a36Sopenharmony_cistatic struct spear_modemux tdm_modemux[] = { 32262306a36Sopenharmony_ci { 32362306a36Sopenharmony_ci .muxregs = tdm_muxreg, 32462306a36Sopenharmony_ci .nmuxregs = ARRAY_SIZE(tdm_muxreg), 32562306a36Sopenharmony_ci }, 32662306a36Sopenharmony_ci}; 32762306a36Sopenharmony_ci 32862306a36Sopenharmony_cistatic struct spear_pingroup tdm_pingroup = { 32962306a36Sopenharmony_ci .name = "tdm_grp", 33062306a36Sopenharmony_ci .pins = tdm_pins, 33162306a36Sopenharmony_ci .npins = ARRAY_SIZE(tdm_pins), 33262306a36Sopenharmony_ci .modemuxs = tdm_modemux, 33362306a36Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(tdm_modemux), 33462306a36Sopenharmony_ci}; 33562306a36Sopenharmony_ci 33662306a36Sopenharmony_cistatic const char *const tdm_grps[] = { "tdm_grp" }; 33762306a36Sopenharmony_cistatic struct spear_function tdm_function = { 33862306a36Sopenharmony_ci .name = "tdm", 33962306a36Sopenharmony_ci .groups = tdm_grps, 34062306a36Sopenharmony_ci .ngroups = ARRAY_SIZE(tdm_grps), 34162306a36Sopenharmony_ci}; 34262306a36Sopenharmony_ci 34362306a36Sopenharmony_ci/* pingroups */ 34462306a36Sopenharmony_cistatic struct spear_pingroup *spear310_pingroups[] = { 34562306a36Sopenharmony_ci SPEAR3XX_COMMON_PINGROUPS, 34662306a36Sopenharmony_ci &emi_cs_0_to_5_pingroup, 34762306a36Sopenharmony_ci &uart1_pingroup, 34862306a36Sopenharmony_ci &uart2_pingroup, 34962306a36Sopenharmony_ci &uart3_pingroup, 35062306a36Sopenharmony_ci &uart4_pingroup, 35162306a36Sopenharmony_ci &uart5_pingroup, 35262306a36Sopenharmony_ci &fsmc_pingroup, 35362306a36Sopenharmony_ci &rs485_0_pingroup, 35462306a36Sopenharmony_ci &rs485_1_pingroup, 35562306a36Sopenharmony_ci &tdm_pingroup, 35662306a36Sopenharmony_ci}; 35762306a36Sopenharmony_ci 35862306a36Sopenharmony_ci/* functions */ 35962306a36Sopenharmony_cistatic struct spear_function *spear310_functions[] = { 36062306a36Sopenharmony_ci SPEAR3XX_COMMON_FUNCTIONS, 36162306a36Sopenharmony_ci &emi_cs_0_to_5_function, 36262306a36Sopenharmony_ci &uart1_function, 36362306a36Sopenharmony_ci &uart2_function, 36462306a36Sopenharmony_ci &uart3_function, 36562306a36Sopenharmony_ci &uart4_function, 36662306a36Sopenharmony_ci &uart5_function, 36762306a36Sopenharmony_ci &fsmc_function, 36862306a36Sopenharmony_ci &rs485_0_function, 36962306a36Sopenharmony_ci &rs485_1_function, 37062306a36Sopenharmony_ci &tdm_function, 37162306a36Sopenharmony_ci}; 37262306a36Sopenharmony_ci 37362306a36Sopenharmony_cistatic const struct of_device_id spear310_pinctrl_of_match[] = { 37462306a36Sopenharmony_ci { 37562306a36Sopenharmony_ci .compatible = "st,spear310-pinmux", 37662306a36Sopenharmony_ci }, 37762306a36Sopenharmony_ci {}, 37862306a36Sopenharmony_ci}; 37962306a36Sopenharmony_ci 38062306a36Sopenharmony_cistatic int spear310_pinctrl_probe(struct platform_device *pdev) 38162306a36Sopenharmony_ci{ 38262306a36Sopenharmony_ci spear3xx_machdata.groups = spear310_pingroups; 38362306a36Sopenharmony_ci spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups); 38462306a36Sopenharmony_ci spear3xx_machdata.functions = spear310_functions; 38562306a36Sopenharmony_ci spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions); 38662306a36Sopenharmony_ci 38762306a36Sopenharmony_ci pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG); 38862306a36Sopenharmony_ci pmx_init_gpio_pingroup_addr(spear3xx_machdata.gpio_pingroups, 38962306a36Sopenharmony_ci spear3xx_machdata.ngpio_pingroups, PMX_CONFIG_REG); 39062306a36Sopenharmony_ci 39162306a36Sopenharmony_ci spear3xx_machdata.modes_supported = false; 39262306a36Sopenharmony_ci 39362306a36Sopenharmony_ci return spear_pinctrl_probe(pdev, &spear3xx_machdata); 39462306a36Sopenharmony_ci} 39562306a36Sopenharmony_ci 39662306a36Sopenharmony_cistatic struct platform_driver spear310_pinctrl_driver = { 39762306a36Sopenharmony_ci .driver = { 39862306a36Sopenharmony_ci .name = DRIVER_NAME, 39962306a36Sopenharmony_ci .of_match_table = spear310_pinctrl_of_match, 40062306a36Sopenharmony_ci }, 40162306a36Sopenharmony_ci .probe = spear310_pinctrl_probe, 40262306a36Sopenharmony_ci}; 40362306a36Sopenharmony_ci 40462306a36Sopenharmony_cistatic int __init spear310_pinctrl_init(void) 40562306a36Sopenharmony_ci{ 40662306a36Sopenharmony_ci return platform_driver_register(&spear310_pinctrl_driver); 40762306a36Sopenharmony_ci} 40862306a36Sopenharmony_ciarch_initcall(spear310_pinctrl_init); 409