162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef PINCTRL_PINCTRL_ABx500_H 362306a36Sopenharmony_ci#define PINCTRL_PINCTRL_ABx500_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#include <linux/types.h> 662306a36Sopenharmony_ci 762306a36Sopenharmony_cistruct pinctrl_pin_desc; 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/* Package definitions */ 1062306a36Sopenharmony_ci#define PINCTRL_AB8500 0 1162306a36Sopenharmony_ci#define PINCTRL_AB8505 1 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/* pins alternate function */ 1462306a36Sopenharmony_cienum abx500_pin_func { 1562306a36Sopenharmony_ci ABX500_DEFAULT, 1662306a36Sopenharmony_ci ABX500_ALT_A, 1762306a36Sopenharmony_ci ABX500_ALT_B, 1862306a36Sopenharmony_ci ABX500_ALT_C, 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cienum abx500_gpio_pull_updown { 2262306a36Sopenharmony_ci ABX500_GPIO_PULL_DOWN = 0x0, 2362306a36Sopenharmony_ci ABX500_GPIO_PULL_NONE = 0x1, 2462306a36Sopenharmony_ci ABX500_GPIO_PULL_UP = 0x3, 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_cienum abx500_gpio_vinsel { 2862306a36Sopenharmony_ci ABX500_GPIO_VINSEL_VBAT = 0x0, 2962306a36Sopenharmony_ci ABX500_GPIO_VINSEL_VIN_1V8 = 0x1, 3062306a36Sopenharmony_ci ABX500_GPIO_VINSEL_VDD_BIF = 0x2, 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci/** 3462306a36Sopenharmony_ci * struct abx500_function - ABx500 pinctrl mux function 3562306a36Sopenharmony_ci * @name: The name of the function, exported to pinctrl core. 3662306a36Sopenharmony_ci * @groups: An array of pin groups that may select this function. 3762306a36Sopenharmony_ci * @ngroups: The number of entries in @groups. 3862306a36Sopenharmony_ci */ 3962306a36Sopenharmony_cistruct abx500_function { 4062306a36Sopenharmony_ci const char *name; 4162306a36Sopenharmony_ci const char * const *groups; 4262306a36Sopenharmony_ci unsigned ngroups; 4362306a36Sopenharmony_ci}; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci/** 4662306a36Sopenharmony_ci * struct abx500_pingroup - describes a ABx500 pin group 4762306a36Sopenharmony_ci * @name: the name of this specific pin group 4862306a36Sopenharmony_ci * @pins: an array of discrete physical pins used in this group, taken 4962306a36Sopenharmony_ci * from the driver-local pin enumeration space 5062306a36Sopenharmony_ci * @num_pins: the number of pins in this group array, i.e. the number of 5162306a36Sopenharmony_ci * elements in .pins so we can iterate over that array 5262306a36Sopenharmony_ci * @altsetting: the altsetting to apply to all pins in this group to 5362306a36Sopenharmony_ci * configure them to be used by a function 5462306a36Sopenharmony_ci */ 5562306a36Sopenharmony_cistruct abx500_pingroup { 5662306a36Sopenharmony_ci const char *name; 5762306a36Sopenharmony_ci const unsigned int *pins; 5862306a36Sopenharmony_ci const unsigned npins; 5962306a36Sopenharmony_ci int altsetting; 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci#define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \ 6362306a36Sopenharmony_ci{ \ 6462306a36Sopenharmony_ci .pin_number = pin, \ 6562306a36Sopenharmony_ci .gpiosel_bit = sel_bit, \ 6662306a36Sopenharmony_ci .alt_bit1 = alt1, \ 6762306a36Sopenharmony_ci .alt_bit2 = alt2, \ 6862306a36Sopenharmony_ci .alta_val = alta, \ 6962306a36Sopenharmony_ci .altb_val = altb, \ 7062306a36Sopenharmony_ci .altc_val = altc, \ 7162306a36Sopenharmony_ci} 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci#define UNUSED -1 7462306a36Sopenharmony_ci/** 7562306a36Sopenharmony_ci * struct alternate_functions 7662306a36Sopenharmony_ci * @pin_number: The pin number 7762306a36Sopenharmony_ci * @gpiosel_bit: Control bit in GPIOSEL register, 7862306a36Sopenharmony_ci * @alt_bit1: First AlternateFunction bit used to select the 7962306a36Sopenharmony_ci * alternate function 8062306a36Sopenharmony_ci * @alt_bit2: Second AlternateFunction bit used to select the 8162306a36Sopenharmony_ci * alternate function 8262306a36Sopenharmony_ci * 8362306a36Sopenharmony_ci * these 3 following fields are necessary due to none 8462306a36Sopenharmony_ci * coherency on how to select the altA, altB and altC 8562306a36Sopenharmony_ci * function between the ABx500 SOC family when using 8662306a36Sopenharmony_ci * alternatfunc register. 8762306a36Sopenharmony_ci * @alta_val: value to write in alternatfunc to select altA function 8862306a36Sopenharmony_ci * @altb_val: value to write in alternatfunc to select altB function 8962306a36Sopenharmony_ci * @altc_val: value to write in alternatfunc to select altC function 9062306a36Sopenharmony_ci */ 9162306a36Sopenharmony_cistruct alternate_functions { 9262306a36Sopenharmony_ci unsigned pin_number; 9362306a36Sopenharmony_ci s8 gpiosel_bit; 9462306a36Sopenharmony_ci s8 alt_bit1; 9562306a36Sopenharmony_ci s8 alt_bit2; 9662306a36Sopenharmony_ci u8 alta_val; 9762306a36Sopenharmony_ci u8 altb_val; 9862306a36Sopenharmony_ci u8 altc_val; 9962306a36Sopenharmony_ci}; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci#define GPIO_IRQ_CLUSTER(a, b, c) \ 10262306a36Sopenharmony_ci{ \ 10362306a36Sopenharmony_ci .start = a, \ 10462306a36Sopenharmony_ci .end = b, \ 10562306a36Sopenharmony_ci .to_irq = c, \ 10662306a36Sopenharmony_ci} 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci/** 10962306a36Sopenharmony_ci * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt 11062306a36Sopenharmony_ci * capable 11162306a36Sopenharmony_ci * @start: The pin number of the first pin interrupt capable 11262306a36Sopenharmony_ci * @end: The pin number of the last pin interrupt capable 11362306a36Sopenharmony_ci * @to_irq: The ABx500 GPIO's associated IRQs are clustered 11462306a36Sopenharmony_ci * together throughout the interrupt numbers at irregular 11562306a36Sopenharmony_ci * intervals. To solve this quandary, we will place the 11662306a36Sopenharmony_ci * read-in values into the cluster information table 11762306a36Sopenharmony_ci */ 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_cistruct abx500_gpio_irq_cluster { 12062306a36Sopenharmony_ci int start; 12162306a36Sopenharmony_ci int end; 12262306a36Sopenharmony_ci int to_irq; 12362306a36Sopenharmony_ci}; 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_ci/** 12662306a36Sopenharmony_ci * struct abx500_pinrange - map pin numbers to GPIO offsets 12762306a36Sopenharmony_ci * @offset: offset into the GPIO local numberspace, incidentally 12862306a36Sopenharmony_ci * identical to the offset into the local pin numberspace 12962306a36Sopenharmony_ci * @npins: number of pins to map from both offsets 13062306a36Sopenharmony_ci * @altfunc: altfunc setting to be used to enable GPIO on a pin in 13162306a36Sopenharmony_ci * this range (may vary) 13262306a36Sopenharmony_ci */ 13362306a36Sopenharmony_cistruct abx500_pinrange { 13462306a36Sopenharmony_ci unsigned int offset; 13562306a36Sopenharmony_ci unsigned int npins; 13662306a36Sopenharmony_ci int altfunc; 13762306a36Sopenharmony_ci}; 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci#define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c } 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci/** 14262306a36Sopenharmony_ci * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration 14362306a36Sopenharmony_ci * @gpio_ranges: An array of GPIO ranges for this SoC 14462306a36Sopenharmony_ci * @gpio_num_ranges: The number of GPIO ranges for this SoC 14562306a36Sopenharmony_ci * @pins: An array describing all pins the pin controller affects. 14662306a36Sopenharmony_ci * All pins which are also GPIOs must be listed first within the 14762306a36Sopenharmony_ci * array, and be numbered identically to the GPIO controller's 14862306a36Sopenharmony_ci * numbering. 14962306a36Sopenharmony_ci * @npins: The number of entries in @pins. 15062306a36Sopenharmony_ci * @functions: The functions supported on this SoC. 15162306a36Sopenharmony_ci * @nfunction: The number of entries in @functions. 15262306a36Sopenharmony_ci * @groups: An array describing all pin groups the pin SoC supports. 15362306a36Sopenharmony_ci * @ngroups: The number of entries in @groups. 15462306a36Sopenharmony_ci * @alternate_functions: array describing pins which supports alternate and 15562306a36Sopenharmony_ci * how to set it. 15662306a36Sopenharmony_ci * @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC 15762306a36Sopenharmony_ci * @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC 15862306a36Sopenharmony_ci * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific 15962306a36Sopenharmony_ci * setting strategy of the rising interrupt line 16062306a36Sopenharmony_ci * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific 16162306a36Sopenharmony_ci * setting strategy of the falling interrupt line 16262306a36Sopenharmony_ci * @irq_gpio_factor: Factor used to compute specific setting strategy of 16362306a36Sopenharmony_ci * the interrupt line 16462306a36Sopenharmony_ci */ 16562306a36Sopenharmony_ci 16662306a36Sopenharmony_cistruct abx500_pinctrl_soc_data { 16762306a36Sopenharmony_ci const struct abx500_pinrange *gpio_ranges; 16862306a36Sopenharmony_ci unsigned gpio_num_ranges; 16962306a36Sopenharmony_ci const struct pinctrl_pin_desc *pins; 17062306a36Sopenharmony_ci unsigned npins; 17162306a36Sopenharmony_ci const struct abx500_function *functions; 17262306a36Sopenharmony_ci unsigned nfunctions; 17362306a36Sopenharmony_ci const struct abx500_pingroup *groups; 17462306a36Sopenharmony_ci unsigned ngroups; 17562306a36Sopenharmony_ci struct alternate_functions *alternate_functions; 17662306a36Sopenharmony_ci struct abx500_gpio_irq_cluster *gpio_irq_cluster; 17762306a36Sopenharmony_ci unsigned ngpio_irq_cluster; 17862306a36Sopenharmony_ci int irq_gpio_rising_offset; 17962306a36Sopenharmony_ci int irq_gpio_falling_offset; 18062306a36Sopenharmony_ci int irq_gpio_factor; 18162306a36Sopenharmony_ci}; 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ci#ifdef CONFIG_PINCTRL_AB8500 18462306a36Sopenharmony_ci 18562306a36Sopenharmony_civoid abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc); 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ci#else 18862306a36Sopenharmony_ci 18962306a36Sopenharmony_cistatic inline void 19062306a36Sopenharmony_ciabx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc) 19162306a36Sopenharmony_ci{ 19262306a36Sopenharmony_ci} 19362306a36Sopenharmony_ci 19462306a36Sopenharmony_ci#endif 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci#ifdef CONFIG_PINCTRL_AB8505 19762306a36Sopenharmony_ci 19862306a36Sopenharmony_civoid abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc); 19962306a36Sopenharmony_ci 20062306a36Sopenharmony_ci#else 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_cistatic inline void 20362306a36Sopenharmony_ciabx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) 20462306a36Sopenharmony_ci{ 20562306a36Sopenharmony_ci} 20662306a36Sopenharmony_ci 20762306a36Sopenharmony_ci#endif 20862306a36Sopenharmony_ci 20962306a36Sopenharmony_ci#endif /* PINCTRL_PINCTRL_ABx500_H */ 210