162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Based on pinctrl-mt6765.c 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2018 MediaTek Inc. 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Author: ZH Chen <zh.chen@mediatek.com> 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * Copyright (C) Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 1062306a36Sopenharmony_ci * 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include "pinctrl-mtk-mt6797.h" 1462306a36Sopenharmony_ci#include "pinctrl-paris.h" 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci/* 1762306a36Sopenharmony_ci * MT6797 have multiple bases to program pin configuration listed as the below: 1862306a36Sopenharmony_ci * gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400, 1962306a36Sopenharmony_ci * iocfg[r]:0x10002800, iocfg[t]:0x10002C00. 2062306a36Sopenharmony_ci * _i_base could be used to indicate what base the pin should be mapped into. 2162306a36Sopenharmony_ci */ 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_mode_range[] = { 2462306a36Sopenharmony_ci PIN_FIELD(0, 261, 0x300, 0x10, 0, 4), 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_dir_range[] = { 2862306a36Sopenharmony_ci PIN_FIELD(0, 261, 0x0, 0x10, 0, 1), 2962306a36Sopenharmony_ci}; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_di_range[] = { 3262306a36Sopenharmony_ci PIN_FIELD(0, 261, 0x200, 0x10, 0, 1), 3362306a36Sopenharmony_ci}; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_do_range[] = { 3662306a36Sopenharmony_ci PIN_FIELD(0, 261, 0x100, 0x10, 0, 1), 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistatic const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = { 4062306a36Sopenharmony_ci [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range), 4162306a36Sopenharmony_ci [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range), 4262306a36Sopenharmony_ci [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range), 4362306a36Sopenharmony_ci [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range), 4462306a36Sopenharmony_ci}; 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_cistatic const char * const mt6797_pinctrl_register_base_names[] = { 4762306a36Sopenharmony_ci "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt", 4862306a36Sopenharmony_ci}; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_cistatic const struct mtk_pin_soc mt6797_data = { 5162306a36Sopenharmony_ci .reg_cal = mt6797_reg_cals, 5262306a36Sopenharmony_ci .pins = mtk_pins_mt6797, 5362306a36Sopenharmony_ci .npins = ARRAY_SIZE(mtk_pins_mt6797), 5462306a36Sopenharmony_ci .ngrps = ARRAY_SIZE(mtk_pins_mt6797), 5562306a36Sopenharmony_ci .gpio_m = 0, 5662306a36Sopenharmony_ci .base_names = mt6797_pinctrl_register_base_names, 5762306a36Sopenharmony_ci .nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names), 5862306a36Sopenharmony_ci}; 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_cistatic const struct of_device_id mt6797_pinctrl_of_match[] = { 6162306a36Sopenharmony_ci { .compatible = "mediatek,mt6797-pinctrl", .data = &mt6797_data }, 6262306a36Sopenharmony_ci { } 6362306a36Sopenharmony_ci}; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_cistatic struct platform_driver mt6797_pinctrl_driver = { 6662306a36Sopenharmony_ci .driver = { 6762306a36Sopenharmony_ci .name = "mt6797-pinctrl", 6862306a36Sopenharmony_ci .of_match_table = mt6797_pinctrl_of_match, 6962306a36Sopenharmony_ci }, 7062306a36Sopenharmony_ci .probe = mtk_paris_pinctrl_probe, 7162306a36Sopenharmony_ci}; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_cistatic int __init mt6797_pinctrl_init(void) 7462306a36Sopenharmony_ci{ 7562306a36Sopenharmony_ci return platform_driver_register(&mt6797_pinctrl_driver); 7662306a36Sopenharmony_ci} 7762306a36Sopenharmony_ciarch_initcall(mt6797_pinctrl_init); 78