1// SPDX-License-Identifier: GPL-2.0 2/* 3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding 4 * pinctrl-bindings.txt for MediaTek SoC. 5 * 6 * Copyright (C) 2017-2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * 9 */ 10 11#include <dt-bindings/pinctrl/mt65xx.h> 12#include <linux/gpio/driver.h> 13 14#include <linux/pinctrl/consumer.h> 15 16#include "pinctrl-moore.h" 17 18#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 19 20/* Custom pinconf parameters */ 21#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 22#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 23#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 24#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 25 26static const struct pinconf_generic_params mtk_custom_bindings[] = { 27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 31}; 32 33#ifdef CONFIG_DEBUG_FS 34static const struct pin_config_item mtk_conf_items[] = { 35 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 36 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 37 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 38 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 39}; 40#endif 41 42static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, 43 unsigned int selector, unsigned int group) 44{ 45 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 46 struct function_desc *func; 47 struct group_desc *grp; 48 int i; 49 50 func = pinmux_generic_get_function(pctldev, selector); 51 if (!func) 52 return -EINVAL; 53 54 grp = pinctrl_generic_get_group(pctldev, group); 55 if (!grp) 56 return -EINVAL; 57 58 dev_dbg(pctldev->dev, "enable function %s group %s\n", 59 func->name, grp->name); 60 61 for (i = 0; i < grp->num_pins; i++) { 62 const struct mtk_pin_desc *desc; 63 int *pin_modes = grp->data; 64 int pin = grp->pins[i]; 65 66 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 67 if (!desc->name) 68 return -ENOTSUPP; 69 70 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 71 pin_modes[i]); 72 } 73 74 return 0; 75} 76 77static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 78 struct pinctrl_gpio_range *range, 79 unsigned int pin) 80{ 81 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 82 const struct mtk_pin_desc *desc; 83 84 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 85 if (!desc->name) 86 return -ENOTSUPP; 87 88 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 89 hw->soc->gpio_m); 90} 91 92static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 93 struct pinctrl_gpio_range *range, 94 unsigned int pin, bool input) 95{ 96 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 97 const struct mtk_pin_desc *desc; 98 99 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 100 if (!desc->name) 101 return -ENOTSUPP; 102 103 /* hardware would take 0 as input direction */ 104 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 105} 106 107static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 108 unsigned int pin, unsigned long *config) 109{ 110 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 111 u32 param = pinconf_to_config_param(*config); 112 int val, val2, err, pullup, reg, ret = 1; 113 const struct mtk_pin_desc *desc; 114 115 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 116 if (!desc->name) 117 return -ENOTSUPP; 118 119 switch (param) { 120 case PIN_CONFIG_BIAS_DISABLE: 121 if (hw->soc->bias_get_combo) { 122 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 123 if (err) 124 return err; 125 if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE) 126 return -EINVAL; 127 } else if (hw->soc->bias_disable_get) { 128 err = hw->soc->bias_disable_get(hw, desc, &ret); 129 if (err) 130 return err; 131 } else { 132 return -ENOTSUPP; 133 } 134 break; 135 case PIN_CONFIG_BIAS_PULL_UP: 136 if (hw->soc->bias_get_combo) { 137 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 138 if (err) 139 return err; 140 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) 141 return -EINVAL; 142 if (!pullup) 143 return -EINVAL; 144 } else if (hw->soc->bias_get) { 145 err = hw->soc->bias_get(hw, desc, 1, &ret); 146 if (err) 147 return err; 148 } else { 149 return -ENOTSUPP; 150 } 151 break; 152 case PIN_CONFIG_BIAS_PULL_DOWN: 153 if (hw->soc->bias_get_combo) { 154 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 155 if (err) 156 return err; 157 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) 158 return -EINVAL; 159 if (pullup) 160 return -EINVAL; 161 } else if (hw->soc->bias_get) { 162 err = hw->soc->bias_get(hw, desc, 0, &ret); 163 if (err) 164 return err; 165 } else { 166 return -ENOTSUPP; 167 } 168 break; 169 case PIN_CONFIG_SLEW_RATE: 170 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val); 171 if (err) 172 return err; 173 174 if (!val) 175 return -EINVAL; 176 177 break; 178 case PIN_CONFIG_INPUT_ENABLE: 179 case PIN_CONFIG_OUTPUT_ENABLE: 180 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 181 if (err) 182 return err; 183 184 /* HW takes input mode as zero; output mode as non-zero */ 185 if ((val && param == PIN_CONFIG_INPUT_ENABLE) || 186 (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) 187 return -EINVAL; 188 189 break; 190 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 191 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 192 if (err) 193 return err; 194 195 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2); 196 if (err) 197 return err; 198 199 if (val || !val2) 200 return -EINVAL; 201 202 break; 203 case PIN_CONFIG_DRIVE_STRENGTH: 204 if (hw->soc->drive_get) { 205 err = hw->soc->drive_get(hw, desc, &ret); 206 if (err) 207 return err; 208 } else { 209 err = -ENOTSUPP; 210 } 211 break; 212 case MTK_PIN_CONFIG_TDSEL: 213 case MTK_PIN_CONFIG_RDSEL: 214 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 215 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 216 217 err = mtk_hw_get_value(hw, desc, reg, &val); 218 if (err) 219 return err; 220 221 ret = val; 222 223 break; 224 case MTK_PIN_CONFIG_PU_ADV: 225 case MTK_PIN_CONFIG_PD_ADV: 226 if (hw->soc->adv_pull_get) { 227 bool pullup; 228 229 pullup = param == MTK_PIN_CONFIG_PU_ADV; 230 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 231 if (err) 232 return err; 233 } else { 234 return -ENOTSUPP; 235 } 236 break; 237 default: 238 return -ENOTSUPP; 239 } 240 241 *config = pinconf_to_config_packed(param, ret); 242 243 return 0; 244} 245 246static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 247 unsigned long *configs, unsigned int num_configs) 248{ 249 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 250 const struct mtk_pin_desc *desc; 251 u32 reg, param, arg; 252 int cfg, err = 0; 253 254 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 255 if (!desc->name) 256 return -ENOTSUPP; 257 258 for (cfg = 0; cfg < num_configs; cfg++) { 259 param = pinconf_to_config_param(configs[cfg]); 260 arg = pinconf_to_config_argument(configs[cfg]); 261 262 switch (param) { 263 case PIN_CONFIG_BIAS_DISABLE: 264 if (hw->soc->bias_set_combo) { 265 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); 266 if (err) 267 return err; 268 } else if (hw->soc->bias_disable_set) { 269 err = hw->soc->bias_disable_set(hw, desc); 270 if (err) 271 return err; 272 } else { 273 return -ENOTSUPP; 274 } 275 break; 276 case PIN_CONFIG_BIAS_PULL_UP: 277 if (hw->soc->bias_set_combo) { 278 err = hw->soc->bias_set_combo(hw, desc, 1, arg); 279 if (err) 280 return err; 281 } else if (hw->soc->bias_set) { 282 err = hw->soc->bias_set(hw, desc, 1); 283 if (err) 284 return err; 285 } else { 286 return -ENOTSUPP; 287 } 288 break; 289 case PIN_CONFIG_BIAS_PULL_DOWN: 290 if (hw->soc->bias_set_combo) { 291 err = hw->soc->bias_set_combo(hw, desc, 0, arg); 292 if (err) 293 return err; 294 } else if (hw->soc->bias_set) { 295 err = hw->soc->bias_set(hw, desc, 0); 296 if (err) 297 return err; 298 } else { 299 return -ENOTSUPP; 300 } 301 break; 302 case PIN_CONFIG_OUTPUT_ENABLE: 303 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 304 MTK_DISABLE); 305 if (err) 306 goto err; 307 308 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 309 MTK_OUTPUT); 310 if (err) 311 goto err; 312 break; 313 case PIN_CONFIG_INPUT_ENABLE: 314 315 if (hw->soc->ies_present) { 316 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, 317 MTK_ENABLE); 318 } 319 320 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 321 MTK_INPUT); 322 if (err) 323 goto err; 324 break; 325 case PIN_CONFIG_SLEW_RATE: 326 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, 327 arg); 328 if (err) 329 goto err; 330 331 break; 332 case PIN_CONFIG_OUTPUT: 333 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 334 MTK_OUTPUT); 335 if (err) 336 goto err; 337 338 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 339 arg); 340 if (err) 341 goto err; 342 break; 343 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 344 /* arg = 1: Input mode & SMT enable ; 345 * arg = 0: Output mode & SMT disable 346 */ 347 arg = arg ? 2 : 1; 348 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 349 arg & 1); 350 if (err) 351 goto err; 352 353 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 354 !!(arg & 2)); 355 if (err) 356 goto err; 357 break; 358 case PIN_CONFIG_DRIVE_STRENGTH: 359 if (hw->soc->drive_set) { 360 err = hw->soc->drive_set(hw, desc, arg); 361 if (err) 362 return err; 363 } else { 364 err = -ENOTSUPP; 365 } 366 break; 367 case MTK_PIN_CONFIG_TDSEL: 368 case MTK_PIN_CONFIG_RDSEL: 369 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 370 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 371 372 err = mtk_hw_set_value(hw, desc, reg, arg); 373 if (err) 374 goto err; 375 break; 376 case MTK_PIN_CONFIG_PU_ADV: 377 case MTK_PIN_CONFIG_PD_ADV: 378 if (hw->soc->adv_pull_set) { 379 bool pullup; 380 381 pullup = param == MTK_PIN_CONFIG_PU_ADV; 382 err = hw->soc->adv_pull_set(hw, desc, pullup, 383 arg); 384 if (err) 385 return err; 386 } else { 387 return -ENOTSUPP; 388 } 389 break; 390 default: 391 err = -ENOTSUPP; 392 } 393 } 394err: 395 return err; 396} 397 398static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev, 399 unsigned int group, unsigned long *config) 400{ 401 const unsigned int *pins; 402 unsigned int i, npins, old = 0; 403 int ret; 404 405 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 406 if (ret) 407 return ret; 408 409 for (i = 0; i < npins; i++) { 410 if (mtk_pinconf_get(pctldev, pins[i], config)) 411 return -ENOTSUPP; 412 413 /* configs do not match between two pins */ 414 if (i && old != *config) 415 return -ENOTSUPP; 416 417 old = *config; 418 } 419 420 return 0; 421} 422 423static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev, 424 unsigned int group, unsigned long *configs, 425 unsigned int num_configs) 426{ 427 const unsigned int *pins; 428 unsigned int i, npins; 429 int ret; 430 431 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 432 if (ret) 433 return ret; 434 435 for (i = 0; i < npins; i++) { 436 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs); 437 if (ret) 438 return ret; 439 } 440 441 return 0; 442} 443 444static const struct pinctrl_ops mtk_pctlops = { 445 .get_groups_count = pinctrl_generic_get_group_count, 446 .get_group_name = pinctrl_generic_get_group_name, 447 .get_group_pins = pinctrl_generic_get_group_pins, 448 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 449 .dt_free_map = pinconf_generic_dt_free_map, 450}; 451 452static const struct pinmux_ops mtk_pmxops = { 453 .get_functions_count = pinmux_generic_get_function_count, 454 .get_function_name = pinmux_generic_get_function_name, 455 .get_function_groups = pinmux_generic_get_function_groups, 456 .set_mux = mtk_pinmux_set_mux, 457 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 458 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 459 .strict = true, 460}; 461 462static const struct pinconf_ops mtk_confops = { 463 .is_generic = true, 464 .pin_config_get = mtk_pinconf_get, 465 .pin_config_set = mtk_pinconf_set, 466 .pin_config_group_get = mtk_pinconf_group_get, 467 .pin_config_group_set = mtk_pinconf_group_set, 468 .pin_config_config_dbg_show = pinconf_generic_dump_config, 469}; 470 471static struct pinctrl_desc mtk_desc = { 472 .name = PINCTRL_PINCTRL_DEV, 473 .pctlops = &mtk_pctlops, 474 .pmxops = &mtk_pmxops, 475 .confops = &mtk_confops, 476 .owner = THIS_MODULE, 477}; 478 479static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 480{ 481 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 482 const struct mtk_pin_desc *desc; 483 int value, err; 484 485 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 486 if (!desc->name) 487 return -ENOTSUPP; 488 489 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 490 if (err) 491 return err; 492 493 return !!value; 494} 495 496static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 497{ 498 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 499 const struct mtk_pin_desc *desc; 500 501 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 502 if (!desc->name) { 503 dev_err(hw->dev, "Failed to set gpio %d\n", gpio); 504 return; 505 } 506 507 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 508} 509 510static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 511{ 512 return pinctrl_gpio_direction_input(chip->base + gpio); 513} 514 515static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 516 int value) 517{ 518 mtk_gpio_set(chip, gpio, value); 519 520 return pinctrl_gpio_direction_output(chip->base + gpio); 521} 522 523static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 524{ 525 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 526 const struct mtk_pin_desc *desc; 527 528 if (!hw->eint) 529 return -ENOTSUPP; 530 531 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 532 533 if (desc->eint.eint_n == (u16)EINT_NA) 534 return -ENOTSUPP; 535 536 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 537} 538 539static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 540 unsigned long config) 541{ 542 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 543 const struct mtk_pin_desc *desc; 544 u32 debounce; 545 546 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 547 if (!desc->name) 548 return -ENOTSUPP; 549 550 if (!hw->eint || 551 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 552 desc->eint.eint_n == (u16)EINT_NA) 553 return -ENOTSUPP; 554 555 debounce = pinconf_to_config_argument(config); 556 557 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 558} 559 560static int mtk_build_gpiochip(struct mtk_pinctrl *hw) 561{ 562 struct gpio_chip *chip = &hw->chip; 563 int ret; 564 565 chip->label = PINCTRL_PINCTRL_DEV; 566 chip->parent = hw->dev; 567 chip->request = gpiochip_generic_request; 568 chip->free = gpiochip_generic_free; 569 chip->direction_input = mtk_gpio_direction_input; 570 chip->direction_output = mtk_gpio_direction_output; 571 chip->get = mtk_gpio_get; 572 chip->set = mtk_gpio_set; 573 chip->to_irq = mtk_gpio_to_irq; 574 chip->set_config = mtk_gpio_set_config; 575 chip->base = -1; 576 chip->ngpio = hw->soc->npins; 577 578 ret = gpiochip_add_data(chip, hw); 579 if (ret < 0) 580 return ret; 581 582 /* Just for backward compatible for these old pinctrl nodes without 583 * "gpio-ranges" property. Otherwise, called directly from a 584 * DeviceTree-supported pinctrl driver is DEPRECATED. 585 * Please see Section 2.1 of 586 * Documentation/devicetree/bindings/gpio/gpio.txt on how to 587 * bind pinctrl and gpio drivers via the "gpio-ranges" property. 588 */ 589 if (!of_property_present(hw->dev->of_node, "gpio-ranges")) { 590 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, 591 chip->ngpio); 592 if (ret < 0) { 593 gpiochip_remove(chip); 594 return ret; 595 } 596 } 597 598 return 0; 599} 600 601static int mtk_build_groups(struct mtk_pinctrl *hw) 602{ 603 int err, i; 604 605 for (i = 0; i < hw->soc->ngrps; i++) { 606 const struct group_desc *group = hw->soc->grps + i; 607 608 err = pinctrl_generic_add_group(hw->pctrl, group->name, 609 group->pins, group->num_pins, 610 group->data); 611 if (err < 0) { 612 dev_err(hw->dev, "Failed to register group %s\n", 613 group->name); 614 return err; 615 } 616 } 617 618 return 0; 619} 620 621static int mtk_build_functions(struct mtk_pinctrl *hw) 622{ 623 int i, err; 624 625 for (i = 0; i < hw->soc->nfuncs ; i++) { 626 const struct function_desc *func = hw->soc->funcs + i; 627 628 err = pinmux_generic_add_function(hw->pctrl, func->name, 629 func->group_names, 630 func->num_group_names, 631 func->data); 632 if (err < 0) { 633 dev_err(hw->dev, "Failed to register function %s\n", 634 func->name); 635 return err; 636 } 637 } 638 639 return 0; 640} 641 642int mtk_moore_pinctrl_probe(struct platform_device *pdev, 643 const struct mtk_pin_soc *soc) 644{ 645 struct device *dev = &pdev->dev; 646 struct pinctrl_pin_desc *pins; 647 struct mtk_pinctrl *hw; 648 int err, i; 649 650 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 651 if (!hw) 652 return -ENOMEM; 653 654 hw->soc = soc; 655 hw->dev = &pdev->dev; 656 657 if (!hw->soc->nbase_names) 658 return dev_err_probe(dev, -EINVAL, 659 "SoC should be assigned at least one register base\n"); 660 661 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 662 sizeof(*hw->base), GFP_KERNEL); 663 if (!hw->base) 664 return -ENOMEM; 665 666 for (i = 0; i < hw->soc->nbase_names; i++) { 667 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, 668 hw->soc->base_names[i]); 669 if (IS_ERR(hw->base[i])) 670 return PTR_ERR(hw->base[i]); 671 } 672 673 hw->nbase = hw->soc->nbase_names; 674 675 spin_lock_init(&hw->lock); 676 677 /* Copy from internal struct mtk_pin_desc to register to the core */ 678 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 679 GFP_KERNEL); 680 if (!pins) 681 return -ENOMEM; 682 683 for (i = 0; i < hw->soc->npins; i++) { 684 pins[i].number = hw->soc->pins[i].number; 685 pins[i].name = hw->soc->pins[i].name; 686 } 687 688 /* Setup pins descriptions per SoC types */ 689 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 690 mtk_desc.npins = hw->soc->npins; 691 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 692 mtk_desc.custom_params = mtk_custom_bindings; 693#ifdef CONFIG_DEBUG_FS 694 mtk_desc.custom_conf_items = mtk_conf_items; 695#endif 696 697 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 698 &hw->pctrl); 699 if (err) 700 return err; 701 702 /* Setup groups descriptions per SoC types */ 703 err = mtk_build_groups(hw); 704 if (err) 705 return dev_err_probe(dev, err, "Failed to build groups\n"); 706 707 /* Setup functions descriptions per SoC types */ 708 err = mtk_build_functions(hw); 709 if (err) 710 return dev_err_probe(dev, err, "Failed to build functions\n"); 711 712 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl 713 * until all groups and functions are being added one. 714 */ 715 err = pinctrl_enable(hw->pctrl); 716 if (err) 717 return err; 718 719 err = mtk_build_eint(hw, pdev); 720 if (err) 721 dev_warn(&pdev->dev, 722 "Failed to add EINT, but pinctrl still can work\n"); 723 724 /* Build gpiochip should be after pinctrl_enable is done */ 725 err = mtk_build_gpiochip(hw); 726 if (err) 727 return dev_err_probe(dev, err, "Failed to add gpio_chip\n"); 728 729 platform_set_drvdata(pdev, hw); 730 731 return 0; 732} 733