1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Freescale i.MX23 pinctrl driver 4// 5// Author: Shawn Guo <shawn.guo@linaro.org> 6// Copyright 2012 Freescale Semiconductor, Inc. 7 8#include <linux/init.h> 9#include <linux/mod_devicetable.h> 10#include <linux/platform_device.h> 11#include <linux/pinctrl/pinctrl.h> 12#include "pinctrl-mxs.h" 13 14enum imx23_pin_enum { 15 GPMI_D00 = PINID(0, 0), 16 GPMI_D01 = PINID(0, 1), 17 GPMI_D02 = PINID(0, 2), 18 GPMI_D03 = PINID(0, 3), 19 GPMI_D04 = PINID(0, 4), 20 GPMI_D05 = PINID(0, 5), 21 GPMI_D06 = PINID(0, 6), 22 GPMI_D07 = PINID(0, 7), 23 GPMI_D08 = PINID(0, 8), 24 GPMI_D09 = PINID(0, 9), 25 GPMI_D10 = PINID(0, 10), 26 GPMI_D11 = PINID(0, 11), 27 GPMI_D12 = PINID(0, 12), 28 GPMI_D13 = PINID(0, 13), 29 GPMI_D14 = PINID(0, 14), 30 GPMI_D15 = PINID(0, 15), 31 GPMI_CLE = PINID(0, 16), 32 GPMI_ALE = PINID(0, 17), 33 GPMI_CE2N = PINID(0, 18), 34 GPMI_RDY0 = PINID(0, 19), 35 GPMI_RDY1 = PINID(0, 20), 36 GPMI_RDY2 = PINID(0, 21), 37 GPMI_RDY3 = PINID(0, 22), 38 GPMI_WPN = PINID(0, 23), 39 GPMI_WRN = PINID(0, 24), 40 GPMI_RDN = PINID(0, 25), 41 AUART1_CTS = PINID(0, 26), 42 AUART1_RTS = PINID(0, 27), 43 AUART1_RX = PINID(0, 28), 44 AUART1_TX = PINID(0, 29), 45 I2C_SCL = PINID(0, 30), 46 I2C_SDA = PINID(0, 31), 47 LCD_D00 = PINID(1, 0), 48 LCD_D01 = PINID(1, 1), 49 LCD_D02 = PINID(1, 2), 50 LCD_D03 = PINID(1, 3), 51 LCD_D04 = PINID(1, 4), 52 LCD_D05 = PINID(1, 5), 53 LCD_D06 = PINID(1, 6), 54 LCD_D07 = PINID(1, 7), 55 LCD_D08 = PINID(1, 8), 56 LCD_D09 = PINID(1, 9), 57 LCD_D10 = PINID(1, 10), 58 LCD_D11 = PINID(1, 11), 59 LCD_D12 = PINID(1, 12), 60 LCD_D13 = PINID(1, 13), 61 LCD_D14 = PINID(1, 14), 62 LCD_D15 = PINID(1, 15), 63 LCD_D16 = PINID(1, 16), 64 LCD_D17 = PINID(1, 17), 65 LCD_RESET = PINID(1, 18), 66 LCD_RS = PINID(1, 19), 67 LCD_WR = PINID(1, 20), 68 LCD_CS = PINID(1, 21), 69 LCD_DOTCK = PINID(1, 22), 70 LCD_ENABLE = PINID(1, 23), 71 LCD_HSYNC = PINID(1, 24), 72 LCD_VSYNC = PINID(1, 25), 73 PWM0 = PINID(1, 26), 74 PWM1 = PINID(1, 27), 75 PWM2 = PINID(1, 28), 76 PWM3 = PINID(1, 29), 77 PWM4 = PINID(1, 30), 78 SSP1_CMD = PINID(2, 0), 79 SSP1_DETECT = PINID(2, 1), 80 SSP1_DATA0 = PINID(2, 2), 81 SSP1_DATA1 = PINID(2, 3), 82 SSP1_DATA2 = PINID(2, 4), 83 SSP1_DATA3 = PINID(2, 5), 84 SSP1_SCK = PINID(2, 6), 85 ROTARYA = PINID(2, 7), 86 ROTARYB = PINID(2, 8), 87 EMI_A00 = PINID(2, 9), 88 EMI_A01 = PINID(2, 10), 89 EMI_A02 = PINID(2, 11), 90 EMI_A03 = PINID(2, 12), 91 EMI_A04 = PINID(2, 13), 92 EMI_A05 = PINID(2, 14), 93 EMI_A06 = PINID(2, 15), 94 EMI_A07 = PINID(2, 16), 95 EMI_A08 = PINID(2, 17), 96 EMI_A09 = PINID(2, 18), 97 EMI_A10 = PINID(2, 19), 98 EMI_A11 = PINID(2, 20), 99 EMI_A12 = PINID(2, 21), 100 EMI_BA0 = PINID(2, 22), 101 EMI_BA1 = PINID(2, 23), 102 EMI_CASN = PINID(2, 24), 103 EMI_CE0N = PINID(2, 25), 104 EMI_CE1N = PINID(2, 26), 105 GPMI_CE1N = PINID(2, 27), 106 GPMI_CE0N = PINID(2, 28), 107 EMI_CKE = PINID(2, 29), 108 EMI_RASN = PINID(2, 30), 109 EMI_WEN = PINID(2, 31), 110 EMI_D00 = PINID(3, 0), 111 EMI_D01 = PINID(3, 1), 112 EMI_D02 = PINID(3, 2), 113 EMI_D03 = PINID(3, 3), 114 EMI_D04 = PINID(3, 4), 115 EMI_D05 = PINID(3, 5), 116 EMI_D06 = PINID(3, 6), 117 EMI_D07 = PINID(3, 7), 118 EMI_D08 = PINID(3, 8), 119 EMI_D09 = PINID(3, 9), 120 EMI_D10 = PINID(3, 10), 121 EMI_D11 = PINID(3, 11), 122 EMI_D12 = PINID(3, 12), 123 EMI_D13 = PINID(3, 13), 124 EMI_D14 = PINID(3, 14), 125 EMI_D15 = PINID(3, 15), 126 EMI_DQM0 = PINID(3, 16), 127 EMI_DQM1 = PINID(3, 17), 128 EMI_DQS0 = PINID(3, 18), 129 EMI_DQS1 = PINID(3, 19), 130 EMI_CLK = PINID(3, 20), 131 EMI_CLKN = PINID(3, 21), 132}; 133 134static const struct pinctrl_pin_desc imx23_pins[] = { 135 MXS_PINCTRL_PIN(GPMI_D00), 136 MXS_PINCTRL_PIN(GPMI_D01), 137 MXS_PINCTRL_PIN(GPMI_D02), 138 MXS_PINCTRL_PIN(GPMI_D03), 139 MXS_PINCTRL_PIN(GPMI_D04), 140 MXS_PINCTRL_PIN(GPMI_D05), 141 MXS_PINCTRL_PIN(GPMI_D06), 142 MXS_PINCTRL_PIN(GPMI_D07), 143 MXS_PINCTRL_PIN(GPMI_D08), 144 MXS_PINCTRL_PIN(GPMI_D09), 145 MXS_PINCTRL_PIN(GPMI_D10), 146 MXS_PINCTRL_PIN(GPMI_D11), 147 MXS_PINCTRL_PIN(GPMI_D12), 148 MXS_PINCTRL_PIN(GPMI_D13), 149 MXS_PINCTRL_PIN(GPMI_D14), 150 MXS_PINCTRL_PIN(GPMI_D15), 151 MXS_PINCTRL_PIN(GPMI_CLE), 152 MXS_PINCTRL_PIN(GPMI_ALE), 153 MXS_PINCTRL_PIN(GPMI_CE2N), 154 MXS_PINCTRL_PIN(GPMI_RDY0), 155 MXS_PINCTRL_PIN(GPMI_RDY1), 156 MXS_PINCTRL_PIN(GPMI_RDY2), 157 MXS_PINCTRL_PIN(GPMI_RDY3), 158 MXS_PINCTRL_PIN(GPMI_WPN), 159 MXS_PINCTRL_PIN(GPMI_WRN), 160 MXS_PINCTRL_PIN(GPMI_RDN), 161 MXS_PINCTRL_PIN(AUART1_CTS), 162 MXS_PINCTRL_PIN(AUART1_RTS), 163 MXS_PINCTRL_PIN(AUART1_RX), 164 MXS_PINCTRL_PIN(AUART1_TX), 165 MXS_PINCTRL_PIN(I2C_SCL), 166 MXS_PINCTRL_PIN(I2C_SDA), 167 MXS_PINCTRL_PIN(LCD_D00), 168 MXS_PINCTRL_PIN(LCD_D01), 169 MXS_PINCTRL_PIN(LCD_D02), 170 MXS_PINCTRL_PIN(LCD_D03), 171 MXS_PINCTRL_PIN(LCD_D04), 172 MXS_PINCTRL_PIN(LCD_D05), 173 MXS_PINCTRL_PIN(LCD_D06), 174 MXS_PINCTRL_PIN(LCD_D07), 175 MXS_PINCTRL_PIN(LCD_D08), 176 MXS_PINCTRL_PIN(LCD_D09), 177 MXS_PINCTRL_PIN(LCD_D10), 178 MXS_PINCTRL_PIN(LCD_D11), 179 MXS_PINCTRL_PIN(LCD_D12), 180 MXS_PINCTRL_PIN(LCD_D13), 181 MXS_PINCTRL_PIN(LCD_D14), 182 MXS_PINCTRL_PIN(LCD_D15), 183 MXS_PINCTRL_PIN(LCD_D16), 184 MXS_PINCTRL_PIN(LCD_D17), 185 MXS_PINCTRL_PIN(LCD_RESET), 186 MXS_PINCTRL_PIN(LCD_RS), 187 MXS_PINCTRL_PIN(LCD_WR), 188 MXS_PINCTRL_PIN(LCD_CS), 189 MXS_PINCTRL_PIN(LCD_DOTCK), 190 MXS_PINCTRL_PIN(LCD_ENABLE), 191 MXS_PINCTRL_PIN(LCD_HSYNC), 192 MXS_PINCTRL_PIN(LCD_VSYNC), 193 MXS_PINCTRL_PIN(PWM0), 194 MXS_PINCTRL_PIN(PWM1), 195 MXS_PINCTRL_PIN(PWM2), 196 MXS_PINCTRL_PIN(PWM3), 197 MXS_PINCTRL_PIN(PWM4), 198 MXS_PINCTRL_PIN(SSP1_CMD), 199 MXS_PINCTRL_PIN(SSP1_DETECT), 200 MXS_PINCTRL_PIN(SSP1_DATA0), 201 MXS_PINCTRL_PIN(SSP1_DATA1), 202 MXS_PINCTRL_PIN(SSP1_DATA2), 203 MXS_PINCTRL_PIN(SSP1_DATA3), 204 MXS_PINCTRL_PIN(SSP1_SCK), 205 MXS_PINCTRL_PIN(ROTARYA), 206 MXS_PINCTRL_PIN(ROTARYB), 207 MXS_PINCTRL_PIN(EMI_A00), 208 MXS_PINCTRL_PIN(EMI_A01), 209 MXS_PINCTRL_PIN(EMI_A02), 210 MXS_PINCTRL_PIN(EMI_A03), 211 MXS_PINCTRL_PIN(EMI_A04), 212 MXS_PINCTRL_PIN(EMI_A05), 213 MXS_PINCTRL_PIN(EMI_A06), 214 MXS_PINCTRL_PIN(EMI_A07), 215 MXS_PINCTRL_PIN(EMI_A08), 216 MXS_PINCTRL_PIN(EMI_A09), 217 MXS_PINCTRL_PIN(EMI_A10), 218 MXS_PINCTRL_PIN(EMI_A11), 219 MXS_PINCTRL_PIN(EMI_A12), 220 MXS_PINCTRL_PIN(EMI_BA0), 221 MXS_PINCTRL_PIN(EMI_BA1), 222 MXS_PINCTRL_PIN(EMI_CASN), 223 MXS_PINCTRL_PIN(EMI_CE0N), 224 MXS_PINCTRL_PIN(EMI_CE1N), 225 MXS_PINCTRL_PIN(GPMI_CE1N), 226 MXS_PINCTRL_PIN(GPMI_CE0N), 227 MXS_PINCTRL_PIN(EMI_CKE), 228 MXS_PINCTRL_PIN(EMI_RASN), 229 MXS_PINCTRL_PIN(EMI_WEN), 230 MXS_PINCTRL_PIN(EMI_D00), 231 MXS_PINCTRL_PIN(EMI_D01), 232 MXS_PINCTRL_PIN(EMI_D02), 233 MXS_PINCTRL_PIN(EMI_D03), 234 MXS_PINCTRL_PIN(EMI_D04), 235 MXS_PINCTRL_PIN(EMI_D05), 236 MXS_PINCTRL_PIN(EMI_D06), 237 MXS_PINCTRL_PIN(EMI_D07), 238 MXS_PINCTRL_PIN(EMI_D08), 239 MXS_PINCTRL_PIN(EMI_D09), 240 MXS_PINCTRL_PIN(EMI_D10), 241 MXS_PINCTRL_PIN(EMI_D11), 242 MXS_PINCTRL_PIN(EMI_D12), 243 MXS_PINCTRL_PIN(EMI_D13), 244 MXS_PINCTRL_PIN(EMI_D14), 245 MXS_PINCTRL_PIN(EMI_D15), 246 MXS_PINCTRL_PIN(EMI_DQM0), 247 MXS_PINCTRL_PIN(EMI_DQM1), 248 MXS_PINCTRL_PIN(EMI_DQS0), 249 MXS_PINCTRL_PIN(EMI_DQS1), 250 MXS_PINCTRL_PIN(EMI_CLK), 251 MXS_PINCTRL_PIN(EMI_CLKN), 252}; 253 254static const struct mxs_regs imx23_regs = { 255 .muxsel = 0x100, 256 .drive = 0x200, 257 .pull = 0x400, 258}; 259 260static struct mxs_pinctrl_soc_data imx23_pinctrl_data = { 261 .regs = &imx23_regs, 262 .pins = imx23_pins, 263 .npins = ARRAY_SIZE(imx23_pins), 264}; 265 266static int imx23_pinctrl_probe(struct platform_device *pdev) 267{ 268 return mxs_pinctrl_probe(pdev, &imx23_pinctrl_data); 269} 270 271static const struct of_device_id imx23_pinctrl_of_match[] = { 272 { .compatible = "fsl,imx23-pinctrl", }, 273 { /* sentinel */ } 274}; 275 276static struct platform_driver imx23_pinctrl_driver = { 277 .driver = { 278 .name = "imx23-pinctrl", 279 .suppress_bind_attrs = true, 280 .of_match_table = imx23_pinctrl_of_match, 281 }, 282 .probe = imx23_pinctrl_probe, 283}; 284 285static int __init imx23_pinctrl_init(void) 286{ 287 return platform_driver_register(&imx23_pinctrl_driver); 288} 289postcore_initcall(imx23_pinctrl_init); 290