162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ciconfig PINCTRL_ASPEED 362306a36Sopenharmony_ci bool 462306a36Sopenharmony_ci depends on (ARCH_ASPEED || COMPILE_TEST) && OF 562306a36Sopenharmony_ci select MFD_SYSCON 662306a36Sopenharmony_ci select PINMUX 762306a36Sopenharmony_ci select PINCONF 862306a36Sopenharmony_ci select GENERIC_PINCONF 962306a36Sopenharmony_ci select REGMAP_MMIO 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ciconfig PINCTRL_ASPEED_G4 1262306a36Sopenharmony_ci bool "Aspeed G4 SoC pin control" 1362306a36Sopenharmony_ci depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF 1462306a36Sopenharmony_ci select PINCTRL_ASPEED 1562306a36Sopenharmony_ci help 1662306a36Sopenharmony_ci Say Y here to enable pin controller support for Aspeed's 4th 1762306a36Sopenharmony_ci generation SoCs. GPIO is provided by a separate GPIO driver. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciconfig PINCTRL_ASPEED_G5 2062306a36Sopenharmony_ci bool "Aspeed G5 SoC pin control" 2162306a36Sopenharmony_ci depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF 2262306a36Sopenharmony_ci select PINCTRL_ASPEED 2362306a36Sopenharmony_ci help 2462306a36Sopenharmony_ci Say Y here to enable pin controller support for Aspeed's 5th 2562306a36Sopenharmony_ci generation SoCs. GPIO is provided by a separate GPIO driver. 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ciconfig PINCTRL_ASPEED_G6 2862306a36Sopenharmony_ci bool "Aspeed G6 SoC pin control" 2962306a36Sopenharmony_ci depends on (MACH_ASPEED_G6 || COMPILE_TEST) && OF 3062306a36Sopenharmony_ci select PINCTRL_ASPEED 3162306a36Sopenharmony_ci help 3262306a36Sopenharmony_ci Say Y here to enable pin controller support for Aspeed's 6th 3362306a36Sopenharmony_ci generation SoCs. GPIO is provided by a separate GPIO driver. 34