162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Amlogic AXG PCIE PHY driver
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2020 Remi Pommarel <repk@triplefau.lt>
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci#include <linux/mod_devicetable.h>
862306a36Sopenharmony_ci#include <linux/module.h>
962306a36Sopenharmony_ci#include <linux/phy/phy.h>
1062306a36Sopenharmony_ci#include <linux/regmap.h>
1162306a36Sopenharmony_ci#include <linux/reset.h>
1262306a36Sopenharmony_ci#include <linux/platform_device.h>
1362306a36Sopenharmony_ci#include <linux/bitfield.h>
1462306a36Sopenharmony_ci#include <dt-bindings/phy/phy.h>
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#define MESON_PCIE_REG0 0x00
1762306a36Sopenharmony_ci#define		MESON_PCIE_COMMON_CLK	BIT(4)
1862306a36Sopenharmony_ci#define		MESON_PCIE_PORT_SEL	GENMASK(3, 2)
1962306a36Sopenharmony_ci#define		MESON_PCIE_CLK		BIT(1)
2062306a36Sopenharmony_ci#define		MESON_PCIE_POWERDOWN	BIT(0)
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci#define MESON_PCIE_TWO_X1		FIELD_PREP(MESON_PCIE_PORT_SEL, 0x3)
2362306a36Sopenharmony_ci#define MESON_PCIE_COMMON_REF_CLK	FIELD_PREP(MESON_PCIE_COMMON_CLK, 0x1)
2462306a36Sopenharmony_ci#define MESON_PCIE_PHY_INIT		(MESON_PCIE_TWO_X1 |		\
2562306a36Sopenharmony_ci					 MESON_PCIE_COMMON_REF_CLK)
2662306a36Sopenharmony_ci#define MESON_PCIE_RESET_DELAY		500
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_cistruct phy_axg_pcie_priv {
2962306a36Sopenharmony_ci	struct phy *phy;
3062306a36Sopenharmony_ci	struct phy *analog;
3162306a36Sopenharmony_ci	struct regmap *regmap;
3262306a36Sopenharmony_ci	struct reset_control *reset;
3362306a36Sopenharmony_ci};
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_cistatic const struct regmap_config phy_axg_pcie_regmap_conf = {
3662306a36Sopenharmony_ci	.reg_bits = 8,
3762306a36Sopenharmony_ci	.val_bits = 32,
3862306a36Sopenharmony_ci	.reg_stride = 4,
3962306a36Sopenharmony_ci	.max_register = MESON_PCIE_REG0,
4062306a36Sopenharmony_ci};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_cistatic int phy_axg_pcie_power_on(struct phy *phy)
4362306a36Sopenharmony_ci{
4462306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
4562306a36Sopenharmony_ci	int ret;
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci	ret = phy_power_on(priv->analog);
4862306a36Sopenharmony_ci	if (ret != 0)
4962306a36Sopenharmony_ci		return ret;
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci	regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
5262306a36Sopenharmony_ci			   MESON_PCIE_POWERDOWN, 0);
5362306a36Sopenharmony_ci	return 0;
5462306a36Sopenharmony_ci}
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_cistatic int phy_axg_pcie_power_off(struct phy *phy)
5762306a36Sopenharmony_ci{
5862306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
5962306a36Sopenharmony_ci	int ret;
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci	ret = phy_power_off(priv->analog);
6262306a36Sopenharmony_ci	if (ret != 0)
6362306a36Sopenharmony_ci		return ret;
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci	regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
6662306a36Sopenharmony_ci			   MESON_PCIE_POWERDOWN, 1);
6762306a36Sopenharmony_ci	return 0;
6862306a36Sopenharmony_ci}
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_cistatic int phy_axg_pcie_init(struct phy *phy)
7162306a36Sopenharmony_ci{
7262306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
7362306a36Sopenharmony_ci	int ret;
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci	ret = phy_init(priv->analog);
7662306a36Sopenharmony_ci	if (ret != 0)
7762306a36Sopenharmony_ci		return ret;
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci	regmap_write(priv->regmap, MESON_PCIE_REG0, MESON_PCIE_PHY_INIT);
8062306a36Sopenharmony_ci	return reset_control_reset(priv->reset);
8162306a36Sopenharmony_ci}
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_cistatic int phy_axg_pcie_exit(struct phy *phy)
8462306a36Sopenharmony_ci{
8562306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
8662306a36Sopenharmony_ci	int ret;
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ci	ret = phy_exit(priv->analog);
8962306a36Sopenharmony_ci	if (ret != 0)
9062306a36Sopenharmony_ci		return ret;
9162306a36Sopenharmony_ci
9262306a36Sopenharmony_ci	return reset_control_reset(priv->reset);
9362306a36Sopenharmony_ci}
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_cistatic int phy_axg_pcie_reset(struct phy *phy)
9662306a36Sopenharmony_ci{
9762306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
9862306a36Sopenharmony_ci	int ret = 0;
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_ci	ret = phy_reset(priv->analog);
10162306a36Sopenharmony_ci	if (ret != 0)
10262306a36Sopenharmony_ci		goto out;
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci	ret = reset_control_assert(priv->reset);
10562306a36Sopenharmony_ci	if (ret != 0)
10662306a36Sopenharmony_ci		goto out;
10762306a36Sopenharmony_ci	udelay(MESON_PCIE_RESET_DELAY);
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci	ret = reset_control_deassert(priv->reset);
11062306a36Sopenharmony_ci	if (ret != 0)
11162306a36Sopenharmony_ci		goto out;
11262306a36Sopenharmony_ci	udelay(MESON_PCIE_RESET_DELAY);
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ciout:
11562306a36Sopenharmony_ci	return ret;
11662306a36Sopenharmony_ci}
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_cistatic const struct phy_ops phy_axg_pcie_ops = {
11962306a36Sopenharmony_ci	.init = phy_axg_pcie_init,
12062306a36Sopenharmony_ci	.exit = phy_axg_pcie_exit,
12162306a36Sopenharmony_ci	.power_on = phy_axg_pcie_power_on,
12262306a36Sopenharmony_ci	.power_off = phy_axg_pcie_power_off,
12362306a36Sopenharmony_ci	.reset = phy_axg_pcie_reset,
12462306a36Sopenharmony_ci	.owner = THIS_MODULE,
12562306a36Sopenharmony_ci};
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_cistatic int phy_axg_pcie_probe(struct platform_device *pdev)
12862306a36Sopenharmony_ci{
12962306a36Sopenharmony_ci	struct phy_provider *pphy;
13062306a36Sopenharmony_ci	struct device *dev = &pdev->dev;
13162306a36Sopenharmony_ci	struct phy_axg_pcie_priv *priv;
13262306a36Sopenharmony_ci	struct device_node *np = dev->of_node;
13362306a36Sopenharmony_ci	void __iomem *base;
13462306a36Sopenharmony_ci	int ret;
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ci	priv = devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL);
13762306a36Sopenharmony_ci	if (!priv)
13862306a36Sopenharmony_ci		return -ENOMEM;
13962306a36Sopenharmony_ci
14062306a36Sopenharmony_ci	priv->phy = devm_phy_create(dev, np, &phy_axg_pcie_ops);
14162306a36Sopenharmony_ci	if (IS_ERR(priv->phy)) {
14262306a36Sopenharmony_ci		ret = PTR_ERR(priv->phy);
14362306a36Sopenharmony_ci		if (ret != -EPROBE_DEFER)
14462306a36Sopenharmony_ci			dev_err(dev, "failed to create PHY\n");
14562306a36Sopenharmony_ci		return ret;
14662306a36Sopenharmony_ci	}
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ci	base = devm_platform_ioremap_resource(pdev, 0);
14962306a36Sopenharmony_ci	if (IS_ERR(base))
15062306a36Sopenharmony_ci		return PTR_ERR(base);
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci	priv->regmap = devm_regmap_init_mmio(dev, base,
15362306a36Sopenharmony_ci					     &phy_axg_pcie_regmap_conf);
15462306a36Sopenharmony_ci	if (IS_ERR(priv->regmap))
15562306a36Sopenharmony_ci		return PTR_ERR(priv->regmap);
15662306a36Sopenharmony_ci
15762306a36Sopenharmony_ci	priv->reset = devm_reset_control_array_get_exclusive(dev);
15862306a36Sopenharmony_ci	if (IS_ERR(priv->reset))
15962306a36Sopenharmony_ci		return PTR_ERR(priv->reset);
16062306a36Sopenharmony_ci
16162306a36Sopenharmony_ci	priv->analog = devm_phy_get(dev, "analog");
16262306a36Sopenharmony_ci	if (IS_ERR(priv->analog))
16362306a36Sopenharmony_ci		return PTR_ERR(priv->analog);
16462306a36Sopenharmony_ci
16562306a36Sopenharmony_ci	phy_set_drvdata(priv->phy, priv);
16662306a36Sopenharmony_ci	dev_set_drvdata(dev, priv);
16762306a36Sopenharmony_ci	pphy = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
16862306a36Sopenharmony_ci
16962306a36Sopenharmony_ci	return PTR_ERR_OR_ZERO(pphy);
17062306a36Sopenharmony_ci}
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_cistatic const struct of_device_id phy_axg_pcie_of_match[] = {
17362306a36Sopenharmony_ci	{
17462306a36Sopenharmony_ci		.compatible = "amlogic,axg-pcie-phy",
17562306a36Sopenharmony_ci	},
17662306a36Sopenharmony_ci	{ },
17762306a36Sopenharmony_ci};
17862306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, phy_axg_pcie_of_match);
17962306a36Sopenharmony_ci
18062306a36Sopenharmony_cistatic struct platform_driver phy_axg_pcie_driver = {
18162306a36Sopenharmony_ci	.probe = phy_axg_pcie_probe,
18262306a36Sopenharmony_ci	.driver = {
18362306a36Sopenharmony_ci		.name = "phy-axg-pcie",
18462306a36Sopenharmony_ci		.of_match_table = phy_axg_pcie_of_match,
18562306a36Sopenharmony_ci	},
18662306a36Sopenharmony_ci};
18762306a36Sopenharmony_cimodule_platform_driver(phy_axg_pcie_driver);
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ciMODULE_AUTHOR("Remi Pommarel <repk@triplefau.lt>");
19062306a36Sopenharmony_ciMODULE_DESCRIPTION("Amlogic AXG PCIE PHY driver");
19162306a36Sopenharmony_ciMODULE_LICENSE("GPL v2");
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